Lines Matching +full:1000 +full:base +full:- +full:t
1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
39 * Register definitions for the Cicada CS8201 10/100/1000 gigE copper
55 #define CIPHY_S1000 CIPHY_BMCR_SPD1 /* 1000mbps */
61 #define CIPHY_BMSR_100T4 0x8000 /* 100 base T4 capable */
62 #define CIPHY_BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */
63 #define CIPHY_BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */
64 #define CIPHY_BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */
65 #define CIPHY_BMSR_10THDX 0x0800 /* 10 base T half duplex capable */
66 #define CIPHY_BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */
67 #define CIPHY_BMSR_100T2HDX 0x0200 /* 100 base T2 half duplex capable */
134 /* 1000BT control register */
148 /* 1000BT status register */
159 #define CIPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */
160 #define CIPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */
161 #define CIPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */
162 #define CIPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */
164 /* 1000BT status extension register #1 */
166 #define CIPHY_1000STS1_1000XFDX 0x8000 /* 1000baseX FDX capable */
167 #define CIPHY_1000STS1_1000XHDX 0x4000 /* 1000baseX HDX capable */
168 #define CIPHY_1000STS1_1000TFDX 0x2000 /* 1000baseT FDX capable */
169 #define CIPHY_1000STS1_1000THDX 0x1000 /* 1000baseT HDX capable */
171 /* Vendor-specific PHY registers */
184 /* 1000BT status extension register #2 */
195 #define CIPHY_1000STS2_BCM5400 0x0040 /* non-complient BCM5400 detected */
213 #define CIPHY_BYPASS_1000BNP 0x0002 /* disable 1000BT next page exchange */
267 #define CIPHY_ECTL2_ERATE 0xE000 /* 10/1000 edge rate control */
270 #define CIPHY_ECTL2_ANALOGLOOP 0x0001 /* 1000BT analog loopback */
339 #define CIPHY_AUXCSR_XOVER 0x2000 /* MDI/MDI-X crossover indication */