Lines Matching +full:0 +full:x8006
74 #define BRGPHY_5706S 0x0001
75 #define BRGPHY_5708S 0x0002
76 #define BRGPHY_NOANWAIT 0x0004
77 #define BRGPHY_5709S 0x0008
96 DRIVER_MODULE(brgphy, miibus, brgphy_driver, 0, 0);
175 { 0x57081021, "IBM eServer BladeCenter HS21" },
176 { 0x57081011, "IBM eServer BladeCenter HS21 -[8853PAU]-" },
185 found = 0; in detect_hs21()
189 for (i = 0; i < nitems(hs21_type_lists); i++) { in detect_hs21()
192 strlen(hs21_type_lists[i].prod)) == 0) { in detect_hs21()
222 &brgphy_funcs, 0); in brgphy_attach()
224 bsc->serdes_flags = 0; in brgphy_attach()
286 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { in brgphy_attach()
293 0, NULL); in brgphy_attach()
303 sc->mii_inst), 0, NULL); in brgphy_attach()
306 (detect_hs21(bce_sc) != 0)) { in brgphy_attach()
320 IFM_AUTO, 0, sc->mii_inst), 0, NULL); in brgphy_attach()
325 return (0); in brgphy_attach()
359 sc->mii_ticks = 0; in brgphy_service()
369 sc->mii_ticks = 0; /* Reset autoneg timer. */ in brgphy_service()
374 if (sc->mii_ticks++ == 0) in brgphy_service()
382 sc->mii_ticks = 0; in brgphy_service()
424 return (0); in brgphy_service()
436 int bmcr = 0, gig; in brgphy_setmedia()
454 if ((media & IFM_FDX) != 0) { in brgphy_setmedia()
464 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 0); in brgphy_setmedia()
475 if ((media & IFM_ETH_MASTER) != 0) in brgphy_setmedia()
508 (bmsr & BRGPHY_BMSR_ACOMP) == 0 && in brgphy_status()
509 (bsc->serdes_flags & BRGPHY_NOANWAIT) == 0) { in brgphy_status()
515 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { in brgphy_status()
546 if ((mii->mii_media_active & IFM_FDX) != 0) in brgphy_status()
550 (xstat & BRGPHY_1000STS_MSR) != 0) in brgphy_status()
625 int anar, ktcr = 0; in brgphy_mii_phy_auto()
629 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { in brgphy_mii_phy_auto()
631 if ((media & IFM_FLOW) != 0 || in brgphy_mii_phy_auto()
632 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) in brgphy_mii_phy_auto()
642 if ((media & IFM_FLOW) != 0 || in brgphy_mii_phy_auto()
643 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) in brgphy_mii_phy_auto()
650 PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00); in brgphy_mii_phy_auto()
660 for (i = 0; i < 15000; i++) { in brgphy_enable_loopback()
675 { BRGPHY_MII_AUXCTL, 0x0c20 }, in bcm5401_load_dspcode()
676 { BRGPHY_MII_DSP_ADDR_REG, 0x0012 }, in bcm5401_load_dspcode()
677 { BRGPHY_MII_DSP_RW_PORT, 0x1804 }, in bcm5401_load_dspcode()
678 { BRGPHY_MII_DSP_ADDR_REG, 0x0013 }, in bcm5401_load_dspcode()
679 { BRGPHY_MII_DSP_RW_PORT, 0x1204 }, in bcm5401_load_dspcode()
680 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, in bcm5401_load_dspcode()
681 { BRGPHY_MII_DSP_RW_PORT, 0x0132 }, in bcm5401_load_dspcode()
682 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, in bcm5401_load_dspcode()
683 { BRGPHY_MII_DSP_RW_PORT, 0x0232 }, in bcm5401_load_dspcode()
684 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, in bcm5401_load_dspcode()
685 { BRGPHY_MII_DSP_RW_PORT, 0x0a20 }, in bcm5401_load_dspcode()
686 { 0, 0 }, in bcm5401_load_dspcode()
690 for (i = 0; dspcode[i].reg != 0; i++) in bcm5401_load_dspcode()
702 { 0x1c, 0x8c23 }, in bcm5411_load_dspcode()
703 { 0x1c, 0x8ca3 }, in bcm5411_load_dspcode()
704 { 0x1c, 0x8c23 }, in bcm5411_load_dspcode()
705 { 0, 0 }, in bcm5411_load_dspcode()
709 for (i = 0; dspcode[i].reg != 0; i++) in bcm5411_load_dspcode()
720 { 4, 0x01e1 }, in bcm54k2_load_dspcode()
721 { 9, 0x0300 }, in bcm54k2_load_dspcode()
722 { 0, 0 }, in bcm54k2_load_dspcode()
726 for (i = 0; dspcode[i].reg != 0; i++) in bcm54k2_load_dspcode()
738 { 0x1c, 0x8d68 }, in brgphy_fixup_5704_a0_bug()
739 { 0x1c, 0x8d68 }, in brgphy_fixup_5704_a0_bug()
740 { 0, 0 }, in brgphy_fixup_5704_a0_bug()
744 for (i = 0; dspcode[i].reg != 0; i++) in brgphy_fixup_5704_a0_bug()
755 { BRGPHY_MII_AUXCTL, 0x0c00 }, in brgphy_fixup_adc_bug()
756 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, in brgphy_fixup_adc_bug()
757 { BRGPHY_MII_DSP_RW_PORT, 0x2aaa }, in brgphy_fixup_adc_bug()
758 { 0, 0 }, in brgphy_fixup_adc_bug()
762 for (i = 0; dspcode[i].reg != 0; i++) in brgphy_fixup_adc_bug()
773 { BRGPHY_MII_AUXCTL, 0x0c00 }, in brgphy_fixup_adjust_trim()
774 { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, in brgphy_fixup_adjust_trim()
775 { BRGPHY_MII_DSP_RW_PORT, 0x110b }, in brgphy_fixup_adjust_trim()
776 { BRGPHY_MII_TEST1, 0x0014 }, in brgphy_fixup_adjust_trim()
777 { BRGPHY_MII_AUXCTL, 0x0400 }, in brgphy_fixup_adjust_trim()
778 { 0, 0 }, in brgphy_fixup_adjust_trim()
782 for (i = 0; dspcode[i].reg != 0; i++) in brgphy_fixup_adjust_trim()
793 { BRGPHY_MII_AUXCTL, 0x0c00 }, in brgphy_fixup_ber_bug()
794 { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, in brgphy_fixup_ber_bug()
795 { BRGPHY_MII_DSP_RW_PORT, 0x310b }, in brgphy_fixup_ber_bug()
796 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, in brgphy_fixup_ber_bug()
797 { BRGPHY_MII_DSP_RW_PORT, 0x9506 }, in brgphy_fixup_ber_bug()
798 { BRGPHY_MII_DSP_ADDR_REG, 0x401f }, in brgphy_fixup_ber_bug()
799 { BRGPHY_MII_DSP_RW_PORT, 0x14e2 }, in brgphy_fixup_ber_bug()
800 { BRGPHY_MII_AUXCTL, 0x0400 }, in brgphy_fixup_ber_bug()
801 { 0, 0 }, in brgphy_fixup_ber_bug()
805 for (i = 0; dspcode[i].reg != 0; i++) in brgphy_fixup_ber_bug()
816 { BRGPHY_MII_DSP_RW_PORT, 0x0a75 }, in brgphy_fixup_crc_bug()
817 { 0x1c, 0x8c68 }, in brgphy_fixup_crc_bug()
818 { 0x1c, 0x8d68 }, in brgphy_fixup_crc_bug()
819 { 0x1c, 0x8c68 }, in brgphy_fixup_crc_bug()
820 { 0, 0 }, in brgphy_fixup_crc_bug()
824 for (i = 0; dspcode[i].reg != 0; i++) in brgphy_fixup_crc_bug()
835 { BRGPHY_MII_AUXCTL, 0x0c00 }, in brgphy_fixup_jitter_bug()
836 { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, in brgphy_fixup_jitter_bug()
837 { BRGPHY_MII_DSP_RW_PORT, 0x010b }, in brgphy_fixup_jitter_bug()
838 { BRGPHY_MII_AUXCTL, 0x0400 }, in brgphy_fixup_jitter_bug()
839 { 0, 0 }, in brgphy_fixup_jitter_bug()
843 for (i = 0; dspcode[i].reg != 0; i++) in brgphy_fixup_jitter_bug()
852 PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x0f08); in brgphy_fixup_disable_early_dac()
865 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007); in brgphy_ethernet_wirespeed()
910 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x4c20); in brgphy_jumbo_settings()
912 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7); in brgphy_jumbo_settings()
922 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7); in brgphy_jumbo_settings()
925 val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7)); in brgphy_jumbo_settings()
950 for (i = 0; i < 100; i++) { in brgphy_reset()
951 if ((PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_RESET) == 0) in brgphy_reset()
1014 if ((bge_sc->bge_phy_flags & BGE_PHY_NO_WIRESPEED) == 0) in brgphy_reset()
1026 PHY_WRITE(sc, BRGPHY_MII_EPHY_PTEST, 0x12); in brgphy_reset()
1030 /* Store autoneg capabilities/results in digital block (Page 0) */ in brgphy_reset()
1060 PHY_READ(sc, BRGPHY_5708S_PG5_TXACTL1) & ~0x30); in brgphy_reset()