228 	MGE_WRITE(sc, MGE_REG_SMI, MGE_SMI_MASK &  in mv_read_ge_smi()
273 	MGE_WRITE(sc, MGE_REG_SMI, MGE_SMI_MASK &  in mv_write_ge_smi()
291 	MGE_WRITE(sc->phy_sc, MGE_REG_SMI, MGE_SMI_MASK &  in mv_read_ext_phy()
317 	MGE_WRITE(sc->phy_sc, MGE_REG_SMI, MGE_SMI_MASK &  in mv_write_ext_phy()
430 	MGE_WRITE(sc, MGE_MAC_ADDR_L, mac_l);  in mge_set_mac_address()
431 	MGE_WRITE(sc, MGE_MAC_ADDR_H, mac_h);  in mge_set_mac_address()
448 			MGE_WRITE(sc, MGE_DA_FILTER_UCAST(i), reg_val);  in mge_set_ucast_address()
450 			MGE_WRITE(sc, MGE_DA_FILTER_UCAST(i), 0);  in mge_set_ucast_address()
464 		MGE_WRITE(sc, MGE_PORT_CONFIG, port_config);  in mge_set_prom_mode()
470 			MGE_WRITE(sc, MGE_DA_FILTER_SPEC_MCAST(i), reg_val);  in mge_set_prom_mode()
471 			MGE_WRITE(sc, MGE_DA_FILTER_OTH_MCAST(i), reg_val);  in mge_set_prom_mode()
475 			MGE_WRITE(sc, MGE_DA_FILTER_UCAST(i), reg_val);  in mge_set_prom_mode()
480 		MGE_WRITE(sc, MGE_PORT_CONFIG, port_config);  in mge_set_prom_mode()
483 			MGE_WRITE(sc, MGE_DA_FILTER_SPEC_MCAST(i), 0);  in mge_set_prom_mode()
484 			MGE_WRITE(sc, MGE_DA_FILTER_OTH_MCAST(i), 0);  in mge_set_prom_mode()
711 	MGE_WRITE(sc, MGE_RX_CUR_DESC_PTR(MGE_RX_DEFAULT_QUEUE),  in mge_reinit_rx()
715 	MGE_WRITE(sc, MGE_RX_QUEUE_CMD, MGE_ENABLE_RXQ(MGE_RX_DEFAULT_QUEUE));  in mge_reinit_rx()
744 			MGE_WRITE(sc, MGE_PORT_INT_CAUSE, ~int_cause);  in mge_poll()
745 			MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT, ~int_cause_ext);  in mge_poll()
874 		MGE_WRITE(sc, MGE_REG_PHYDEV, miisc->mii_phy);  in mge_attach()
903 		MGE_WRITE(sc, MGE_REG_PHYDEV, MGE_SWITCH_PHYDEV);  in mge_attach()
1083 		MGE_WRITE(sc, MGE_PORT_SERIAL_CTRL1, MGE_RGMII_EN);  in mge_init_locked()
1084 		MGE_WRITE(sc, MGE_FIXED_PRIO_CONF, MGE_FIXED_PRIO_EN(0));  in mge_init_locked()
1088 	MGE_WRITE(sc, MGE_TX_TOKEN_COUNT(0), sc->mge_tx_tok_cnt);  in mge_init_locked()
1089 	MGE_WRITE(sc, MGE_TX_TOKEN_CONF(0), sc->mge_tx_tok_cfg);  in mge_init_locked()
1090 	MGE_WRITE(sc, MGE_TX_ARBITER_CONF(0), sc->mge_tx_arb_cfg);  in mge_init_locked()
1094 		MGE_WRITE(sc, MGE_TX_TOKEN_COUNT(i), 0);  in mge_init_locked()
1095 		MGE_WRITE(sc, MGE_TX_TOKEN_CONF(i), 0);  in mge_init_locked()
1096 		MGE_WRITE(sc, MGE_TX_ARBITER_CONF(i), 0);  in mge_init_locked()
1100 	MGE_WRITE(sc, sc->mge_mtu, 0);  in mge_init_locked()
1103 	MGE_WRITE(sc, MGE_PORT_CONFIG,  in mge_init_locked()
1106 	MGE_WRITE(sc, MGE_PORT_EXT_CONFIG , 0x0);  in mge_init_locked()
1119 	MGE_WRITE(sc, MGE_PORT_SERIAL_CTRL, reg_val);  in mge_init_locked()
1122 	MGE_WRITE(sc, MGE_SDMA_CONFIG , MGE_SDMA_RX_BYTE_SWAP |  in mge_init_locked()
1127 	MGE_WRITE(sc, MGE_TX_FIFO_URGENT_TRSH, 0x0);  in mge_init_locked()
1129 	MGE_WRITE(sc, MGE_TX_CUR_DESC_PTR, sc->tx_desc_start);  in mge_init_locked()
1130 	MGE_WRITE(sc, MGE_RX_CUR_DESC_PTR(MGE_RX_DEFAULT_QUEUE),  in mge_init_locked()
1149 	MGE_WRITE(sc, MGE_RX_QUEUE_CMD, MGE_ENABLE_RXQ(MGE_RX_DEFAULT_QUEUE));  in mge_init_locked()
1154 	MGE_WRITE(sc, MGE_PORT_SERIAL_CTRL, reg_val);  in mge_init_locked()
1216 		MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT, ~(int_cause_ext &  in mge_intr_rxtx()
1282 		MGE_WRITE(sc, MGE_PORT_INT_CAUSE,  in mge_intr_rx_check()
1290 		MGE_WRITE(sc, MGE_PORT_INT_CAUSE, ~int_cause);  in mge_intr_rx_check()
1291 		MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT, ~int_cause_ext);  in mge_intr_rx_check()
1390 	MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT, ~(int_cause_ext &  in mge_intr_tx()
1777 		MGE_WRITE(sc, MGE_TX_QUEUE_CMD, reg_val | MGE_ENABLE_TXQ);  in mge_start_locked()
1808 	MGE_WRITE(sc, MGE_TX_QUEUE_CMD, reg_val | MGE_DISABLE_TXQ);  in mge_stop()
1809 	MGE_WRITE(sc, MGE_RX_QUEUE_CMD, MGE_DISABLE_RXQ_ALL);  in mge_stop()
1855 	MGE_WRITE(sc, MGE_PORT_SERIAL_CTRL ,reg_val);  in mge_stop()
1936 		MGE_WRITE(sc, MGE_PORT_INT_MASK , MGE_PORT_INT_RXQ0 |  in mge_intrs_ctrl()
1938 		MGE_WRITE(sc, MGE_PORT_INT_MASK_EXT , MGE_PORT_INT_EXT_TXERR0 |  in mge_intrs_ctrl()
1942 		MGE_WRITE(sc, MGE_INT_CAUSE, 0x0);  in mge_intrs_ctrl()
1943 		MGE_WRITE(sc, MGE_INT_MASK, 0x0);  in mge_intrs_ctrl()
1945 		MGE_WRITE(sc, MGE_PORT_INT_CAUSE, 0x0);  in mge_intrs_ctrl()
1946 		MGE_WRITE(sc, MGE_PORT_INT_CAUSE_EXT, 0x0);  in mge_intrs_ctrl()
1948 		MGE_WRITE(sc, MGE_PORT_INT_MASK, 0x0);  in mge_intrs_ctrl()
1949 		MGE_WRITE(sc, MGE_PORT_INT_MASK_EXT, 0x0);  in mge_intrs_ctrl()
2041 		MGE_WRITE(sc, MGE_DA_FILTER_SPEC_MCAST(i), ctx.smt[i]);  in mge_setup_multicast()
2042 		MGE_WRITE(sc, MGE_DA_FILTER_OTH_MCAST(i), ctx.omt[i]);  in mge_setup_multicast()
2057 	MGE_WRITE(sc, MGE_SDMA_CONFIG, reg);  in mge_set_rxic()
2071 	MGE_WRITE(sc, MGE_TX_FIFO_URGENT_TRSH, reg);  in mge_set_txic()