Lines Matching +full:16 +full:- +full:input
41 /*--------------------------CONFIG VALUES------------------------*/
75 #define LIO_CN23XX_OQ_REFIL_THRESHOLD 16
90 #define LIO_CN23XX_MAX_INPUT_JABBER (LIO_CN23XX_PKI_MAX_FRAME_SIZE - \
102 #define LIO_GET_IQ_CFG(cfg) ((cfg)->iq)
103 #define LIO_GET_IQ_MAX_Q_CFG(cfg) ((cfg)->iq.max_iqs)
104 #define LIO_GET_IQ_INSTR_TYPE_CFG(cfg) ((cfg)->iq.instr_type)
106 #define LIO_GET_IQ_INTR_PKT_CFG(cfg) ((cfg)->iq.iq_intr_pkt)
108 #define LIO_GET_OQ_MAX_Q_CFG(cfg) ((cfg)->oq.max_oqs)
109 #define LIO_GET_OQ_PKTS_PER_INTR_CFG(cfg) ((cfg)->oq.pkts_per_intr)
110 #define LIO_GET_OQ_REFILL_THRESHOLD_CFG(cfg) ((cfg)->oq.refill_threshold)
111 #define LIO_GET_OQ_INTR_PKT_CFG(cfg) ((cfg)->oq.oq_intr_pkt)
112 #define LIO_GET_OQ_INTR_TIME_CFG(cfg) ((cfg)->oq.oq_intr_time)
114 #define LIO_GET_NUM_NIC_PORTS_CFG(cfg) ((cfg)->num_nic_ports)
115 #define LIO_GET_NUM_DEF_TX_DESCS_CFG(cfg) ((cfg)->num_def_tx_descs)
116 #define LIO_GET_NUM_DEF_RX_DESCS_CFG(cfg) ((cfg)->num_def_rx_descs)
117 #define LIO_GET_DEF_RX_BUF_SIZE_CFG(cfg) ((cfg)->def_rx_buf_size)
120 ((cfg)->nic_if_cfg[idx].num_rx_descs)
122 ((cfg)->nic_if_cfg[idx].num_tx_descs)
124 ((cfg)->nic_if_cfg[idx].rx_buf_size)
126 #define LIO_GET_IS_SLI_BP_ON_CFG(cfg) ((cfg)->misc.enable_sli_oq_bp)
132 ((cfg)->nic_if_cfg[idx].num_rx_descs = value)
134 ((cfg)->nic_if_cfg[idx].num_tx_descs = value)
147 * Structure to define the configuration attributes for each Input queue.
152 uint64_t reserved:16;
155 uint64_t iq_intr_pkt:16;
158 uint64_t db_timeout:16;
162 * before driver hits the Input queue doorbell.
166 /* Command size - 32 or 64 bytes */
170 * Pending list size (usually set to the sum of the size of all Input
184 * Pending list size (usually set to the sum of the size of all Input
189 /* Command size - 32 or 64 bytes */
194 * before driver hits the Input queue doorbell.
199 uint64_t db_timeout:16;
202 uint64_t iq_intr_pkt:16;
204 uint64_t reserved:16;
215 uint64_t reserved:16;
217 uint64_t pkts_per_intr:16;
225 uint64_t oq_intr_time:16;
233 uint64_t oq_intr_pkt:16;
241 uint64_t refill_threshold:16;
257 uint64_t refill_threshold:16;
265 uint64_t oq_intr_pkt:16;
273 uint64_t oq_intr_time:16;
275 uint64_t pkts_per_intr:16;
277 uint64_t reserved:16;
290 uint64_t base_queue:16;
298 uint64_t rx_buf_size:16;
301 uint64_t num_tx_descs:16;
304 uint64_t num_rx_descs:16;
307 uint64_t num_rxqs:16;
310 uint64_t max_rxqs:16;
313 uint64_t num_txqs:16;
316 uint64_t max_txqs:16;
321 uint64_t max_txqs:16;
324 uint64_t num_txqs:16;
327 uint64_t max_rxqs:16;
330 uint64_t num_rxqs:16;
333 uint64_t num_rx_descs:16;
336 uint64_t num_tx_descs:16;
342 uint64_t rx_buf_size:16;
346 uint64_t base_queue:16;
388 /* Input Queue attributes. */
412 /* Maximum address space to be mapped for Octeon's BAR1 index-based access. */
416 * Response lists - 1 ordered, 1 unordered-blocking, 1 unordered-nonblocking
422 * Opcode hash bits. The opcode is hashed on the lower 6-bits to lookup the
427 /* Mask for the 6-bit lookup hash */
430 /* Size of the dispatch table. The 6-bit hash can index into 2^6 entries */