Lines Matching +full:conf +full:- +full:rst
54 /* Initiate chip-wide soft reset */ in lio_cn23xx_pf_soft_reset()
89 lio_dev_err(oct, "PCI-E Fatal error detected;\n" in lio_cn23xx_pf_enable_error_reporting()
99 lio_dev_dbg(oct, "Enabling PCI-E error reporting..\n"); in lio_cn23xx_pf_enable_error_reporting()
111 /* TBD: get the info in Hand-shake */ in lio_cn23xx_pf_coprocessor_clock()
121 oct->pfvf_hsword.coproc_tics_per_us = oqticks_per_us; in lio_cn23xx_pf_get_oq_ticks()
143 uint16_t mac_no = oct->pcie_port; in lio_cn23xx_pf_setup_global_mac_regs()
144 uint16_t pf_num = oct->pf_num; in lio_cn23xx_pf_setup_global_mac_regs()
158 (oct->sriov_info.trs << LIO_CN23XX_PKT_MAC_CTL_RINFO_TRS_BIT_POS); in lio_cn23xx_pf_setup_global_mac_regs()
179 srn = oct->sriov_info.pf_srn; in lio_cn23xx_pf_reset_io_queues()
180 ern = srn + oct->sriov_info.num_pf_rings; in lio_cn23xx_pf_reset_io_queues()
183 /* to make the queue off, need to set the RST bit. */ in lio_cn23xx_pf_reset_io_queues()
187 /* set RST bit to 1. This bit applies to both IQ and OQ */ in lio_cn23xx_pf_reset_io_queues()
195 /* wait until the RST bit is clear or the RST and quiet bits are set */ in lio_cn23xx_pf_reset_io_queues()
205 loop--; in lio_cn23xx_pf_reset_io_queues()
212 return (-1); in lio_cn23xx_pf_reset_io_queues()
224 ret_val = -1; in lio_cn23xx_pf_reset_io_queues()
234 struct lio_cn23xx_pf *cn23xx = (struct lio_cn23xx_pf *)oct->chip; in lio_cn23xx_pf_setup_global_input_regs()
240 pf_num = oct->pf_num; in lio_cn23xx_pf_setup_global_input_regs()
242 srn = oct->sriov_info.pf_srn; in lio_cn23xx_pf_setup_global_input_regs()
243 ern = srn + oct->sriov_info.num_pf_rings; in lio_cn23xx_pf_setup_global_input_regs()
246 return (-1); in lio_cn23xx_pf_setup_global_input_regs()
255 reg_val = oct->pcie_port << in lio_cn23xx_pf_setup_global_input_regs()
271 iq = oct->instr_queue[q_no]; in lio_cn23xx_pf_setup_global_input_regs()
273 inst_cnt_reg = iq->inst_cnt_reg; in lio_cn23xx_pf_setup_global_input_regs()
287 intr_threshold = LIO_GET_IQ_INTR_PKT_CFG(cn23xx->conf) & in lio_cn23xx_pf_setup_global_input_regs()
303 struct lio_cn23xx_pf *cn23xx = (struct lio_cn23xx_pf *)oct->chip; in lio_cn23xx_pf_setup_global_output_regs()
307 srn = oct->sriov_info.pf_srn; in lio_cn23xx_pf_setup_global_output_regs()
308 ern = srn + oct->sriov_info.num_pf_rings; in lio_cn23xx_pf_setup_global_output_regs()
310 if (LIO_GET_IS_SLI_BP_ON_CFG(cn23xx->conf)) { in lio_cn23xx_pf_setup_global_output_regs()
328 * No Relaxed Ordering, No Snoop, 64-bit Byte swap for in lio_cn23xx_pf_setup_global_output_regs()
341 * No Relaxed Ordering, No Snoop, 64-bit Byte swap for in lio_cn23xx_pf_setup_global_output_regs()
354 * Enabling these interrupt in oct->fn_list.enable_interrupt() in lio_cn23xx_pf_setup_global_output_regs()
360 oct, (uint32_t)LIO_GET_OQ_INTR_TIME_CFG(cn23xx->conf)); in lio_cn23xx_pf_setup_global_output_regs()
363 (LIO_GET_OQ_INTR_PKT_CFG(cn23xx->conf) | in lio_cn23xx_pf_setup_global_output_regs()
370 /* Enable channel-level backpressure */ in lio_cn23xx_pf_setup_global_output_regs()
371 if (oct->pf_num) in lio_cn23xx_pf_setup_global_output_regs()
389 return (-1); in lio_cn23xx_pf_setup_device_regs()
409 struct lio_instr_queue *iq = oct->instr_queue[iq_no]; in lio_cn23xx_pf_setup_iq_regs()
412 iq_no += oct->sriov_info.pf_srn; in lio_cn23xx_pf_setup_iq_regs()
416 iq->base_addr_dma); in lio_cn23xx_pf_setup_iq_regs()
417 lio_write_csr32(oct, LIO_CN23XX_SLI_IQ_SIZE(iq_no), iq->max_count); in lio_cn23xx_pf_setup_iq_regs()
423 iq->doorbell_reg = LIO_CN23XX_SLI_IQ_DOORBELL(iq_no); in lio_cn23xx_pf_setup_iq_regs()
424 iq->inst_cnt_reg = LIO_CN23XX_SLI_IQ_INSTR_COUNT64(iq_no); in lio_cn23xx_pf_setup_iq_regs()
426 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in lio_cn23xx_pf_setup_iq_regs()
432 pkt_in_done = lio_read_csr64(oct, iq->inst_cnt_reg); in lio_cn23xx_pf_setup_iq_regs()
434 if (oct->msix_on) { in lio_cn23xx_pf_setup_iq_regs()
436 lio_write_csr64(oct, iq->inst_cnt_reg, in lio_cn23xx_pf_setup_iq_regs()
443 lio_write_csr64(oct, iq->inst_cnt_reg, pkt_in_done); in lio_cn23xx_pf_setup_iq_regs()
446 iq->reset_instr_cnt = 0; in lio_cn23xx_pf_setup_iq_regs()
452 struct lio_droq *droq = oct->droq[oq_no]; in lio_cn23xx_pf_setup_oq_regs()
453 struct lio_cn23xx_pf *cn23xx = (struct lio_cn23xx_pf *)oct->chip; in lio_cn23xx_pf_setup_oq_regs()
458 oq_no += oct->sriov_info.pf_srn; in lio_cn23xx_pf_setup_oq_regs()
461 droq->desc_ring_dma); in lio_cn23xx_pf_setup_oq_regs()
462 lio_write_csr32(oct, LIO_CN23XX_SLI_OQ_SIZE(oq_no), droq->max_count); in lio_cn23xx_pf_setup_oq_regs()
465 droq->buffer_size); in lio_cn23xx_pf_setup_oq_regs()
468 droq->pkts_sent_reg = LIO_CN23XX_SLI_OQ_PKTS_SENT(oq_no); in lio_cn23xx_pf_setup_oq_regs()
469 droq->pkts_credit_reg = LIO_CN23XX_SLI_OQ_PKTS_CREDIT(oq_no); in lio_cn23xx_pf_setup_oq_regs()
471 if (!oct->msix_on) { in lio_cn23xx_pf_setup_oq_regs()
493 (uint32_t)LIO_GET_OQ_INTR_TIME_CFG(cn23xx->conf)); in lio_cn23xx_pf_setup_oq_regs()
494 cnt_threshold = (uint32_t)LIO_GET_OQ_INTR_PKT_CFG(cn23xx->conf); in lio_cn23xx_pf_setup_oq_regs()
509 srn = oct->sriov_info.pf_srn; in lio_cn23xx_pf_enable_io_queues()
510 ern = srn + oct->num_iqs; in lio_cn23xx_pf_enable_io_queues()
514 if (oct->io_qmask.iq64B & BIT_ULL(q_no - srn)) { in lio_cn23xx_pf_enable_io_queues()
523 if (oct->io_qmask.iq & BIT_ULL(q_no - srn)) { in lio_cn23xx_pf_enable_io_queues()
539 loop--; in lio_cn23xx_pf_enable_io_queues()
544 return (-1); in lio_cn23xx_pf_enable_io_queues()
557 return (-1); in lio_cn23xx_pf_enable_io_queues()
571 if (oct->io_qmask.oq & BIT_ULL(q_no - srn)) { in lio_cn23xx_pf_enable_io_queues()
592 srn = oct->sriov_info.pf_srn; in lio_cn23xx_pf_disable_io_queues()
593 ern = srn + oct->num_iqs; in lio_cn23xx_pf_disable_io_queues()
612 while (!(d64 & BIT_ULL(q_no)) && loop--) { in lio_cn23xx_pf_disable_io_queues()
616 loop--; in lio_cn23xx_pf_disable_io_queues()
624 0ULL) && loop--) { in lio_cn23xx_pf_disable_io_queues()
639 while (!(d64 & BIT_ULL(q_no)) && loop--) { in lio_cn23xx_pf_disable_io_queues()
643 loop--; in lio_cn23xx_pf_disable_io_queues()
651 0ULL) && loop--) { in lio_cn23xx_pf_disable_io_queues()
665 struct octeon_device *oct = ioq_vector->oct_dev; in lio_cn23xx_pf_msix_interrupt_handler()
666 struct lio_droq *droq = oct->droq[ioq_vector->droq_index]; in lio_cn23xx_pf_msix_interrupt_handler()
671 lio_dev_err(oct, "23XX bringup FIXME: oct pfnum:%d ioq_vector->ioq_num :%d droq is NULL\n", in lio_cn23xx_pf_msix_interrupt_handler()
672 oct->pf_num, ioq_vector->ioq_num); in lio_cn23xx_pf_msix_interrupt_handler()
675 pkts_sent = lio_read_csr64(oct, droq->pkts_sent_reg); in lio_cn23xx_pf_msix_interrupt_handler()
704 struct lio_cn23xx_pf *cn23xx = (struct lio_cn23xx_pf *)oct->chip; in lio_cn23xx_pf_interrupt_handler()
708 intr64 = lio_read_csr64(oct, cn23xx->intr_sum_reg64); in lio_cn23xx_pf_interrupt_handler()
710 oct->int_status = 0; in lio_cn23xx_pf_interrupt_handler()
716 if (oct->msix_on != LIO_FLAG_MSIX_ENABLED) { in lio_cn23xx_pf_interrupt_handler()
718 oct->int_status |= LIO_DEV_INTR_PKT_DATA; in lio_cn23xx_pf_interrupt_handler()
722 oct->int_status |= LIO_DEV_INTR_DMA0_FORCE; in lio_cn23xx_pf_interrupt_handler()
725 oct->int_status |= LIO_DEV_INTR_DMA1_FORCE; in lio_cn23xx_pf_interrupt_handler()
728 lio_write_csr64(oct, cn23xx->intr_sum_reg64, intr64); in lio_cn23xx_pf_interrupt_handler()
740 LIO_CN23XX_PEM_BAR1_INDEX_REG(oct->pcie_port, in lio_cn23xx_pf_bar1_idx_setup()
744 LIO_CN23XX_PEM_BAR1_INDEX_REG(oct->pcie_port, in lio_cn23xx_pf_bar1_idx_setup()
747 LIO_CN23XX_PEM_BAR1_INDEX_REG(oct->pcie_port, in lio_cn23xx_pf_bar1_idx_setup()
757 LIO_CN23XX_PEM_BAR1_INDEX_REG(oct->pcie_port, idx)); in lio_cn23xx_pf_bar1_idx_setup()
759 bar1 = lio_pci_readq(oct, LIO_CN23XX_PEM_BAR1_INDEX_REG(oct->pcie_port, in lio_cn23xx_pf_bar1_idx_setup()
769 LIO_CN23XX_PEM_BAR1_INDEX_REG(oct->pcie_port, idx)); in lio_cn23xx_pf_bar1_idx_write()
777 LIO_CN23XX_PEM_BAR1_INDEX_REG(oct->pcie_port, in lio_cn23xx_pf_bar1_idx_read()
785 struct octeon_device *oct = iq->oct_dev; in lio_cn23xx_pf_update_read_index()
788 uint32_t pkt_in_done = lio_read_csr32(oct, iq->inst_cnt_reg); in lio_cn23xx_pf_update_read_index()
790 last_done = pkt_in_done - iq->pkt_in_done; in lio_cn23xx_pf_update_read_index()
791 iq->pkt_in_done = pkt_in_done; in lio_cn23xx_pf_update_read_index()
795 * the new index. The iq->reset_instr_cnt is always zero for in lio_cn23xx_pf_update_read_index()
798 new_idx = (iq->octeon_read_index + in lio_cn23xx_pf_update_read_index()
800 iq->max_count; in lio_cn23xx_pf_update_read_index()
808 struct lio_cn23xx_pf *cn23xx = (struct lio_cn23xx_pf *)oct->chip; in lio_cn23xx_pf_enable_interrupt()
814 lio_write_csr64(oct, cn23xx->intr_enb_reg64, in lio_cn23xx_pf_enable_interrupt()
815 cn23xx->intr_mask64); in lio_cn23xx_pf_enable_interrupt()
817 intr_val = lio_read_csr64(oct, cn23xx->intr_enb_reg64); in lio_cn23xx_pf_enable_interrupt()
819 lio_write_csr64(oct, cn23xx->intr_enb_reg64, intr_val); in lio_cn23xx_pf_enable_interrupt()
826 struct lio_cn23xx_pf *cn23xx = (struct lio_cn23xx_pf *)oct->chip; in lio_cn23xx_pf_disable_interrupt()
831 lio_write_csr64(oct, cn23xx->intr_enb_reg64, 0); in lio_cn23xx_pf_disable_interrupt()
833 intr_val = lio_read_csr64(oct, cn23xx->intr_enb_reg64); in lio_cn23xx_pf_disable_interrupt()
835 lio_write_csr64(oct, cn23xx->intr_enb_reg64, intr_val); in lio_cn23xx_pf_disable_interrupt()
842 oct->pcie_port = (lio_read_csr32(oct, in lio_cn23xx_pf_get_pcie_qlmport()
846 oct->pcie_port); in lio_cn23xx_pf_get_pcie_qlmport()
856 oct->pf_num = ((fdl_bit >> LIO_CN23XX_PCIE_SRIOV_FDL_BIT_POS) & in lio_cn23xx_pf_get_pf_num()
863 struct lio_cn23xx_pf *cn23xx = (struct lio_cn23xx_pf *)oct->chip; in lio_cn23xx_pf_setup_reg_address()
865 oct->reg_list.pci_win_wr_addr = LIO_CN23XX_SLI_WIN_WR_ADDR64; in lio_cn23xx_pf_setup_reg_address()
867 oct->reg_list.pci_win_rd_addr_hi = LIO_CN23XX_SLI_WIN_RD_ADDR_HI; in lio_cn23xx_pf_setup_reg_address()
868 oct->reg_list.pci_win_rd_addr_lo = LIO_CN23XX_SLI_WIN_RD_ADDR64; in lio_cn23xx_pf_setup_reg_address()
869 oct->reg_list.pci_win_rd_addr = LIO_CN23XX_SLI_WIN_RD_ADDR64; in lio_cn23xx_pf_setup_reg_address()
871 oct->reg_list.pci_win_wr_data_hi = LIO_CN23XX_SLI_WIN_WR_DATA_HI; in lio_cn23xx_pf_setup_reg_address()
872 oct->reg_list.pci_win_wr_data_lo = LIO_CN23XX_SLI_WIN_WR_DATA_LO; in lio_cn23xx_pf_setup_reg_address()
873 oct->reg_list.pci_win_wr_data = LIO_CN23XX_SLI_WIN_WR_DATA64; in lio_cn23xx_pf_setup_reg_address()
875 oct->reg_list.pci_win_rd_data = LIO_CN23XX_SLI_WIN_RD_DATA64; in lio_cn23xx_pf_setup_reg_address()
879 cn23xx->intr_mask64 = LIO_CN23XX_INTR_MASK; in lio_cn23xx_pf_setup_reg_address()
880 if (!oct->msix_on) in lio_cn23xx_pf_setup_reg_address()
881 cn23xx->intr_mask64 |= LIO_CN23XX_INTR_PKT_TIME; in lio_cn23xx_pf_setup_reg_address()
883 cn23xx->intr_sum_reg64 = in lio_cn23xx_pf_setup_reg_address()
884 LIO_CN23XX_SLI_MAC_PF_INT_SUM64(oct->pcie_port, oct->pf_num); in lio_cn23xx_pf_setup_reg_address()
885 cn23xx->intr_enb_reg64 = in lio_cn23xx_pf_setup_reg_address()
886 LIO_CN23XX_SLI_MAC_PF_INT_ENB64(oct->pcie_port, oct->pf_num); in lio_cn23xx_pf_setup_reg_address()
892 struct lio_cn23xx_pf *cn23xx = (struct lio_cn23xx_pf *)oct->chip; in lio_cn23xx_pf_sriov_config()
894 cn23xx->conf = (struct lio_config *)lio_get_config_info(oct, LIO_23XX); in lio_cn23xx_pf_sriov_config()
898 if (oct->sriov_info.num_pf_rings) { in lio_cn23xx_pf_sriov_config()
899 num_pf_rings = oct->sriov_info.num_pf_rings; in lio_cn23xx_pf_sriov_config()
903 oct->sriov_info.num_pf_rings, in lio_cn23xx_pf_sriov_config()
916 oct->sriov_info.trs = total_rings; in lio_cn23xx_pf_sriov_config()
917 oct->sriov_info.pf_srn = total_rings - num_pf_rings; in lio_cn23xx_pf_sriov_config()
918 oct->sriov_info.num_pf_rings = num_pf_rings; in lio_cn23xx_pf_sriov_config()
921 oct->sriov_info.trs, oct->sriov_info.pf_srn, in lio_cn23xx_pf_sriov_config()
922 oct->sriov_info.num_pf_rings); in lio_cn23xx_pf_sriov_config()
971 oct->fn_list.setup_iq_regs = lio_cn23xx_pf_setup_iq_regs; in lio_cn23xx_pf_setup_device()
972 oct->fn_list.setup_oq_regs = lio_cn23xx_pf_setup_oq_regs; in lio_cn23xx_pf_setup_device()
973 oct->fn_list.process_interrupt_regs = lio_cn23xx_pf_interrupt_handler; in lio_cn23xx_pf_setup_device()
974 oct->fn_list.msix_interrupt_handler = in lio_cn23xx_pf_setup_device()
977 oct->fn_list.soft_reset = lio_cn23xx_pf_soft_reset; in lio_cn23xx_pf_setup_device()
978 oct->fn_list.setup_device_regs = lio_cn23xx_pf_setup_device_regs; in lio_cn23xx_pf_setup_device()
979 oct->fn_list.update_iq_read_idx = lio_cn23xx_pf_update_read_index; in lio_cn23xx_pf_setup_device()
981 oct->fn_list.bar1_idx_setup = lio_cn23xx_pf_bar1_idx_setup; in lio_cn23xx_pf_setup_device()
982 oct->fn_list.bar1_idx_write = lio_cn23xx_pf_bar1_idx_write; in lio_cn23xx_pf_setup_device()
983 oct->fn_list.bar1_idx_read = lio_cn23xx_pf_bar1_idx_read; in lio_cn23xx_pf_setup_device()
985 oct->fn_list.enable_interrupt = lio_cn23xx_pf_enable_interrupt; in lio_cn23xx_pf_setup_device()
986 oct->fn_list.disable_interrupt = lio_cn23xx_pf_disable_interrupt; in lio_cn23xx_pf_setup_device()
988 oct->fn_list.enable_io_queues = lio_cn23xx_pf_enable_io_queues; in lio_cn23xx_pf_setup_device()
989 oct->fn_list.disable_io_queues = lio_cn23xx_pf_disable_io_queues; in lio_cn23xx_pf_setup_device()
993 oct->coproc_clock_rate = 1000000ULL * in lio_cn23xx_pf_setup_device()