Lines Matching refs:wr32
258 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_num), in ixl_vf_map_queues()
267 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num), qtable); in ixl_vf_map_queues()
270 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num), in ixl_vf_map_queues()
305 wr32(hw, vfint_reg, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK); in ixl_vf_disable_queue_intr()
313 wr32(hw, vpint_reg, I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK | in ixl_vf_unregister_intr()
360 wr32(hw, I40E_PF_PCI_CIAA, IXL_PF_PCI_CIAA_VF_DEVICE_STATUS | in ixl_flush_pcie()
384 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig); in ixl_reset_vf()
418 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), VIRTCHNL_VFR_COMPLETED); in ixl_reinit_vf()
422 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig); in ixl_reinit_vf()
432 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), VIRTCHNL_VFR_VFACTIVE); in ixl_reinit_vf()
592 wr32(hw, I40E_QTX_CTL(global_queue_num), qtx_ctl); in ixl_vf_config_tx_queue()
744 wr32(&pf->hw, offset, qctl); in ixl_vf_set_qctl()
798 wr32(hw, lnklst_reg, in ixl_vf_config_vector()
1537 wr32(hw, I40E_PFINT_ICR0_ENA, icr0); in ixl_handle_vflr()
1551 wr32(hw, I40E_GLGEN_VFLRSTAT(vflrstat_index), in ixl_handle_vflr()