55 		hw->aq.arq.tail = I40E_VF_ARQT1;  in i40e_adminq_init_regs()
56 		hw->aq.arq.head = I40E_VF_ARQH1;  in i40e_adminq_init_regs()
57 		hw->aq.arq.len  = I40E_VF_ARQLEN1;  in i40e_adminq_init_regs()
58 		hw->aq.arq.bal  = I40E_VF_ARQBAL1;  in i40e_adminq_init_regs()
59 		hw->aq.arq.bah  = I40E_VF_ARQBAH1;  in i40e_adminq_init_regs()
66 		hw->aq.arq.tail = I40E_PF_ARQT;  in i40e_adminq_init_regs()
67 		hw->aq.arq.head = I40E_PF_ARQH;  in i40e_adminq_init_regs()
68 		hw->aq.arq.len  = I40E_PF_ARQLEN;  in i40e_adminq_init_regs()
69 		hw->aq.arq.bal  = I40E_PF_ARQBAL;  in i40e_adminq_init_regs()
70 		hw->aq.arq.bah  = I40E_PF_ARQBAH;  in i40e_adminq_init_regs()
109 	ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf,  in i40e_alloc_adminq_arq_ring()
140 	i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf);  in i40e_free_adminq_arq()
159 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head,  in i40e_alloc_arq_bufs()
163 	hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va;  in i40e_alloc_arq_bufs()
167 		bi = &hw->aq.arq.r.arq_bi[i];  in i40e_alloc_arq_bufs()
176 		desc = I40E_ADMINQ_DESC(hw->aq.arq, i);  in i40e_alloc_arq_bufs()
204 		i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);  in i40e_alloc_arq_bufs()
205 	i40e_free_virt_mem(hw, &hw->aq.arq.dma_head);  in i40e_alloc_arq_bufs()
260 		i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);  in i40e_free_arq_bufs()
263 	i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf);  in i40e_free_arq_bufs()
266 	i40e_free_virt_mem(hw, &hw->aq.arq.dma_head);  in i40e_free_arq_bufs()
337 	wr32(hw, hw->aq.arq.head, 0);  in i40e_config_arq_regs()
338 	wr32(hw, hw->aq.arq.tail, 0);  in i40e_config_arq_regs()
342 		wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |  in i40e_config_arq_regs()
345 		wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |  in i40e_config_arq_regs()
347 	wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));  in i40e_config_arq_regs()
348 	wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));  in i40e_config_arq_regs()
351 	wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);  in i40e_config_arq_regs()
354 	reg = rd32(hw, hw->aq.arq.bal);  in i40e_config_arq_regs()
355 	if (reg != I40E_LO_DWORD(hw->aq.arq.desc_buf.pa))  in i40e_config_arq_regs()
441 	if (hw->aq.arq.count > 0) {  in i40e_init_arq()
454 	hw->aq.arq.next_to_use = 0;  in i40e_init_arq()
455 	hw->aq.arq.next_to_clean = 0;  in i40e_init_arq()
473 	hw->aq.arq.count = hw->aq.num_arq_entries;  in i40e_init_arq()
529 	if (hw->aq.arq.count == 0) {  in i40e_shutdown_arq()
535 	wr32(hw, hw->aq.arq.head, 0);  in i40e_shutdown_arq()
536 	wr32(hw, hw->aq.arq.tail, 0);  in i40e_shutdown_arq()
537 	wr32(hw, hw->aq.arq.len, 0);  in i40e_shutdown_arq()
538 	wr32(hw, hw->aq.arq.bal, 0);  in i40e_shutdown_arq()
539 	wr32(hw, hw->aq.arq.bah, 0);  in i40e_shutdown_arq()
541 	hw->aq.arq.count = 0; /* to indicate uninitialized queue */  in i40e_shutdown_arq()
563 	hw->aq.arq.next_to_use = 0;  in i40e_resume_aq()
564 	hw->aq.arq.next_to_clean = 0;  in i40e_resume_aq()
1071 	u16 ntc = hw->aq.arq.next_to_clean;  in i40e_clean_arq_element()
1085 	if (hw->aq.arq.count == 0) {  in i40e_clean_arq_element()
1094 		ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;  in i40e_clean_arq_element()
1096 		ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK;  in i40e_clean_arq_element()
1104 	desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc);  in i40e_clean_arq_element()
1124 			    hw->aq.arq.r.arq_bi[desc_idx].va,  in i40e_clean_arq_element()
1135 	bi = &hw->aq.arq.r.arq_bi[ntc];  in i40e_clean_arq_element()
1146 	wr32(hw, hw->aq.arq.tail, ntc);  in i40e_clean_arq_element()
1151 	hw->aq.arq.next_to_clean = ntc;  in i40e_clean_arq_element()
1152 	hw->aq.arq.next_to_use = ntu;  in i40e_clean_arq_element()
1158 		*pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);  in i40e_clean_arq_element()