Lines Matching +full:firmware +full:- +full:initialized
3 Copyright (c) 2013-2018, Intel Corporation
41 * i40e_adminq_init_regs - Initialize AdminQ registers
50 hw->aq.asq.tail = I40E_VF_ATQT1; in i40e_adminq_init_regs()
51 hw->aq.asq.head = I40E_VF_ATQH1; in i40e_adminq_init_regs()
52 hw->aq.asq.len = I40E_VF_ATQLEN1; in i40e_adminq_init_regs()
53 hw->aq.asq.bal = I40E_VF_ATQBAL1; in i40e_adminq_init_regs()
54 hw->aq.asq.bah = I40E_VF_ATQBAH1; in i40e_adminq_init_regs()
55 hw->aq.arq.tail = I40E_VF_ARQT1; in i40e_adminq_init_regs()
56 hw->aq.arq.head = I40E_VF_ARQH1; in i40e_adminq_init_regs()
57 hw->aq.arq.len = I40E_VF_ARQLEN1; in i40e_adminq_init_regs()
58 hw->aq.arq.bal = I40E_VF_ARQBAL1; in i40e_adminq_init_regs()
59 hw->aq.arq.bah = I40E_VF_ARQBAH1; in i40e_adminq_init_regs()
61 hw->aq.asq.tail = I40E_PF_ATQT; in i40e_adminq_init_regs()
62 hw->aq.asq.head = I40E_PF_ATQH; in i40e_adminq_init_regs()
63 hw->aq.asq.len = I40E_PF_ATQLEN; in i40e_adminq_init_regs()
64 hw->aq.asq.bal = I40E_PF_ATQBAL; in i40e_adminq_init_regs()
65 hw->aq.asq.bah = I40E_PF_ATQBAH; in i40e_adminq_init_regs()
66 hw->aq.arq.tail = I40E_PF_ARQT; in i40e_adminq_init_regs()
67 hw->aq.arq.head = I40E_PF_ARQH; in i40e_adminq_init_regs()
68 hw->aq.arq.len = I40E_PF_ARQLEN; in i40e_adminq_init_regs()
69 hw->aq.arq.bal = I40E_PF_ARQBAL; in i40e_adminq_init_regs()
70 hw->aq.arq.bah = I40E_PF_ARQBAH; in i40e_adminq_init_regs()
75 * i40e_alloc_adminq_asq_ring - Allocate Admin Queue send rings
82 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in i40e_alloc_adminq_asq_ring()
84 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
90 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in i40e_alloc_adminq_asq_ring()
91 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
94 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_alloc_adminq_asq_ring()
102 * i40e_alloc_adminq_arq_ring - Allocate Admin Queue receive rings
109 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in i40e_alloc_adminq_arq_ring()
111 (hw->aq.num_arq_entries * in i40e_alloc_adminq_arq_ring()
119 * i40e_free_adminq_asq - Free Admin Queue send rings
123 * and de-allocated
127 i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); in i40e_free_adminq_asq()
128 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_adminq_asq()
132 * i40e_free_adminq_arq - Free Admin Queue receive rings
136 * and de-allocated
140 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_adminq_arq()
144 * i40e_alloc_arq_bufs - Allocate pre-posted buffers for the receive queue
159 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head, in i40e_alloc_arq_bufs()
160 (hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem))); in i40e_alloc_arq_bufs()
163 hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va; in i40e_alloc_arq_bufs()
166 for (i = 0; i < hw->aq.num_arq_entries; i++) { in i40e_alloc_arq_bufs()
167 bi = &hw->aq.arq.r.arq_bi[i]; in i40e_alloc_arq_bufs()
170 hw->aq.arq_buf_size, in i40e_alloc_arq_bufs()
176 desc = I40E_ADMINQ_DESC(hw->aq.arq, i); in i40e_alloc_arq_bufs()
178 desc->flags = CPU_TO_LE16(I40E_AQ_FLAG_BUF); in i40e_alloc_arq_bufs()
179 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) in i40e_alloc_arq_bufs()
180 desc->flags |= CPU_TO_LE16(I40E_AQ_FLAG_LB); in i40e_alloc_arq_bufs()
181 desc->opcode = 0; in i40e_alloc_arq_bufs()
185 desc->datalen = CPU_TO_LE16((u16)bi->size); in i40e_alloc_arq_bufs()
186 desc->retval = 0; in i40e_alloc_arq_bufs()
187 desc->cookie_high = 0; in i40e_alloc_arq_bufs()
188 desc->cookie_low = 0; in i40e_alloc_arq_bufs()
189 desc->params.external.addr_high = in i40e_alloc_arq_bufs()
190 CPU_TO_LE32(I40E_HI_DWORD(bi->pa)); in i40e_alloc_arq_bufs()
191 desc->params.external.addr_low = in i40e_alloc_arq_bufs()
192 CPU_TO_LE32(I40E_LO_DWORD(bi->pa)); in i40e_alloc_arq_bufs()
193 desc->params.external.param0 = 0; in i40e_alloc_arq_bufs()
194 desc->params.external.param1 = 0; in i40e_alloc_arq_bufs()
202 i--; in i40e_alloc_arq_bufs()
203 for (; i >= 0; i--) in i40e_alloc_arq_bufs()
204 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_alloc_arq_bufs()
205 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_alloc_arq_bufs()
211 * i40e_alloc_asq_bufs - Allocate empty buffer structs for the send queue
221 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head, in i40e_alloc_asq_bufs()
222 (hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem))); in i40e_alloc_asq_bufs()
225 hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va; in i40e_alloc_asq_bufs()
228 for (i = 0; i < hw->aq.num_asq_entries; i++) { in i40e_alloc_asq_bufs()
229 bi = &hw->aq.asq.r.asq_bi[i]; in i40e_alloc_asq_bufs()
232 hw->aq.asq_buf_size, in i40e_alloc_asq_bufs()
242 i--; in i40e_alloc_asq_bufs()
243 for (; i >= 0; i--) in i40e_alloc_asq_bufs()
244 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_alloc_asq_bufs()
245 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_alloc_asq_bufs()
251 * i40e_free_arq_bufs - Free receive queue buffer info elements
259 for (i = 0; i < hw->aq.num_arq_entries; i++) in i40e_free_arq_bufs()
260 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_free_arq_bufs()
263 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_arq_bufs()
266 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_free_arq_bufs()
270 * i40e_free_asq_bufs - Free send queue buffer info elements
277 /* only unmap if the address is non-NULL */ in i40e_free_asq_bufs()
278 for (i = 0; i < hw->aq.num_asq_entries; i++) in i40e_free_asq_bufs()
279 if (hw->aq.asq.r.asq_bi[i].pa) in i40e_free_asq_bufs()
280 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_free_asq_bufs()
283 i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); in i40e_free_asq_bufs()
286 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_asq_bufs()
289 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_free_asq_bufs()
293 * i40e_config_asq_regs - configure ASQ registers
304 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs()
305 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs()
309 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
312 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
314 wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
315 wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
318 reg = rd32(hw, hw->aq.asq.bal); in i40e_config_asq_regs()
319 if (reg != I40E_LO_DWORD(hw->aq.asq.desc_buf.pa)) in i40e_config_asq_regs()
326 * i40e_config_arq_regs - ARQ register configuration
337 wr32(hw, hw->aq.arq.head, 0); in i40e_config_arq_regs()
338 wr32(hw, hw->aq.arq.tail, 0); in i40e_config_arq_regs()
342 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
345 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
347 wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
348 wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
350 /* Update tail in the HW to post pre-allocated buffers */ in i40e_config_arq_regs()
351 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in i40e_config_arq_regs()
354 reg = rd32(hw, hw->aq.arq.bal); in i40e_config_arq_regs()
355 if (reg != I40E_LO_DWORD(hw->aq.arq.desc_buf.pa)) in i40e_config_arq_regs()
362 * i40e_init_asq - main initialization routine for ASQ
367 * in the hw->aq structure:
368 * - hw->aq.num_asq_entries
369 * - hw->aq.arq_buf_size
378 if (hw->aq.asq.count > 0) { in i40e_init_asq()
379 /* queue already initialized */ in i40e_init_asq()
385 if ((hw->aq.num_asq_entries == 0) || in i40e_init_asq()
386 (hw->aq.asq_buf_size == 0)) { in i40e_init_asq()
391 hw->aq.asq.next_to_use = 0; in i40e_init_asq()
392 hw->aq.asq.next_to_clean = 0; in i40e_init_asq()
410 hw->aq.asq.count = hw->aq.num_asq_entries; in i40e_init_asq()
425 * i40e_init_arq - initialize ARQ
430 * in the hw->aq structure:
431 * - hw->aq.num_asq_entries
432 * - hw->aq.arq_buf_size
441 if (hw->aq.arq.count > 0) { in i40e_init_arq()
442 /* queue already initialized */ in i40e_init_arq()
448 if ((hw->aq.num_arq_entries == 0) || in i40e_init_arq()
449 (hw->aq.arq_buf_size == 0)) { in i40e_init_arq()
454 hw->aq.arq.next_to_use = 0; in i40e_init_arq()
455 hw->aq.arq.next_to_clean = 0; in i40e_init_arq()
473 hw->aq.arq.count = hw->aq.num_arq_entries; in i40e_init_arq()
484 * i40e_shutdown_asq - shutdown the ASQ
493 i40e_acquire_spinlock(&hw->aq.asq_spinlock); in i40e_shutdown_asq()
495 if (hw->aq.asq.count == 0) { in i40e_shutdown_asq()
500 /* Stop firmware AdminQ processing */ in i40e_shutdown_asq()
501 wr32(hw, hw->aq.asq.head, 0); in i40e_shutdown_asq()
502 wr32(hw, hw->aq.asq.tail, 0); in i40e_shutdown_asq()
503 wr32(hw, hw->aq.asq.len, 0); in i40e_shutdown_asq()
504 wr32(hw, hw->aq.asq.bal, 0); in i40e_shutdown_asq()
505 wr32(hw, hw->aq.asq.bah, 0); in i40e_shutdown_asq()
507 hw->aq.asq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_asq()
513 i40e_release_spinlock(&hw->aq.asq_spinlock); in i40e_shutdown_asq()
518 * i40e_shutdown_arq - shutdown ARQ
527 i40e_acquire_spinlock(&hw->aq.arq_spinlock); in i40e_shutdown_arq()
529 if (hw->aq.arq.count == 0) { in i40e_shutdown_arq()
534 /* Stop firmware AdminQ processing */ in i40e_shutdown_arq()
535 wr32(hw, hw->aq.arq.head, 0); in i40e_shutdown_arq()
536 wr32(hw, hw->aq.arq.tail, 0); in i40e_shutdown_arq()
537 wr32(hw, hw->aq.arq.len, 0); in i40e_shutdown_arq()
538 wr32(hw, hw->aq.arq.bal, 0); in i40e_shutdown_arq()
539 wr32(hw, hw->aq.arq.bah, 0); in i40e_shutdown_arq()
541 hw->aq.arq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_arq()
547 i40e_release_spinlock(&hw->aq.arq_spinlock); in i40e_shutdown_arq()
552 * i40e_resume_aq - resume AQ processing from 0
558 hw->aq.asq.next_to_use = 0; in i40e_resume_aq()
559 hw->aq.asq.next_to_clean = 0; in i40e_resume_aq()
563 hw->aq.arq.next_to_use = 0; in i40e_resume_aq()
564 hw->aq.arq.next_to_clean = 0; in i40e_resume_aq()
570 * i40e_set_hw_flags - set HW flags
575 struct i40e_adminq_info *aq = &hw->aq; in i40e_set_hw_flags()
577 hw->flags = 0; in i40e_set_hw_flags()
579 switch (hw->mac.type) { in i40e_set_hw_flags()
581 if (aq->api_maj_ver > 1 || in i40e_set_hw_flags()
582 (aq->api_maj_ver == 1 && in i40e_set_hw_flags()
583 aq->api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710)) { in i40e_set_hw_flags()
584 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; in i40e_set_hw_flags()
585 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_set_hw_flags()
587 hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE; in i40e_set_hw_flags()
591 hw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE | in i40e_set_hw_flags()
594 if (aq->api_maj_ver > 1 || in i40e_set_hw_flags()
595 (aq->api_maj_ver == 1 && in i40e_set_hw_flags()
596 aq->api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722)) in i40e_set_hw_flags()
597 hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; in i40e_set_hw_flags()
599 if (aq->api_maj_ver > 1 || in i40e_set_hw_flags()
600 (aq->api_maj_ver == 1 && in i40e_set_hw_flags()
601 aq->api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_X722)) in i40e_set_hw_flags()
602 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; in i40e_set_hw_flags()
604 if (aq->api_maj_ver > 1 || in i40e_set_hw_flags()
605 (aq->api_maj_ver == 1 && in i40e_set_hw_flags()
606 aq->api_min_ver >= I40E_MINOR_VER_FW_REQUEST_FEC_X722)) in i40e_set_hw_flags()
607 hw->flags |= I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE; in i40e_set_hw_flags()
614 /* Newer versions of firmware require lock when reading the NVM */ in i40e_set_hw_flags()
615 if (aq->api_maj_ver > 1 || in i40e_set_hw_flags()
616 (aq->api_maj_ver == 1 && in i40e_set_hw_flags()
617 aq->api_min_ver >= 5)) in i40e_set_hw_flags()
618 hw->flags |= I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK; in i40e_set_hw_flags()
620 if (aq->api_maj_ver > 1 || in i40e_set_hw_flags()
621 (aq->api_maj_ver == 1 && in i40e_set_hw_flags()
622 aq->api_min_ver >= 8)) { in i40e_set_hw_flags()
623 hw->flags |= I40E_HW_FLAG_FW_LLDP_PERSISTENT; in i40e_set_hw_flags()
624 hw->flags |= I40E_HW_FLAG_DROP_MODE; in i40e_set_hw_flags()
627 if (aq->api_maj_ver > 1 || in i40e_set_hw_flags()
628 (aq->api_maj_ver == 1 && in i40e_set_hw_flags()
629 aq->api_min_ver >= 9)) in i40e_set_hw_flags()
630 hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED; in i40e_set_hw_flags()
634 * i40e_init_adminq - main initialization routine for Admin Queue
638 * in the hw->aq structure:
639 * - hw->aq.num_asq_entries
640 * - hw->aq.num_arq_entries
641 * - hw->aq.arq_buf_size
642 * - hw->aq.asq_buf_size
646 struct i40e_adminq_info *aq = &hw->aq; in i40e_init_adminq()
655 if (aq->num_arq_entries == 0 || in i40e_init_adminq()
656 aq->num_asq_entries == 0 || in i40e_init_adminq()
657 aq->arq_buf_size == 0 || in i40e_init_adminq()
658 aq->asq_buf_size == 0) { in i40e_init_adminq()
662 i40e_init_spinlock(&aq->asq_spinlock); in i40e_init_adminq()
663 i40e_init_spinlock(&aq->arq_spinlock); in i40e_init_adminq()
669 hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT; in i40e_init_adminq()
681 /* VF has no need of firmware */ in i40e_init_adminq()
684 /* There are some cases where the firmware may not be quite ready in i40e_init_adminq()
690 &aq->fw_maj_ver, in i40e_init_adminq()
691 &aq->fw_min_ver, in i40e_init_adminq()
692 &aq->fw_build, in i40e_init_adminq()
693 &aq->api_maj_ver, in i40e_init_adminq()
694 &aq->api_min_ver, in i40e_init_adminq()
713 &hw->nvm.version); in i40e_init_adminq()
716 hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo; in i40e_init_adminq()
722 hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo; in i40e_init_adminq()
724 if (aq->api_maj_ver > I40E_FW_API_VERSION_MAJOR) { in i40e_init_adminq()
729 /* pre-emptive resource lock release */ in i40e_init_adminq()
731 hw->nvm_release_on_done = FALSE; in i40e_init_adminq()
732 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_init_adminq()
744 i40e_destroy_spinlock(&aq->asq_spinlock); in i40e_init_adminq()
745 i40e_destroy_spinlock(&aq->arq_spinlock); in i40e_init_adminq()
752 * i40e_shutdown_adminq - shutdown routine for the Admin Queue
764 i40e_destroy_spinlock(&hw->aq.asq_spinlock); in i40e_shutdown_adminq()
765 i40e_destroy_spinlock(&hw->aq.arq_spinlock); in i40e_shutdown_adminq()
767 if (hw->nvm_buff.va) in i40e_shutdown_adminq()
768 i40e_free_virt_mem(hw, &hw->nvm_buff); in i40e_shutdown_adminq()
774 * i40e_clean_asq - cleans Admin send queue
781 struct i40e_adminq_ring *asq = &(hw->aq.asq); in i40e_clean_asq()
783 u16 ntc = asq->next_to_clean; in i40e_clean_asq()
789 while (rd32(hw, hw->aq.asq.head) != ntc) { in i40e_clean_asq()
791 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in i40e_clean_asq()
793 if (details->callback) { in i40e_clean_asq()
795 (I40E_ADMINQ_CALLBACK)details->callback; in i40e_clean_asq()
803 if (ntc == asq->count) in i40e_clean_asq()
809 asq->next_to_clean = ntc; in i40e_clean_asq()
815 * i40e_asq_done - check if FW has processed the Admin Send Queue
818 * Returns TRUE if the firmware has processed all descriptors on the
826 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in i40e_asq_done()
831 * i40e_asq_send_command - send command to Admin Queue
855 i40e_acquire_spinlock(&hw->aq.asq_spinlock); in i40e_asq_send_command()
857 hw->aq.asq_last_status = I40E_AQ_RC_OK; in i40e_asq_send_command()
859 if (hw->aq.asq.count == 0) { in i40e_asq_send_command()
861 "AQTX: Admin queue not initialized.\n"); in i40e_asq_send_command()
866 val = rd32(hw, hw->aq.asq.head); in i40e_asq_send_command()
867 if (val >= hw->aq.num_asq_entries) { in i40e_asq_send_command()
874 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); in i40e_asq_send_command()
885 if (details->cookie) { in i40e_asq_send_command()
886 desc->cookie_high = in i40e_asq_send_command()
887 CPU_TO_LE32(I40E_HI_DWORD(details->cookie)); in i40e_asq_send_command()
888 desc->cookie_low = in i40e_asq_send_command()
889 CPU_TO_LE32(I40E_LO_DWORD(details->cookie)); in i40e_asq_send_command()
898 desc->flags &= ~CPU_TO_LE16(details->flags_dis); in i40e_asq_send_command()
899 desc->flags |= CPU_TO_LE16(details->flags_ena); in i40e_asq_send_command()
901 if (buff_size > hw->aq.asq_buf_size) { in i40e_asq_send_command()
910 if (details->postpone && !details->async) { in i40e_asq_send_command()
934 desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); in i40e_asq_send_command()
942 dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]); in i40e_asq_send_command()
944 i40e_memcpy(dma_buff->va, buff, buff_size, in i40e_asq_send_command()
946 desc_on_ring->datalen = CPU_TO_LE16(buff_size); in i40e_asq_send_command()
951 desc_on_ring->params.external.addr_high = in i40e_asq_send_command()
952 CPU_TO_LE32(I40E_HI_DWORD(dma_buff->pa)); in i40e_asq_send_command()
953 desc_on_ring->params.external.addr_low = in i40e_asq_send_command()
954 CPU_TO_LE32(I40E_LO_DWORD(dma_buff->pa)); in i40e_asq_send_command()
961 (hw->aq.asq.next_to_use)++; in i40e_asq_send_command()
962 if (hw->aq.asq.next_to_use == hw->aq.asq.count) in i40e_asq_send_command()
963 hw->aq.asq.next_to_use = 0; in i40e_asq_send_command()
964 if (!details->postpone) in i40e_asq_send_command()
965 wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); in i40e_asq_send_command()
970 if (!details->async && !details->postpone) { in i40e_asq_send_command()
981 } while (total_delay < hw->aq.asq_cmd_timeout); in i40e_asq_send_command()
989 i40e_memcpy(buff, dma_buff->va, buff_size, in i40e_asq_send_command()
991 retval = LE16_TO_CPU(desc->retval); in i40e_asq_send_command()
1008 hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval; in i40e_asq_send_command()
1016 if (details->wb_desc) in i40e_asq_send_command()
1017 i40e_memcpy(details->wb_desc, desc_on_ring, in i40e_asq_send_command()
1022 (!details->async && !details->postpone)) { in i40e_asq_send_command()
1023 if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) { in i40e_asq_send_command()
1035 i40e_release_spinlock(&hw->aq.asq_spinlock); in i40e_asq_send_command()
1040 * i40e_fill_default_direct_cmd_desc - AQ descriptor helper function
1052 desc->opcode = CPU_TO_LE16(opcode); in i40e_fill_default_direct_cmd_desc()
1053 desc->flags = CPU_TO_LE16(I40E_AQ_FLAG_SI); in i40e_fill_default_direct_cmd_desc()
1071 u16 ntc = hw->aq.arq.next_to_clean; in i40e_clean_arq_element()
1079 /* pre-clean the event info */ in i40e_clean_arq_element()
1080 i40e_memset(&e->desc, 0, sizeof(e->desc), I40E_NONDMA_MEM); in i40e_clean_arq_element()
1083 i40e_acquire_spinlock(&hw->aq.arq_spinlock); in i40e_clean_arq_element()
1085 if (hw->aq.arq.count == 0) { in i40e_clean_arq_element()
1087 "AQRX: Admin queue not initialized.\n"); in i40e_clean_arq_element()
1094 ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK; in i40e_clean_arq_element()
1096 ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK; in i40e_clean_arq_element()
1098 /* nothing to do - shouldn't need to update ring's values */ in i40e_clean_arq_element()
1104 desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc); in i40e_clean_arq_element()
1107 hw->aq.arq_last_status = in i40e_clean_arq_element()
1108 (enum i40e_admin_queue_err)LE16_TO_CPU(desc->retval); in i40e_clean_arq_element()
1109 flags = LE16_TO_CPU(desc->flags); in i40e_clean_arq_element()
1115 hw->aq.arq_last_status); in i40e_clean_arq_element()
1118 i40e_memcpy(&e->desc, desc, sizeof(struct i40e_aq_desc), in i40e_clean_arq_element()
1120 datalen = LE16_TO_CPU(desc->datalen); in i40e_clean_arq_element()
1121 e->msg_len = min(datalen, e->buf_len); in i40e_clean_arq_element()
1122 if (e->msg_buf != NULL && (e->msg_len != 0)) in i40e_clean_arq_element()
1123 i40e_memcpy(e->msg_buf, in i40e_clean_arq_element()
1124 hw->aq.arq.r.arq_bi[desc_idx].va, in i40e_clean_arq_element()
1125 e->msg_len, I40E_DMA_TO_NONDMA); in i40e_clean_arq_element()
1128 i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, e->msg_buf, in i40e_clean_arq_element()
1129 hw->aq.arq_buf_size); in i40e_clean_arq_element()
1135 bi = &hw->aq.arq.r.arq_bi[ntc]; in i40e_clean_arq_element()
1138 desc->flags = CPU_TO_LE16(I40E_AQ_FLAG_BUF); in i40e_clean_arq_element()
1139 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) in i40e_clean_arq_element()
1140 desc->flags |= CPU_TO_LE16(I40E_AQ_FLAG_LB); in i40e_clean_arq_element()
1141 desc->datalen = CPU_TO_LE16((u16)bi->size); in i40e_clean_arq_element()
1142 desc->params.external.addr_high = CPU_TO_LE32(I40E_HI_DWORD(bi->pa)); in i40e_clean_arq_element()
1143 desc->params.external.addr_low = CPU_TO_LE32(I40E_LO_DWORD(bi->pa)); in i40e_clean_arq_element()
1146 wr32(hw, hw->aq.arq.tail, ntc); in i40e_clean_arq_element()
1149 if (ntc == hw->aq.num_arq_entries) in i40e_clean_arq_element()
1151 hw->aq.arq.next_to_clean = ntc; in i40e_clean_arq_element()
1152 hw->aq.arq.next_to_use = ntu; in i40e_clean_arq_element()
1154 i40e_nvmupd_check_wait_event(hw, LE16_TO_CPU(e->desc.opcode), &e->desc); in i40e_clean_arq_element()
1158 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); in i40e_clean_arq_element()
1160 i40e_release_spinlock(&hw->aq.arq_spinlock); in i40e_clean_arq_element()