Lines Matching refs:reg_val
2088 u32 reg_val; in ixgbe_setup_kr_speed_x550em() local
2092 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_kr_speed_x550em()
2096 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; in ixgbe_setup_kr_speed_x550em()
2097 reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR | in ixgbe_setup_kr_speed_x550em()
2102 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR; in ixgbe_setup_kr_speed_x550em()
2106 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX; in ixgbe_setup_kr_speed_x550em()
2110 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_kr_speed_x550em()
2116 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_kr_speed_x550em()
2121 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; in ixgbe_setup_kr_speed_x550em()
2122 reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN; in ixgbe_setup_kr_speed_x550em()
2123 reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; in ixgbe_setup_kr_speed_x550em()
2124 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; in ixgbe_setup_kr_speed_x550em()
2125 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; in ixgbe_setup_kr_speed_x550em()
2129 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_kr_speed_x550em()
2568 u16 reg_slice, reg_val; in ixgbe_setup_mac_link_sfp_x550em() local
2592 reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1; in ixgbe_setup_mac_link_sfp_x550em()
2594 reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1; in ixgbe_setup_mac_link_sfp_x550em()
2596 reg_val); in ixgbe_setup_mac_link_sfp_x550em()
2612 u32 reg_val; in ixgbe_setup_sfi_x550a() local
2617 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_sfi_x550a()
2621 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; in ixgbe_setup_sfi_x550a()
2622 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; in ixgbe_setup_sfi_x550a()
2623 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; in ixgbe_setup_sfi_x550a()
2624 reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; in ixgbe_setup_sfi_x550a()
2629 reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_10G; in ixgbe_setup_sfi_x550a()
2632 reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_1G; in ixgbe_setup_sfi_x550a()
2641 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_sfi_x550a()
2764 u32 reg_val; in ixgbe_setup_ixfi_x550em_x() local
2769 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em_x()
2772 reg_val |= IXGBE_KRM_RX_TRN_LINKUP_CTRL_CONV_WO_PROTOCOL; in ixgbe_setup_ixfi_x550em_x()
2775 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em_x()
2782 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em_x()
2785 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_C0_EN; in ixgbe_setup_ixfi_x550em_x()
2786 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN; in ixgbe_setup_ixfi_x550em_x()
2787 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN; in ixgbe_setup_ixfi_x550em_x()
2790 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em_x()
2795 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em_x()
2798 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_C0_EN; in ixgbe_setup_ixfi_x550em_x()
2799 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN; in ixgbe_setup_ixfi_x550em_x()
2800 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN; in ixgbe_setup_ixfi_x550em_x()
2803 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em_x()
2810 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em_x()
2813 reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_OVRRD_EN; in ixgbe_setup_ixfi_x550em_x()
2814 reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CZERO_EN; in ixgbe_setup_ixfi_x550em_x()
2815 reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CPLUS1_OVRRD_EN; in ixgbe_setup_ixfi_x550em_x()
2816 reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CMINUS1_OVRRD_EN; in ixgbe_setup_ixfi_x550em_x()
2819 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em_x()
2835 u32 reg_val; in ixgbe_setup_ixfi_x550em() local
2844 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em()
2848 reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; in ixgbe_setup_ixfi_x550em()
2849 reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK; in ixgbe_setup_ixfi_x550em()
2854 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G; in ixgbe_setup_ixfi_x550em()
2857 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G; in ixgbe_setup_ixfi_x550em()
2866 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
2993 u32 reg_val; in ixgbe_setup_phy_loopback_x550em() local
2998 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_phy_loopback_x550em()
3001 reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; in ixgbe_setup_phy_loopback_x550em()
3002 reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK; in ixgbe_setup_phy_loopback_x550em()
3003 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G; in ixgbe_setup_phy_loopback_x550em()
3006 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_phy_loopback_x550em()
3013 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_phy_loopback_x550em()
3016 reg_val |= IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_32B; in ixgbe_setup_phy_loopback_x550em()
3017 reg_val |= IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_KRPCS; in ixgbe_setup_phy_loopback_x550em()
3020 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_phy_loopback_x550em()
3027 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_phy_loopback_x550em()
3030 reg_val |= IXGBE_KRM_PMD_DFX_BURNIN_TX_RX_KR_LB_MASK; in ixgbe_setup_phy_loopback_x550em()
3033 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_phy_loopback_x550em()
3040 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_phy_loopback_x550em()
3043 reg_val |= IXGBE_KRM_RX_TRN_LINKUP_CTRL_PROTOCOL_BYPASS; in ixgbe_setup_phy_loopback_x550em()
3046 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_phy_loopback_x550em()
3861 u32 pause, asm_dir, reg_val; in ixgbe_setup_fc_X550em() local
3915 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_fc_X550em()
3918 reg_val &= ~(IXGBE_KRM_AN_CNTL_1_SYM_PAUSE | in ixgbe_setup_fc_X550em()
3921 reg_val |= IXGBE_KRM_AN_CNTL_1_SYM_PAUSE; in ixgbe_setup_fc_X550em()
3923 reg_val |= IXGBE_KRM_AN_CNTL_1_ASM_PAUSE; in ixgbe_setup_fc_X550em()
3926 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_fc_X550em()