Lines Matching full:hw

39 static void ixgbe_i2c_start(struct ixgbe_hw *hw);
40 static void ixgbe_i2c_stop(struct ixgbe_hw *hw);
41 static void ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
42 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
43 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
44 static void ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
45 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
46 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
47 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
48 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
49 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
50 static s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
55 * @hw: pointer to the hardware structure
60 static s32 ixgbe_out_i2c_byte_ack(struct ixgbe_hw *hw, u8 byte) in ixgbe_out_i2c_byte_ack() argument
64 status = ixgbe_clock_out_i2c_byte(hw, byte); in ixgbe_out_i2c_byte_ack()
67 return ixgbe_get_i2c_ack(hw); in ixgbe_out_i2c_byte_ack()
72 * @hw: pointer to the hardware structure
77 static s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte) in ixgbe_in_i2c_byte_ack() argument
79 ixgbe_clock_in_i2c_byte(hw, byte); in ixgbe_in_i2c_byte_ack()
81 return ixgbe_clock_out_i2c_bit(hw, false); in ixgbe_in_i2c_byte_ack()
101 * @hw: pointer to the hardware structure
109 s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg, in ixgbe_read_i2c_combined_generic_int() argument
112 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
125 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_combined_generic_int()
127 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
129 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_read_i2c_combined_generic_int()
132 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_read_i2c_combined_generic_int()
135 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_read_i2c_combined_generic_int()
138 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_read_i2c_combined_generic_int()
141 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
143 if (ixgbe_out_i2c_byte_ack(hw, addr | 1)) in ixgbe_read_i2c_combined_generic_int()
146 if (ixgbe_in_i2c_byte_ack(hw, &high_bits)) in ixgbe_read_i2c_combined_generic_int()
149 if (ixgbe_in_i2c_byte_ack(hw, &low_bits)) in ixgbe_read_i2c_combined_generic_int()
152 ixgbe_clock_in_i2c_byte(hw, &csum_byte); in ixgbe_read_i2c_combined_generic_int()
154 if (ixgbe_clock_out_i2c_bit(hw, false)) in ixgbe_read_i2c_combined_generic_int()
156 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_combined_generic_int()
158 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
163 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_combined_generic_int()
165 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
178 * @hw: pointer to the hardware structure
186 s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg, in ixgbe_write_i2c_combined_generic_int() argument
189 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_combined_generic_int()
201 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_combined_generic_int()
203 ixgbe_i2c_start(hw); in ixgbe_write_i2c_combined_generic_int()
205 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_write_i2c_combined_generic_int()
208 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_write_i2c_combined_generic_int()
211 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
214 if (ixgbe_out_i2c_byte_ack(hw, val >> 8)) in ixgbe_write_i2c_combined_generic_int()
217 if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
220 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_write_i2c_combined_generic_int()
222 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_combined_generic_int()
224 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
228 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_combined_generic_int()
230 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
243 * @hw: pointer to the hardware structure
247 s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw) in ixgbe_init_phy_ops_generic() argument
249 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_generic()
281 * @hw: pointer to hardware structure
286 static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr) in ixgbe_probe_phy() argument
290 if (!ixgbe_validate_phy_addr(hw, phy_addr)) { in ixgbe_probe_phy()
296 if (ixgbe_get_phy_id(hw)) in ixgbe_probe_phy()
299 hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id); in ixgbe_probe_phy()
301 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_probe_phy()
302 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_probe_phy()
307 hw->phy.type = ixgbe_phy_cu_unknown; in ixgbe_probe_phy()
309 hw->phy.type = ixgbe_phy_generic; in ixgbe_probe_phy()
317 * @hw: pointer to hardware structure
321 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw) in ixgbe_identify_phy_generic() argument
328 if (!hw->phy.phy_semaphore_mask) { in ixgbe_identify_phy_generic()
329 if (hw->bus.lan_id) in ixgbe_identify_phy_generic()
330 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; in ixgbe_identify_phy_generic()
332 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; in ixgbe_identify_phy_generic()
335 if (hw->phy.type != ixgbe_phy_unknown) in ixgbe_identify_phy_generic()
338 if (hw->phy.nw_mng_if_sel) { in ixgbe_identify_phy_generic()
339 phy_addr = (hw->phy.nw_mng_if_sel & in ixgbe_identify_phy_generic()
342 if (ixgbe_probe_phy(hw, phy_addr)) in ixgbe_identify_phy_generic()
349 if (ixgbe_probe_phy(hw, phy_addr)) { in ixgbe_identify_phy_generic()
360 hw->phy.addr = 0; in ixgbe_identify_phy_generic()
367 * @hw: pointer to the hardware structure
374 s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw) in ixgbe_check_reset_blocked() argument
381 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_check_reset_blocked()
384 mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); in ixgbe_check_reset_blocked()
396 * @hw: pointer to hardware structure
400 bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr) in ixgbe_validate_phy_addr() argument
407 hw->phy.addr = phy_addr; in ixgbe_validate_phy_addr()
408 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, in ixgbe_validate_phy_addr()
421 * @hw: pointer to hardware structure
424 s32 ixgbe_get_phy_id(struct ixgbe_hw *hw) in ixgbe_get_phy_id() argument
432 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, in ixgbe_get_phy_id()
437 hw->phy.id = (u32)(phy_id_high << 16); in ixgbe_get_phy_id()
438 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW, in ixgbe_get_phy_id()
441 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
442 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
492 * @hw: pointer to hardware structure
494 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw) in ixgbe_reset_phy_generic() argument
502 if (hw->phy.type == ixgbe_phy_unknown) in ixgbe_reset_phy_generic()
503 status = ixgbe_identify_phy_generic(hw); in ixgbe_reset_phy_generic()
505 if (status != IXGBE_SUCCESS || hw->phy.type == ixgbe_phy_none) in ixgbe_reset_phy_generic()
509 if (!hw->phy.reset_if_overtemp && in ixgbe_reset_phy_generic()
510 (IXGBE_ERR_OVERTEMP == hw->phy.ops.check_overtemp(hw))) in ixgbe_reset_phy_generic()
514 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_generic()
521 hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, in ixgbe_reset_phy_generic()
532 if (hw->phy.type == ixgbe_phy_x550em_ext_t) { in ixgbe_reset_phy_generic()
533 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
545 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
571 * @hw: pointer to hardware structure
573 void ixgbe_restart_auto_neg(struct ixgbe_hw *hw) in ixgbe_restart_auto_neg() argument
578 if (ixgbe_check_reset_blocked(hw)) in ixgbe_restart_auto_neg()
582 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, in ixgbe_restart_auto_neg()
585 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, in ixgbe_restart_auto_neg()
592 * @hw: pointer to hardware structure
597 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument
605 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
608 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
618 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
636 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
639 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
649 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
664 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_read_phy_reg_mdi()
674 * @hw: pointer to hardware structure
679 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument
683 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_read_phy_reg_generic()
687 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_read_phy_reg_generic()
690 status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); in ixgbe_read_phy_reg_generic()
692 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_read_phy_reg_generic()
700 * @hw: pointer to hardware structure
705 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument
711 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
716 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
719 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
729 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
745 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
748 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
758 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
774 * @hw: pointer to hardware structure
779 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument
783 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_write_phy_reg_generic()
787 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == IXGBE_SUCCESS) { in ixgbe_write_phy_reg_generic()
788 status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
790 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_write_phy_reg_generic()
800 * @hw: pointer to hardware structure
804 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_generic() argument
813 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_generic()
816 hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_generic()
821 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) && in ixgbe_setup_phy_link_generic()
825 hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_generic()
829 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
833 if (hw->mac.type == ixgbe_mac_X550) { in ixgbe_setup_phy_link_generic()
836 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) && in ixgbe_setup_phy_link_generic()
842 if ((hw->phy.autoneg_advertised & in ixgbe_setup_phy_link_generic()
850 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) && in ixgbe_setup_phy_link_generic()
854 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
859 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, in ixgbe_setup_phy_link_generic()
865 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) && in ixgbe_setup_phy_link_generic()
869 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, in ixgbe_setup_phy_link_generic()
873 ixgbe_restart_auto_neg(hw); in ixgbe_setup_phy_link_generic()
879 * @hw: pointer to hardware structure
883 s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, in ixgbe_setup_phy_link_speed_generic() argument
895 hw->phy.autoneg_advertised = 0; in ixgbe_setup_phy_link_speed_generic()
898 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_phy_link_speed_generic()
901 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
904 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
907 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_phy_link_speed_generic()
910 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_phy_link_speed_generic()
913 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10_FULL; in ixgbe_setup_phy_link_speed_generic()
916 ixgbe_setup_phy_link(hw); in ixgbe_setup_phy_link_speed_generic()
923 * @hw: pointer to hardware structure
928 static s32 ixgbe_get_copper_speeds_supported(struct ixgbe_hw *hw) in ixgbe_get_copper_speeds_supported() argument
933 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY, in ixgbe_get_copper_speeds_supported()
940 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_get_copper_speeds_supported()
942 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_get_copper_speeds_supported()
944 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
946 switch (hw->mac.type) { in ixgbe_get_copper_speeds_supported()
948 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_get_copper_speeds_supported()
949 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_get_copper_speeds_supported()
953 hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
964 * @hw: pointer to hardware structure
968 s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, in ixgbe_get_copper_link_capabilities_generic() argument
977 if (!hw->phy.speeds_supported) in ixgbe_get_copper_link_capabilities_generic()
978 status = ixgbe_get_copper_speeds_supported(hw); in ixgbe_get_copper_link_capabilities_generic()
980 *speed = hw->phy.speeds_supported; in ixgbe_get_copper_link_capabilities_generic()
986 * @hw: pointer to hardware structure
993 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed, in ixgbe_check_phy_link_tnx() argument
1016 status = hw->phy.ops.read_reg(hw, in ixgbe_check_phy_link_tnx()
1037 * @hw: pointer to hardware structure
1041 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_tnx() argument
1050 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_tnx()
1054 hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_tnx()
1059 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_tnx()
1062 hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_tnx()
1069 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1074 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_tnx()
1077 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1084 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, in ixgbe_setup_phy_link_tnx()
1089 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_tnx()
1092 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, in ixgbe_setup_phy_link_tnx()
1097 ixgbe_restart_auto_neg(hw); in ixgbe_setup_phy_link_tnx()
1103 * @hw: pointer to hardware structure
1106 s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, in ixgbe_get_phy_firmware_version_tnx() argument
1113 status = hw->phy.ops.read_reg(hw, TNX_FW_REV, in ixgbe_get_phy_firmware_version_tnx()
1122 * @hw: pointer to hardware structure
1125 s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, in ixgbe_get_phy_firmware_version_generic() argument
1132 status = hw->phy.ops.read_reg(hw, AQ_FW_REV, in ixgbe_get_phy_firmware_version_generic()
1141 * @hw: pointer to hardware structure
1143 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw) in ixgbe_reset_phy_nl() argument
1155 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_nl()
1158 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, in ixgbe_reset_phy_nl()
1162 hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, in ixgbe_reset_phy_nl()
1167 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, in ixgbe_reset_phy_nl()
1181 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, in ixgbe_reset_phy_nl()
1186 ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc); in ixgbe_reset_phy_nl()
1192 ret_val = hw->eeprom.ops.read(hw, data_offset, &eword); in ixgbe_reset_phy_nl()
1207 ret_val = hw->eeprom.ops.read(hw, data_offset, in ixgbe_reset_phy_nl()
1213 ret_val = hw->eeprom.ops.read(hw, data_offset, in ixgbe_reset_phy_nl()
1217 hw->phy.ops.write_reg(hw, phy_offset, in ixgbe_reset_phy_nl()
1257 * @hw: pointer to hardware structure
1259 * Determines HW type and calls appropriate function.
1261 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_module_generic() argument
1267 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_identify_module_generic()
1269 status = ixgbe_identify_sfp_module_generic(hw); in ixgbe_identify_module_generic()
1273 status = ixgbe_identify_qsfp_module_generic(hw); in ixgbe_identify_module_generic()
1277 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_module_generic()
1287 * @hw: pointer to hardware structure
1291 s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_sfp_module_generic() argument
1295 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_sfp_module_generic()
1307 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) { in ixgbe_identify_sfp_module_generic()
1308 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1314 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_sfp_module_generic()
1316 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1324 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1327 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1334 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1340 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1363 if (hw->mac.type == ixgbe_mac_82598EB) { in ixgbe_identify_sfp_module_generic()
1365 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; in ixgbe_identify_sfp_module_generic()
1367 hw->phy.sfp_type = ixgbe_sfp_type_sr; in ixgbe_identify_sfp_module_generic()
1369 hw->phy.sfp_type = ixgbe_sfp_type_lr; in ixgbe_identify_sfp_module_generic()
1371 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1374 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1375 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1378 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1381 hw->phy.ops.read_i2c_eeprom( in ixgbe_identify_sfp_module_generic()
1382 hw, IXGBE_SFF_CABLE_SPEC_COMP, in ixgbe_identify_sfp_module_generic()
1386 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1387 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1390 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1393 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1399 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1400 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1403 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1406 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1407 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1410 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1413 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1414 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1417 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1420 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1421 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1424 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1427 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1428 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1431 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1434 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1438 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_sfp_module_generic()
1439 hw->phy.sfp_setup_needed = true; in ixgbe_identify_sfp_module_generic()
1442 hw->phy.multispeed_fiber = false; in ixgbe_identify_sfp_module_generic()
1449 hw->phy.multispeed_fiber = true; in ixgbe_identify_sfp_module_generic()
1452 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1453 hw->phy.id = identifier; in ixgbe_identify_sfp_module_generic()
1454 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1461 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1468 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1483 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1488 hw->phy.type = ixgbe_phy_sfp_ftl_active; in ixgbe_identify_sfp_module_generic()
1490 hw->phy.type = ixgbe_phy_sfp_ftl; in ixgbe_identify_sfp_module_generic()
1493 hw->phy.type = ixgbe_phy_sfp_avago; in ixgbe_identify_sfp_module_generic()
1496 hw->phy.type = ixgbe_phy_sfp_intel; in ixgbe_identify_sfp_module_generic()
1500 hw->phy.type = ixgbe_phy_sfp_passive_unknown; in ixgbe_identify_sfp_module_generic()
1502 hw->phy.type = ixgbe_phy_sfp_active_unknown; in ixgbe_identify_sfp_module_generic()
1504 hw->phy.type = ixgbe_phy_sfp_unknown; in ixgbe_identify_sfp_module_generic()
1518 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1519 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1520 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1521 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1522 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1523 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 || in ixgbe_identify_sfp_module_generic()
1524 hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core0 || in ixgbe_identify_sfp_module_generic()
1525 hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core1)) { in ixgbe_identify_sfp_module_generic()
1526 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1532 if (hw->mac.type == ixgbe_mac_82598EB) { in ixgbe_identify_sfp_module_generic()
1537 ixgbe_get_device_caps(hw, &enforce_sfp); in ixgbe_identify_sfp_module_generic()
1539 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1540 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1541 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1542 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1543 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1544 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 || in ixgbe_identify_sfp_module_generic()
1545 hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core0 || in ixgbe_identify_sfp_module_generic()
1546 hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core1)) { in ixgbe_identify_sfp_module_generic()
1548 if (hw->phy.type == ixgbe_phy_sfp_intel) { in ixgbe_identify_sfp_module_generic()
1551 if (hw->allow_unsupported_sfp == true) { in ixgbe_identify_sfp_module_generic()
1553 EWARN(hw, in ixgbe_identify_sfp_module_generic()
1562 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1576 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1577 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1578 hw->phy.id = 0; in ixgbe_identify_sfp_module_generic()
1579 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_sfp_module_generic()
1586 * @hw: pointer to hardware structure
1590 u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw) in ixgbe_get_supported_phy_sfp_layer_generic() argument
1598 hw->phy.ops.identify_sfp(hw); in ixgbe_get_supported_phy_sfp_layer_generic()
1599 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_get_supported_phy_sfp_layer_generic()
1602 switch (hw->phy.type) { in ixgbe_get_supported_phy_sfp_layer_generic()
1617 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_get_supported_phy_sfp_layer_generic()
1619 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_get_supported_phy_sfp_layer_generic()
1634 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_get_supported_phy_sfp_layer_generic()
1650 * @hw: pointer to hardware structure
1654 s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_qsfp_module_generic() argument
1658 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_qsfp_module_generic()
1672 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) { in ixgbe_identify_qsfp_module_generic()
1673 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1679 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_qsfp_module_generic()
1681 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, in ixgbe_identify_qsfp_module_generic()
1688 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1693 hw->phy.id = identifier; in ixgbe_identify_qsfp_module_generic()
1695 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1701 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1708 hw->phy.type = ixgbe_phy_qsfp_passive_unknown; in ixgbe_identify_qsfp_module_generic()
1709 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1710 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0; in ixgbe_identify_qsfp_module_generic()
1712 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1; in ixgbe_identify_qsfp_module_generic()
1715 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1716 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0; in ixgbe_identify_qsfp_module_generic()
1718 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1; in ixgbe_identify_qsfp_module_generic()
1726 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1730 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1734 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1747 hw->phy.type = ixgbe_phy_qsfp_active_unknown; in ixgbe_identify_qsfp_module_generic()
1748 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1749 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1752 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1756 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1762 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_qsfp_module_generic()
1763 hw->phy.sfp_setup_needed = true; in ixgbe_identify_qsfp_module_generic()
1766 hw->phy.multispeed_fiber = false; in ixgbe_identify_qsfp_module_generic()
1771 hw->phy.multispeed_fiber = true; in ixgbe_identify_qsfp_module_generic()
1776 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1783 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1790 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1803 hw->phy.type = ixgbe_phy_qsfp_intel; in ixgbe_identify_qsfp_module_generic()
1805 hw->phy.type = ixgbe_phy_qsfp_unknown; in ixgbe_identify_qsfp_module_generic()
1807 ixgbe_get_device_caps(hw, &enforce_sfp); in ixgbe_identify_qsfp_module_generic()
1810 if (hw->phy.type == ixgbe_phy_qsfp_intel) { in ixgbe_identify_qsfp_module_generic()
1813 if (hw->allow_unsupported_sfp == true) { in ixgbe_identify_qsfp_module_generic()
1815 EWARN(hw, in ixgbe_identify_qsfp_module_generic()
1823 hw->phy.type = in ixgbe_identify_qsfp_module_generic()
1837 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1838 hw->phy.id = 0; in ixgbe_identify_qsfp_module_generic()
1839 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_qsfp_module_generic()
1846 * @hw: pointer to hardware structure
1853 s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, in ixgbe_get_sfp_init_sequence_offsets() argument
1858 u16 sfp_type = hw->phy.sfp_type; in ixgbe_get_sfp_init_sequence_offsets()
1862 if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) in ixgbe_get_sfp_init_sequence_offsets()
1865 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_get_sfp_init_sequence_offsets()
1868 if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) && in ixgbe_get_sfp_init_sequence_offsets()
1869 (hw->phy.sfp_type == ixgbe_sfp_type_da_cu)) in ixgbe_get_sfp_init_sequence_offsets()
1890 if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) { in ixgbe_get_sfp_init_sequence_offsets()
1907 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1913 if (hw->eeprom.ops.read(hw, *list_offset, data_offset)) in ixgbe_get_sfp_init_sequence_offsets()
1923 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1943 * @hw: pointer to hardware structure
1949 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_generic() argument
1954 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_eeprom_generic()
1961 * @hw: pointer to hardware structure
1967 static s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_generic() argument
1970 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_sff8472_generic()
1977 * @hw: pointer to hardware structure
1983 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_eeprom_generic() argument
1988 return hw->phy.ops.write_i2c_byte(hw, byte_offset, in ixgbe_write_i2c_eeprom_generic()
1995 * @hw: pointer to hardware structure
1999 static bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr) in ixgbe_is_sfp_probe() argument
2003 hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_is_sfp_probe()
2010 * @hw: pointer to hardware structure
2019 static s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_int() argument
2025 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_byte_generic_int()
2031 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_read_i2c_byte_generic_int()
2033 if (ixgbe_is_sfp_probe(hw, byte_offset, dev_addr)) in ixgbe_read_i2c_byte_generic_int()
2037 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_byte_generic_int()
2040 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
2043 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_read_i2c_byte_generic_int()
2047 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2051 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_read_i2c_byte_generic_int()
2055 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2059 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
2062 status = ixgbe_clock_out_i2c_byte(hw, (dev_addr | 0x1)); in ixgbe_read_i2c_byte_generic_int()
2066 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2070 ixgbe_clock_in_i2c_byte(hw, data); in ixgbe_read_i2c_byte_generic_int()
2072 status = ixgbe_clock_out_i2c_bit(hw, nack); in ixgbe_read_i2c_byte_generic_int()
2076 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_byte_generic_int()
2078 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2082 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_byte_generic_int()
2084 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2099 * @hw: pointer to hardware structure
2107 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic() argument
2110 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic()
2116 * @hw: pointer to hardware structure
2124 s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_unlocked() argument
2127 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic_unlocked()
2133 * @hw: pointer to hardware structure
2142 static s32 ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_int() argument
2148 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_byte_generic_int()
2152 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != in ixgbe_write_i2c_byte_generic_int()
2157 ixgbe_i2c_start(hw); in ixgbe_write_i2c_byte_generic_int()
2159 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_write_i2c_byte_generic_int()
2163 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2167 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_write_i2c_byte_generic_int()
2171 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2175 status = ixgbe_clock_out_i2c_byte(hw, data); in ixgbe_write_i2c_byte_generic_int()
2179 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2183 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_byte_generic_int()
2185 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2189 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_byte_generic_int()
2198 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2205 * @hw: pointer to hardware structure
2213 s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic() argument
2216 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic()
2222 * @hw: pointer to hardware structure
2230 s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_unlocked() argument
2233 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic_unlocked()
2239 * @hw: pointer to hardware structure
2244 static void ixgbe_i2c_start(struct ixgbe_hw *hw) in ixgbe_i2c_start() argument
2246 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_start()
2250 i2cctl |= IXGBE_I2C_BB_EN_BY_MAC(hw); in ixgbe_i2c_start()
2253 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_start()
2254 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2259 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_start()
2264 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2273 * @hw: pointer to hardware structure
2279 static void ixgbe_i2c_stop(struct ixgbe_hw *hw) in ixgbe_i2c_stop() argument
2281 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_stop()
2282 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); in ixgbe_i2c_stop()
2283 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw); in ixgbe_i2c_stop()
2284 u32 bb_en_bit = IXGBE_I2C_BB_EN_BY_MAC(hw); in ixgbe_i2c_stop()
2289 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_stop()
2290 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_stop()
2295 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_stop()
2303 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_i2c_stop()
2304 IXGBE_WRITE_FLUSH(hw); in ixgbe_i2c_stop()
2310 * @hw: pointer to hardware structure
2315 static void ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) in ixgbe_clock_in_i2c_byte() argument
2324 ixgbe_clock_in_i2c_bit(hw, &bit); in ixgbe_clock_in_i2c_byte()
2331 * @hw: pointer to hardware structure
2336 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data) in ixgbe_clock_out_i2c_byte() argument
2347 status = ixgbe_clock_out_i2c_bit(hw, bit); in ixgbe_clock_out_i2c_byte()
2354 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_out_i2c_byte()
2355 i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); in ixgbe_clock_out_i2c_byte()
2356 i2cctl |= IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); in ixgbe_clock_out_i2c_byte()
2357 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
2358 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_out_i2c_byte()
2365 * @hw: pointer to hardware structure
2369 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) in ixgbe_get_i2c_ack() argument
2371 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); in ixgbe_get_i2c_ack()
2374 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_get_i2c_ack()
2381 i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); in ixgbe_get_i2c_ack()
2383 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_get_i2c_ack()
2384 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_ack()
2386 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2394 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_get_i2c_ack()
2395 ack = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_get_i2c_ack()
2407 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2417 * @hw: pointer to hardware structure
2422 static void ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) in ixgbe_clock_in_i2c_bit() argument
2424 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_in_i2c_bit()
2425 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); in ixgbe_clock_in_i2c_bit()
2430 i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); in ixgbe_clock_in_i2c_bit()
2432 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_in_i2c_bit()
2433 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_in_i2c_bit()
2435 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2440 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_in_i2c_bit()
2441 *data = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2443 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2451 * @hw: pointer to hardware structure
2456 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data) in ixgbe_clock_out_i2c_bit() argument
2459 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_clock_out_i2c_bit()
2463 status = ixgbe_set_i2c_data(hw, &i2cctl, data); in ixgbe_clock_out_i2c_bit()
2465 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2470 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2487 * @hw: pointer to hardware structure
2493 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_raise_i2c_clk() argument
2495 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw); in ixgbe_raise_i2c_clk()
2504 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2508 *i2cctl |= IXGBE_I2C_CLK_OUT_BY_MAC(hw); in ixgbe_raise_i2c_clk()
2510 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2511 IXGBE_WRITE_FLUSH(hw); in ixgbe_raise_i2c_clk()
2515 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_raise_i2c_clk()
2516 if (i2cctl_r & IXGBE_I2C_CLK_IN_BY_MAC(hw)) in ixgbe_raise_i2c_clk()
2523 * @hw: pointer to hardware structure
2529 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_lower_i2c_clk() argument
2533 *i2cctl &= ~(IXGBE_I2C_CLK_OUT_BY_MAC(hw)); in ixgbe_lower_i2c_clk()
2534 *i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw); in ixgbe_lower_i2c_clk()
2536 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_lower_i2c_clk()
2537 IXGBE_WRITE_FLUSH(hw); in ixgbe_lower_i2c_clk()
2545 * @hw: pointer to hardware structure
2552 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) in ixgbe_set_i2c_data() argument
2554 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); in ixgbe_set_i2c_data()
2560 *i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); in ixgbe_set_i2c_data()
2562 *i2cctl &= ~(IXGBE_I2C_DATA_OUT_BY_MAC(hw)); in ixgbe_set_i2c_data()
2565 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_set_i2c_data()
2566 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2575 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_set_i2c_data()
2576 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2580 *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_set_i2c_data()
2581 if (data != ixgbe_get_i2c_data(hw, i2cctl)) { in ixgbe_set_i2c_data()
2593 * @hw: pointer to hardware structure
2599 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_get_i2c_data() argument
2601 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); in ixgbe_get_i2c_data()
2608 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_get_i2c_data()
2609 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_data()
2613 if (*i2cctl & IXGBE_I2C_DATA_IN_BY_MAC(hw)) in ixgbe_get_i2c_data()
2623 * @hw: pointer to hardware structure
2628 void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw) in ixgbe_i2c_bus_clear() argument
2635 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2636 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); in ixgbe_i2c_bus_clear()
2638 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_bus_clear()
2641 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2646 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2652 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2655 ixgbe_i2c_stop(hw); in ixgbe_i2c_bus_clear()
2660 * @hw: pointer to hardware structure
2664 s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw) in ixgbe_tn_check_overtemp() argument
2671 if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM) in ixgbe_tn_check_overtemp()
2675 hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, in ixgbe_tn_check_overtemp()
2689 * @hw: pointer to hardware structure
2692 s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on) in ixgbe_set_copper_phy_power() argument
2697 if (!on && ixgbe_mng_present(hw)) in ixgbe_set_copper_phy_power()
2700 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL, in ixgbe_set_copper_phy_power()
2709 if (ixgbe_check_reset_blocked(hw)) in ixgbe_set_copper_phy_power()
2714 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL, in ixgbe_set_copper_phy_power()