Lines Matching +full:hw +full:- +full:device +full:- +full:address
2 SPDX-License-Identifier: BSD-3-Clause
43 * ixgbe_init_aci - initialization routine for Admin Command Interface
44 * @hw: pointer to the hardware structure
48 void ixgbe_init_aci(struct ixgbe_hw *hw) in ixgbe_init_aci() argument
50 ixgbe_init_lock(&hw->aci.lock); in ixgbe_init_aci()
54 * ixgbe_shutdown_aci - shutdown routine for Admin Command Interface
55 * @hw: pointer to the hardware structure
59 void ixgbe_shutdown_aci(struct ixgbe_hw *hw) in ixgbe_shutdown_aci() argument
61 ixgbe_destroy_lock(&hw->aci.lock); in ixgbe_shutdown_aci()
65 * ixgbe_should_retry_aci_send_cmd_execute - decide if ACI command should
88 * ixgbe_aci_send_cmd_execute - execute sending FW Admin Command to FW Admin
90 * @hw: pointer to the HW struct
99 * * - IXGBE_SUCCESS - success.
100 * * - IXGBE_ERR_ACI_DISABLED - CSR mechanism is not enabled.
101 * * - IXGBE_ERR_ACI_BUSY - CSR mechanism is busy.
102 * * - IXGBE_ERR_PARAM - buf_size is too big or
104 * * - IXGBE_ERR_ACI_TIMEOUT - Admin Command X command timeout.
105 * * - IXGBE_ERR_ACI_ERROR - Admin Command X invalid state of HICR register or
110 ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc, in ixgbe_aci_send_cmd_execute() argument
121 hw->aci.last_status = IXGBE_ACI_RC_OK; in ixgbe_aci_send_cmd_execute()
124 hicr = IXGBE_READ_REG(hw, PF_HICR); in ixgbe_aci_send_cmd_execute()
130 hw->aci.last_status = IXGBE_ACI_RC_EBUSY; in ixgbe_aci_send_cmd_execute()
134 opcode = desc->opcode; in ixgbe_aci_send_cmd_execute()
142 desc->flags |= IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_BUF); in ixgbe_aci_send_cmd_execute()
145 if (desc->flags & IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_BUF)) { in ixgbe_aci_send_cmd_execute()
161 tmp_buf = (u32*)ixgbe_malloc(hw, tmp_buf_size); in ixgbe_aci_send_cmd_execute()
175 desc->flags |= in ixgbe_aci_send_cmd_execute()
178 desc->datalen = IXGBE_CPU_TO_LE16(buf_size); in ixgbe_aci_send_cmd_execute()
180 if (desc->flags & IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD)) { in ixgbe_aci_send_cmd_execute()
182 IXGBE_WRITE_REG(hw, PF_HIBA(i), in ixgbe_aci_send_cmd_execute()
190 IXGBE_WRITE_REG(hw, PF_HIDA(i), in ixgbe_aci_send_cmd_execute()
196 hicr = IXGBE_READ_REG(hw, PF_HICR); in ixgbe_aci_send_cmd_execute()
198 IXGBE_WRITE_REG(hw, PF_HICR, hicr); in ixgbe_aci_send_cmd_execute()
202 hicr = IXGBE_READ_REG(hw, PF_HICR); in ixgbe_aci_send_cmd_execute()
213 hicr = IXGBE_READ_REG(hw, PF_HICR); in ixgbe_aci_send_cmd_execute()
224 raw_desc[i] = IXGBE_READ_REG(hw, PF_HIDA(i)); in ixgbe_aci_send_cmd_execute()
232 raw_desc[i] = IXGBE_READ_REG(hw, PF_HIDA_2(i)); in ixgbe_aci_send_cmd_execute()
251 if (desc->opcode != opcode && in ixgbe_aci_send_cmd_execute()
257 if (desc->retval != IXGBE_ACI_RC_OK) { in ixgbe_aci_send_cmd_execute()
258 hw->aci.last_status = (enum ixgbe_aci_err)desc->retval; in ixgbe_aci_send_cmd_execute()
264 if (valid_buf && (desc->flags & in ixgbe_aci_send_cmd_execute()
267 tmp_buf[i] = IXGBE_READ_REG(hw, PF_HIBA(i)); in ixgbe_aci_send_cmd_execute()
275 ixgbe_free(hw, tmp_buf); in ixgbe_aci_send_cmd_execute()
281 * ixgbe_aci_send_cmd - send FW Admin Command to FW Admin Command Interface
282 * @hw: pointer to the HW struct
294 s32 ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc, in ixgbe_aci_send_cmd() argument
305 opcode = IXGBE_LE16_TO_CPU(desc->opcode); in ixgbe_aci_send_cmd()
311 buf_cpy = (u8 *)ixgbe_malloc(hw, buf_size); in ixgbe_aci_send_cmd()
319 ixgbe_acquire_lock(&hw->aci.lock); in ixgbe_aci_send_cmd()
320 status = ixgbe_aci_send_cmd_execute(hw, desc, buf, buf_size); in ixgbe_aci_send_cmd()
321 last_status = hw->aci.last_status; in ixgbe_aci_send_cmd()
322 ixgbe_release_lock(&hw->aci.lock); in ixgbe_aci_send_cmd()
336 ixgbe_free(hw, buf_cpy); in ixgbe_aci_send_cmd()
342 * ixgbe_aci_check_event_pending - check if there are any pending events
343 * @hw: pointer to the HW struct
350 bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw) in ixgbe_aci_check_event_pending() argument
355 ep_bit_mask = hw->bus.func ? GL_FWSTS_EP_PF1 : GL_FWSTS_EP_PF0; in ixgbe_aci_check_event_pending()
358 fwsts = IXGBE_READ_REG(hw, GL_FWSTS); in ixgbe_aci_check_event_pending()
363 * ixgbe_aci_get_event - get an event from ACI
364 * @hw: pointer to the HW struct
375 s32 ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e, in ixgbe_aci_get_event() argument
381 if (!e || (!e->msg_buf && e->buf_len) || (e->msg_buf && !e->buf_len)) in ixgbe_aci_get_event()
384 ixgbe_acquire_lock(&hw->aci.lock); in ixgbe_aci_get_event()
387 if (!ixgbe_aci_check_event_pending(hw)) { in ixgbe_aci_get_event()
394 status = ixgbe_aci_send_cmd_execute(hw, &desc, e->msg_buf, e->buf_len); in ixgbe_aci_get_event()
405 e->msg_len = MIN_T(u16, IXGBE_LE16_TO_CPU(desc.datalen), e->buf_len); in ixgbe_aci_get_event()
407 memcpy(&e->desc, &desc, sizeof(e->desc)); in ixgbe_aci_get_event()
411 *pending = ixgbe_aci_check_event_pending(hw); in ixgbe_aci_get_event()
415 ixgbe_release_lock(&hw->aci.lock); in ixgbe_aci_get_event()
421 * ixgbe_fill_dflt_direct_cmd_desc - fill ACI descriptor with default values.
432 desc->opcode = IXGBE_CPU_TO_LE16(opcode); in ixgbe_fill_dflt_direct_cmd_desc()
433 desc->flags = IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_SI); in ixgbe_fill_dflt_direct_cmd_desc()
437 * ixgbe_aci_get_fw_ver - get the firmware version
438 * @hw: pointer to the HW struct
444 s32 ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw) in ixgbe_aci_get_fw_ver() argument
454 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_get_fw_ver()
457 hw->fw_branch = resp->fw_branch; in ixgbe_aci_get_fw_ver()
458 hw->fw_maj_ver = resp->fw_major; in ixgbe_aci_get_fw_ver()
459 hw->fw_min_ver = resp->fw_minor; in ixgbe_aci_get_fw_ver()
460 hw->fw_patch = resp->fw_patch; in ixgbe_aci_get_fw_ver()
461 hw->fw_build = IXGBE_LE32_TO_CPU(resp->fw_build); in ixgbe_aci_get_fw_ver()
462 hw->api_branch = resp->api_branch; in ixgbe_aci_get_fw_ver()
463 hw->api_maj_ver = resp->api_major; in ixgbe_aci_get_fw_ver()
464 hw->api_min_ver = resp->api_minor; in ixgbe_aci_get_fw_ver()
465 hw->api_patch = resp->api_patch; in ixgbe_aci_get_fw_ver()
472 * ixgbe_aci_send_driver_ver - send the driver version to firmware
473 * @hw: pointer to the HW struct
482 s32 ixgbe_aci_send_driver_ver(struct ixgbe_hw *hw, struct ixgbe_driver_ver *dv) in ixgbe_aci_send_driver_ver() argument
496 cmd->major_ver = dv->major_ver; in ixgbe_aci_send_driver_ver()
497 cmd->minor_ver = dv->minor_ver; in ixgbe_aci_send_driver_ver()
498 cmd->build_ver = dv->build_ver; in ixgbe_aci_send_driver_ver()
499 cmd->subbuild_ver = dv->subbuild_ver; in ixgbe_aci_send_driver_ver()
502 while (len < sizeof(dv->driver_string) && in ixgbe_aci_send_driver_ver()
503 IS_ASCII(dv->driver_string[len]) && dv->driver_string[len]) in ixgbe_aci_send_driver_ver()
506 return ixgbe_aci_send_cmd(hw, &desc, dv->driver_string, len); in ixgbe_aci_send_driver_ver()
510 * ixgbe_aci_req_res - request a common resource
511 * @hw: pointer to the HW struct
526 ixgbe_aci_req_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, in ixgbe_aci_req_res() argument
538 cmd_resp->res_id = IXGBE_CPU_TO_LE16(res); in ixgbe_aci_req_res()
539 cmd_resp->access_type = IXGBE_CPU_TO_LE16(access); in ixgbe_aci_req_res()
540 cmd_resp->res_number = IXGBE_CPU_TO_LE32(sdp_number); in ixgbe_aci_req_res()
541 cmd_resp->timeout = IXGBE_CPU_TO_LE32(*timeout); in ixgbe_aci_req_res()
544 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_req_res()
552 if (!status || hw->aci.last_status == IXGBE_ACI_RC_EBUSY) in ixgbe_aci_req_res()
553 *timeout = IXGBE_LE32_TO_CPU(cmd_resp->timeout); in ixgbe_aci_req_res()
559 * ixgbe_aci_release_res - release a common resource using ACI
560 * @hw: pointer to the HW struct
569 ixgbe_aci_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, in ixgbe_aci_release_res() argument
579 cmd->res_id = IXGBE_CPU_TO_LE16(res); in ixgbe_aci_release_res()
580 cmd->res_number = IXGBE_CPU_TO_LE32(sdp_number); in ixgbe_aci_release_res()
582 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_release_res()
586 * ixgbe_acquire_res - acquire the ownership of a resource
587 * @hw: pointer to the HW structure
601 s32 ixgbe_acquire_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, in ixgbe_acquire_res() argument
610 status = ixgbe_aci_req_res(hw, res, access, 0, &res_timeout); in ixgbe_acquire_res()
630 retry_timeout - delay : 0; in ixgbe_acquire_res()
631 status = ixgbe_aci_req_res(hw, res, access, 0, &res_timeout); in ixgbe_acquire_res()
647 * ixgbe_release_res - release a common resource
648 * @hw: pointer to the HW structure
653 void ixgbe_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res) in ixgbe_release_res() argument
658 status = ixgbe_aci_release_res(hw, res, 0); in ixgbe_release_res()
666 status = ixgbe_aci_release_res(hw, res, 0); in ixgbe_release_res()
672 * ixgbe_parse_common_caps - Parse common device/function capabilities
673 * @hw: pointer to the HW struct
685 ixgbe_parse_common_caps(struct ixgbe_hw *hw, struct ixgbe_hw_common_caps *caps, in ixgbe_parse_common_caps() argument
689 u32 logical_id = IXGBE_LE32_TO_CPU(elem->logical_id); in ixgbe_parse_common_caps()
690 u32 phys_id = IXGBE_LE32_TO_CPU(elem->phys_id); in ixgbe_parse_common_caps()
691 u32 number = IXGBE_LE32_TO_CPU(elem->number); in ixgbe_parse_common_caps()
692 u16 cap = IXGBE_LE16_TO_CPU(elem->cap); in ixgbe_parse_common_caps()
695 UNREFERENCED_1PARAMETER(hw); in ixgbe_parse_common_caps()
699 caps->valid_functions = number; in ixgbe_parse_common_caps()
702 caps->sr_iov_1_1 = (number == 1); in ixgbe_parse_common_caps()
705 caps->vmdq = (number == 1); in ixgbe_parse_common_caps()
708 caps->dcb = (number == 1); in ixgbe_parse_common_caps()
709 caps->active_tc_bitmap = logical_id; in ixgbe_parse_common_caps()
710 caps->maxtc = phys_id; in ixgbe_parse_common_caps()
713 caps->rss_table_size = number; in ixgbe_parse_common_caps()
714 caps->rss_table_entry_width = logical_id; in ixgbe_parse_common_caps()
717 caps->num_rxq = number; in ixgbe_parse_common_caps()
718 caps->rxq_first_id = phys_id; in ixgbe_parse_common_caps()
721 caps->num_txq = number; in ixgbe_parse_common_caps()
722 caps->txq_first_id = phys_id; in ixgbe_parse_common_caps()
725 caps->num_msix_vectors = number; in ixgbe_parse_common_caps()
726 caps->msix_vector_first_id = phys_id; in ixgbe_parse_common_caps()
731 caps->sec_rev_disabled = in ixgbe_parse_common_caps()
734 caps->update_disabled = in ixgbe_parse_common_caps()
737 caps->nvm_unified_update = in ixgbe_parse_common_caps()
740 caps->netlist_auth = in ixgbe_parse_common_caps()
745 caps->max_mtu = number; in ixgbe_parse_common_caps()
748 caps->pcie_reset_avoidance = (number > 0); in ixgbe_parse_common_caps()
751 caps->reset_restrict_support = (number == 1); in ixgbe_parse_common_caps()
758 u8 index = cap - IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG0; in ixgbe_parse_common_caps()
760 caps->ext_topo_dev_img_ver_high[index] = number; in ixgbe_parse_common_caps()
761 caps->ext_topo_dev_img_ver_low[index] = logical_id; in ixgbe_parse_common_caps()
762 caps->ext_topo_dev_img_part_num[index] = in ixgbe_parse_common_caps()
765 caps->ext_topo_dev_img_load_en[index] = in ixgbe_parse_common_caps()
767 caps->ext_topo_dev_img_prog_en[index] = in ixgbe_parse_common_caps()
772 caps->orom_recovery_update = (number == 1); in ixgbe_parse_common_caps()
775 caps->next_cluster_id_support = (number == 1); in ixgbe_parse_common_caps()
777 prefix, caps->next_cluster_id_support); in ixgbe_parse_common_caps()
788 * ixgbe_hweight8 - count set bits among the 8 lowest bits
805 * ixgbe_hweight32 - count set bits among the 32 lowest bits
828 * ixgbe_parse_valid_functions_cap - Parse IXGBE_ACI_CAPS_VALID_FUNCTIONS caps
829 * @hw: pointer to the HW struct
830 * @dev_p: pointer to device capabilities structure
833 * Parse IXGBE_ACI_CAPS_VALID_FUNCTIONS for device capabilities.
836 ixgbe_parse_valid_functions_cap(struct ixgbe_hw *hw, in ixgbe_parse_valid_functions_cap() argument
840 u32 number = IXGBE_LE32_TO_CPU(cap->number); in ixgbe_parse_valid_functions_cap()
842 UNREFERENCED_1PARAMETER(hw); in ixgbe_parse_valid_functions_cap()
844 dev_p->num_funcs = ixgbe_hweight32(number); in ixgbe_parse_valid_functions_cap()
848 * ixgbe_parse_vf_dev_caps - Parse IXGBE_ACI_CAPS_VF device caps
849 * @hw: pointer to the HW struct
850 * @dev_p: pointer to device capabilities structure
853 * Parse IXGBE_ACI_CAPS_VF for device capabilities.
855 static void ixgbe_parse_vf_dev_caps(struct ixgbe_hw *hw, in ixgbe_parse_vf_dev_caps() argument
859 u32 number = IXGBE_LE32_TO_CPU(cap->number); in ixgbe_parse_vf_dev_caps()
861 UNREFERENCED_1PARAMETER(hw); in ixgbe_parse_vf_dev_caps()
863 dev_p->num_vfs_exposed = number; in ixgbe_parse_vf_dev_caps()
867 * ixgbe_parse_vsi_dev_caps - Parse IXGBE_ACI_CAPS_VSI device caps
868 * @hw: pointer to the HW struct
869 * @dev_p: pointer to device capabilities structure
872 * Parse IXGBE_ACI_CAPS_VSI for device capabilities.
874 static void ixgbe_parse_vsi_dev_caps(struct ixgbe_hw *hw, in ixgbe_parse_vsi_dev_caps() argument
878 u32 number = IXGBE_LE32_TO_CPU(cap->number); in ixgbe_parse_vsi_dev_caps()
880 UNREFERENCED_1PARAMETER(hw); in ixgbe_parse_vsi_dev_caps()
882 dev_p->num_vsi_allocd_to_host = number; in ixgbe_parse_vsi_dev_caps()
886 * ixgbe_parse_fdir_dev_caps - Parse IXGBE_ACI_CAPS_FD device caps
887 * @hw: pointer to the HW struct
888 * @dev_p: pointer to device capabilities structure
891 * Parse IXGBE_ACI_CAPS_FD for device capabilities.
893 static void ixgbe_parse_fdir_dev_caps(struct ixgbe_hw *hw, in ixgbe_parse_fdir_dev_caps() argument
897 u32 number = IXGBE_LE32_TO_CPU(cap->number); in ixgbe_parse_fdir_dev_caps()
899 UNREFERENCED_1PARAMETER(hw); in ixgbe_parse_fdir_dev_caps()
901 dev_p->num_flow_director_fltr = number; in ixgbe_parse_fdir_dev_caps()
905 * ixgbe_parse_dev_caps - Parse device capabilities
906 * @hw: pointer to the HW struct
907 * @dev_p: pointer to device capabilities structure
908 * @buf: buffer containing the device capability records
911 * Helper device to parse device (0x000B) capabilities list. For
912 * capabilities shared between device and function, this relies on
916 * data into the device capabilities structured.
918 static void ixgbe_parse_dev_caps(struct ixgbe_hw *hw, in ixgbe_parse_dev_caps() argument
933 found = ixgbe_parse_common_caps(hw, &dev_p->common_cap, in ixgbe_parse_dev_caps()
938 ixgbe_parse_valid_functions_cap(hw, dev_p, in ixgbe_parse_dev_caps()
942 ixgbe_parse_vf_dev_caps(hw, dev_p, &cap_resp[i]); in ixgbe_parse_dev_caps()
945 ixgbe_parse_vsi_dev_caps(hw, dev_p, &cap_resp[i]); in ixgbe_parse_dev_caps()
948 ixgbe_parse_fdir_dev_caps(hw, dev_p, &cap_resp[i]); in ixgbe_parse_dev_caps()
960 * ixgbe_parse_vf_func_caps - Parse IXGBE_ACI_CAPS_VF function caps
961 * @hw: pointer to the HW struct
967 static void ixgbe_parse_vf_func_caps(struct ixgbe_hw *hw, in ixgbe_parse_vf_func_caps() argument
971 u32 logical_id = IXGBE_LE32_TO_CPU(cap->logical_id); in ixgbe_parse_vf_func_caps()
972 u32 number = IXGBE_LE32_TO_CPU(cap->number); in ixgbe_parse_vf_func_caps()
974 UNREFERENCED_1PARAMETER(hw); in ixgbe_parse_vf_func_caps()
976 func_p->num_allocd_vfs = number; in ixgbe_parse_vf_func_caps()
977 func_p->vf_base_id = logical_id; in ixgbe_parse_vf_func_caps()
981 * ixgbe_get_num_per_func - determine number of resources per PF
982 * @hw: pointer to the HW structure
991 static u32 ixgbe_get_num_per_func(struct ixgbe_hw *hw, u32 max) in ixgbe_get_num_per_func() argument
996 funcs = ixgbe_hweight8(hw->dev_caps.common_cap.valid_functions & in ixgbe_get_num_per_func()
1006 * ixgbe_parse_vsi_func_caps - Parse IXGBE_ACI_CAPS_VSI function caps
1007 * @hw: pointer to the HW struct
1013 static void ixgbe_parse_vsi_func_caps(struct ixgbe_hw *hw, in ixgbe_parse_vsi_func_caps() argument
1017 func_p->guar_num_vsi = ixgbe_get_num_per_func(hw, IXGBE_MAX_VSI); in ixgbe_parse_vsi_func_caps()
1021 * ixgbe_parse_func_caps - Parse function capabilities
1022 * @hw: pointer to the HW struct
1028 * capabilities shared between device and function, this relies on
1034 static void ixgbe_parse_func_caps(struct ixgbe_hw *hw, in ixgbe_parse_func_caps() argument
1047 ixgbe_parse_common_caps(hw, &func_p->common_cap, in ixgbe_parse_func_caps()
1052 ixgbe_parse_vf_func_caps(hw, func_p, &cap_resp[i]); in ixgbe_parse_func_caps()
1055 ixgbe_parse_vsi_func_caps(hw, func_p, &cap_resp[i]); in ixgbe_parse_func_caps()
1066 * ixgbe_aci_list_caps - query function/device capabilities
1067 * @hw: pointer to the HW struct
1071 * @opc: capabilities type to discover, device or function
1073 * Get the function (0x000A) or device (0x000B) capabilities description from
1086 s32 ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size, in ixgbe_aci_list_caps() argument
1100 status = ixgbe_aci_send_cmd(hw, &desc, buf, buf_size); in ixgbe_aci_list_caps()
1103 *cap_count = IXGBE_LE32_TO_CPU(cmd->count); in ixgbe_aci_list_caps()
1109 * ixgbe_discover_dev_caps - Read and extract device capabilities
1110 * @hw: pointer to the hardware structure
1111 * @dev_caps: pointer to device capabilities structure
1113 * Read the device capabilities and extract them into the dev_caps structure
1118 s32 ixgbe_discover_dev_caps(struct ixgbe_hw *hw, in ixgbe_discover_dev_caps() argument
1124 cbuf = (u8*)ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE); in ixgbe_discover_dev_caps()
1128 * device will return, we can simply send a 4KB buffer, the maximum in ixgbe_discover_dev_caps()
1134 status = ixgbe_aci_list_caps(hw, cbuf, IXGBE_ACI_MAX_BUFFER_SIZE, in ixgbe_discover_dev_caps()
1138 ixgbe_parse_dev_caps(hw, dev_caps, cbuf, cap_count); in ixgbe_discover_dev_caps()
1141 ixgbe_free(hw, cbuf); in ixgbe_discover_dev_caps()
1147 * ixgbe_discover_func_caps - Read and extract function capabilities
1148 * @hw: pointer to the hardware structure
1156 s32 ixgbe_discover_func_caps(struct ixgbe_hw *hw, in ixgbe_discover_func_caps() argument
1163 cbuf = (u8*)ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE); in ixgbe_discover_func_caps()
1167 * device will return, we can simply send a 4KB buffer, the maximum in ixgbe_discover_func_caps()
1173 status = ixgbe_aci_list_caps(hw, cbuf, IXGBE_ACI_MAX_BUFFER_SIZE, in ixgbe_discover_func_caps()
1177 ixgbe_parse_func_caps(hw, func_caps, cbuf, cap_count); in ixgbe_discover_func_caps()
1180 ixgbe_free(hw, cbuf); in ixgbe_discover_func_caps()
1186 * ixgbe_get_caps - get info about the HW
1187 * @hw: pointer to the hardware structure
1189 * Retrieve both device and function capabilities.
1193 s32 ixgbe_get_caps(struct ixgbe_hw *hw) in ixgbe_get_caps() argument
1197 status = ixgbe_discover_dev_caps(hw, &hw->dev_caps); in ixgbe_get_caps()
1201 return ixgbe_discover_func_caps(hw, &hw->func_caps); in ixgbe_get_caps()
1205 * ixgbe_aci_disable_rxen - disable RX
1206 * @hw: pointer to the HW struct
1212 s32 ixgbe_aci_disable_rxen(struct ixgbe_hw *hw) in ixgbe_aci_disable_rxen() argument
1217 UNREFERENCED_1PARAMETER(hw); in ixgbe_aci_disable_rxen()
1223 cmd->lport_num = (u8)hw->bus.func; in ixgbe_aci_disable_rxen()
1225 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_disable_rxen()
1229 * ixgbe_aci_get_phy_caps - returns PHY capabilities
1230 * @hw: pointer to the HW struct
1240 s32 ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode, in ixgbe_aci_get_phy_caps() argument
1256 cmd->param0 |= IXGBE_CPU_TO_LE16(IXGBE_ACI_GET_PHY_RQM); in ixgbe_aci_get_phy_caps()
1258 cmd->param0 |= IXGBE_CPU_TO_LE16(report_mode); in ixgbe_aci_get_phy_caps()
1259 status = ixgbe_aci_send_cmd(hw, &desc, pcaps, pcaps_size); in ixgbe_aci_get_phy_caps()
1263 hw->phy.phy_type_low = IXGBE_LE64_TO_CPU(pcaps->phy_type_low); in ixgbe_aci_get_phy_caps()
1264 hw->phy.phy_type_high = IXGBE_LE64_TO_CPU(pcaps->phy_type_high); in ixgbe_aci_get_phy_caps()
1265 memcpy(hw->link.link_info.module_type, &pcaps->module_type, in ixgbe_aci_get_phy_caps()
1266 sizeof(hw->link.link_info.module_type)); in ixgbe_aci_get_phy_caps()
1273 * ixgbe_phy_caps_equals_cfg - check if capabilities match the PHY config
1299 if (phy_caps->phy_type_low != phy_cfg->phy_type_low || in ixgbe_phy_caps_equals_cfg()
1300 phy_caps->phy_type_high != phy_cfg->phy_type_high || in ixgbe_phy_caps_equals_cfg()
1301 ((phy_caps->caps & caps_mask) != (phy_cfg->caps & cfg_mask)) || in ixgbe_phy_caps_equals_cfg()
1302 phy_caps->low_power_ctrl_an != phy_cfg->low_power_ctrl_an || in ixgbe_phy_caps_equals_cfg()
1303 phy_caps->eee_cap != phy_cfg->eee_cap || in ixgbe_phy_caps_equals_cfg()
1304 phy_caps->eeer_value != phy_cfg->eeer_value || in ixgbe_phy_caps_equals_cfg()
1305 phy_caps->link_fec_options != phy_cfg->link_fec_opt) in ixgbe_phy_caps_equals_cfg()
1312 * ixgbe_copy_phy_caps_to_cfg - Copy PHY ability data to configuration data
1326 cfg->phy_type_low = caps->phy_type_low; in ixgbe_copy_phy_caps_to_cfg()
1327 cfg->phy_type_high = caps->phy_type_high; in ixgbe_copy_phy_caps_to_cfg()
1328 cfg->caps = caps->caps; in ixgbe_copy_phy_caps_to_cfg()
1329 cfg->low_power_ctrl_an = caps->low_power_ctrl_an; in ixgbe_copy_phy_caps_to_cfg()
1330 cfg->eee_cap = caps->eee_cap; in ixgbe_copy_phy_caps_to_cfg()
1331 cfg->eeer_value = caps->eeer_value; in ixgbe_copy_phy_caps_to_cfg()
1332 cfg->link_fec_opt = caps->link_fec_options; in ixgbe_copy_phy_caps_to_cfg()
1333 cfg->module_compliance_enforcement = in ixgbe_copy_phy_caps_to_cfg()
1334 caps->module_compliance_enforcement; in ixgbe_copy_phy_caps_to_cfg()
1338 * ixgbe_aci_set_phy_cfg - set PHY configuration
1339 * @hw: pointer to the HW struct
1350 s32 ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw, in ixgbe_aci_set_phy_cfg() argument
1359 /* Ensure that only valid bits of cfg->caps can be turned on. */ in ixgbe_aci_set_phy_cfg()
1360 if (cfg->caps & ~IXGBE_ACI_PHY_ENA_VALID_MASK) { in ixgbe_aci_set_phy_cfg()
1361 cfg->caps &= IXGBE_ACI_PHY_ENA_VALID_MASK; in ixgbe_aci_set_phy_cfg()
1367 status = ixgbe_aci_send_cmd(hw, &desc, cfg, sizeof(*cfg)); in ixgbe_aci_set_phy_cfg()
1370 hw->phy.curr_user_phy_cfg = *cfg; in ixgbe_aci_set_phy_cfg()
1376 * ixgbe_aci_set_link_restart_an - set up link and restart AN
1377 * @hw: pointer to the HW struct
1380 * Function sets up the link and restarts the Auto-Negotiation over the link.
1384 s32 ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link) in ixgbe_aci_set_link_restart_an() argument
1393 cmd->cmd_flags = IXGBE_ACI_RESTART_AN_LINK_RESTART; in ixgbe_aci_set_link_restart_an()
1395 cmd->cmd_flags |= IXGBE_ACI_RESTART_AN_LINK_ENABLE; in ixgbe_aci_set_link_restart_an()
1397 cmd->cmd_flags &= ~IXGBE_ACI_RESTART_AN_LINK_ENABLE; in ixgbe_aci_set_link_restart_an()
1399 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_set_link_restart_an()
1403 * ixgbe_get_media_type_from_phy_type - Gets media type based on phy type
1404 * @hw: pointer to the HW struct
1414 ixgbe_get_media_type_from_phy_type(struct ixgbe_hw *hw) in ixgbe_get_media_type_from_phy_type() argument
1418 if (!hw) in ixgbe_get_media_type_from_phy_type()
1421 hw_link_info = &hw->link.link_info; in ixgbe_get_media_type_from_phy_type()
1422 if (hw_link_info->phy_type_low && hw_link_info->phy_type_high) in ixgbe_get_media_type_from_phy_type()
1426 if (hw_link_info->phy_type_low) { in ixgbe_get_media_type_from_phy_type()
1432 if (hw_link_info->phy_type_low == IXGBE_PHY_TYPE_LOW_1G_SGMII && in ixgbe_get_media_type_from_phy_type()
1433 (hw_link_info->module_type[IXGBE_ACI_MOD_TYPE_IDENT] == in ixgbe_get_media_type_from_phy_type()
1435 hw_link_info->module_type[IXGBE_ACI_MOD_TYPE_IDENT] == in ixgbe_get_media_type_from_phy_type()
1439 switch (hw_link_info->phy_type_low) { in ixgbe_get_media_type_from_phy_type()
1464 switch (hw_link_info->phy_type_high) { in ixgbe_get_media_type_from_phy_type()
1473 * ixgbe_update_link_info - update status of the HW network link
1474 * @hw: pointer to the HW struct
1476 * Update the status of the HW network link.
1480 s32 ixgbe_update_link_info(struct ixgbe_hw *hw) in ixgbe_update_link_info() argument
1486 if (!hw) in ixgbe_update_link_info()
1489 li = &hw->link.link_info; in ixgbe_update_link_info()
1491 status = ixgbe_aci_get_link_info(hw, true, NULL); in ixgbe_update_link_info()
1495 if (li->link_info & IXGBE_ACI_MEDIA_AVAILABLE) { in ixgbe_update_link_info()
1497 ixgbe_malloc(hw, sizeof(*pcaps)); in ixgbe_update_link_info()
1501 status = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_update_link_info()
1506 memcpy(li->module_type, &pcaps->module_type, in ixgbe_update_link_info()
1507 sizeof(li->module_type)); in ixgbe_update_link_info()
1509 ixgbe_free(hw, pcaps); in ixgbe_update_link_info()
1516 * ixgbe_get_link_status - get status of the HW network link
1517 * @hw: pointer to the HW struct
1526 s32 ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up) in ixgbe_get_link_status() argument
1530 if (!hw || !link_up) in ixgbe_get_link_status()
1533 if (hw->link.get_link_info) { in ixgbe_get_link_status()
1534 status = ixgbe_update_link_info(hw); in ixgbe_get_link_status()
1540 *link_up = hw->link.link_info.link_info & IXGBE_ACI_LINK_UP; in ixgbe_get_link_status()
1546 * ixgbe_aci_get_link_info - get the link status
1547 * @hw: pointer to the HW struct
1549 * @link: pointer to link status structure - optional
1557 s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse, in ixgbe_aci_get_link_info() argument
1569 if (!hw) in ixgbe_aci_get_link_info()
1572 li_old = &hw->link.link_info_old; in ixgbe_aci_get_link_info()
1573 li = &hw->link.link_info; in ixgbe_aci_get_link_info()
1574 hw_fc_info = &hw->fc; in ixgbe_aci_get_link_info()
1579 resp->cmd_flags = cmd_flags; in ixgbe_aci_get_link_info()
1581 status = ixgbe_aci_send_cmd(hw, &desc, &link_data, sizeof(link_data)); in ixgbe_aci_get_link_info()
1590 li->link_speed = IXGBE_LE16_TO_CPU(link_data.link_speed); in ixgbe_aci_get_link_info()
1591 li->phy_type_low = IXGBE_LE64_TO_CPU(link_data.phy_type_low); in ixgbe_aci_get_link_info()
1592 li->phy_type_high = IXGBE_LE64_TO_CPU(link_data.phy_type_high); in ixgbe_aci_get_link_info()
1593 li->link_info = link_data.link_info; in ixgbe_aci_get_link_info()
1594 li->link_cfg_err = link_data.link_cfg_err; in ixgbe_aci_get_link_info()
1595 li->an_info = link_data.an_info; in ixgbe_aci_get_link_info()
1596 li->ext_info = link_data.ext_info; in ixgbe_aci_get_link_info()
1597 li->max_frame_size = IXGBE_LE16_TO_CPU(link_data.max_frame_size); in ixgbe_aci_get_link_info()
1598 li->fec_info = link_data.cfg & IXGBE_ACI_FEC_MASK; in ixgbe_aci_get_link_info()
1599 li->topo_media_conflict = link_data.topo_media_conflict; in ixgbe_aci_get_link_info()
1600 li->pacing = link_data.cfg & (IXGBE_ACI_CFG_PACING_M | in ixgbe_aci_get_link_info()
1607 hw_fc_info->current_mode = ixgbe_fc_full; in ixgbe_aci_get_link_info()
1609 hw_fc_info->current_mode = ixgbe_fc_tx_pause; in ixgbe_aci_get_link_info()
1611 hw_fc_info->current_mode = ixgbe_fc_rx_pause; in ixgbe_aci_get_link_info()
1613 hw_fc_info->current_mode = ixgbe_fc_none; in ixgbe_aci_get_link_info()
1615 li->lse_ena = !!(resp->cmd_flags & IXGBE_ACI_LSE_IS_ENABLED); in ixgbe_aci_get_link_info()
1622 hw->link.get_link_info = false; in ixgbe_aci_get_link_info()
1628 * ixgbe_aci_set_event_mask - set event mask
1629 * @hw: pointer to the HW struct
1637 s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask) in ixgbe_aci_set_event_mask() argument
1646 cmd->event_mask = IXGBE_CPU_TO_LE16(mask); in ixgbe_aci_set_event_mask()
1647 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_set_event_mask()
1651 * ixgbe_configure_lse - enable/disable link status events
1652 * @hw: pointer to the HW struct
1661 s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask) in ixgbe_configure_lse() argument
1665 rc = ixgbe_aci_set_event_mask(hw, (u8)hw->bus.func, mask); in ixgbe_configure_lse()
1671 rc = ixgbe_aci_get_link_info(hw, activate, NULL); in ixgbe_configure_lse()
1679 * ixgbe_aci_get_netlist_node - get a node handle
1680 * @hw: pointer to the hw struct
1690 s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw, in ixgbe_aci_get_netlist_node() argument
1699 if (ixgbe_aci_send_cmd(hw, &desc, NULL, 0)) in ixgbe_aci_get_netlist_node()
1712 * ixgbe_find_netlist_node - find a node handle
1713 * @hw: pointer to the hw struct
1716 * @node_handle: output parameter if node found - optional
1724 s32 ixgbe_find_netlist_node(struct ixgbe_hw *hw, u8 node_type_ctx, in ixgbe_find_netlist_node() argument
1740 status = ixgbe_aci_get_netlist_node(hw, &cmd, in ixgbe_find_netlist_node()
1757 * ixgbe_aci_read_i2c - read I2C register value
1758 * @hw: pointer to the hw struct
1759 * @topo_addr: topology address for a device to communicate with
1760 * @bus_addr: 7-bit I2C bus address
1761 * @addr: I2C memory address (I2C offset) with up to 16 bits
1762 * @params: I2C parameters: bit [7] - Repeated start,
1764 * bit [4] - I2C address type, bits [3:0] - data size
1765 * to read (0-16 bytes)
1766 * @data: pointer to data (0 to 16 bytes) to be read from the I2C device
1772 s32 ixgbe_aci_read_i2c(struct ixgbe_hw *hw, in ixgbe_aci_read_i2c() argument
1790 cmd->i2c_bus_addr = IXGBE_CPU_TO_LE16(bus_addr); in ixgbe_aci_read_i2c()
1791 cmd->topo_addr = topo_addr; in ixgbe_aci_read_i2c()
1792 cmd->i2c_params = params; in ixgbe_aci_read_i2c()
1793 cmd->i2c_addr = addr; in ixgbe_aci_read_i2c()
1795 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_read_i2c()
1802 *data = resp->i2c_data[i]; in ixgbe_aci_read_i2c()
1811 * ixgbe_aci_write_i2c - write a value to I2C register
1812 * @hw: pointer to the hw struct
1813 * @topo_addr: topology address for a device to communicate with
1814 * @bus_addr: 7-bit I2C bus address
1815 * @addr: I2C memory address (I2C offset) with up to 16 bits
1816 * @params: I2C parameters: bit [4] - I2C address type, bits [3:0] - data size
1817 * to write (0-7 bytes)
1818 * @data: pointer to data (0 to 4 bytes) to be written to the I2C device
1824 s32 ixgbe_aci_write_i2c(struct ixgbe_hw *hw, in ixgbe_aci_write_i2c() argument
1842 cmd->i2c_bus_addr = IXGBE_CPU_TO_LE16(bus_addr); in ixgbe_aci_write_i2c()
1843 cmd->topo_addr = topo_addr; in ixgbe_aci_write_i2c()
1844 cmd->i2c_params = params; in ixgbe_aci_write_i2c()
1845 cmd->i2c_addr = addr; in ixgbe_aci_write_i2c()
1848 cmd->i2c_data[i] = *data; in ixgbe_aci_write_i2c()
1852 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_write_i2c()
1856 * ixgbe_aci_set_port_id_led - set LED value for the given port
1857 * @hw: pointer to the HW struct
1864 s32 ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode) in ixgbe_aci_set_port_id_led() argument
1873 cmd->lport_num = (u8)hw->bus.func; in ixgbe_aci_set_port_id_led()
1874 cmd->lport_num_valid = IXGBE_ACI_PORT_ID_PORT_NUM_VALID; in ixgbe_aci_set_port_id_led()
1877 cmd->ident_mode = IXGBE_ACI_PORT_IDENT_LED_ORIG; in ixgbe_aci_set_port_id_led()
1879 cmd->ident_mode = IXGBE_ACI_PORT_IDENT_LED_BLINK; in ixgbe_aci_set_port_id_led()
1881 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_set_port_id_led()
1885 * ixgbe_aci_set_gpio - set GPIO pin state
1886 * @hw: pointer to the hw struct
1896 s32 ixgbe_aci_set_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, in ixgbe_aci_set_gpio() argument
1904 cmd->gpio_ctrl_handle = IXGBE_CPU_TO_LE16(gpio_ctrl_handle); in ixgbe_aci_set_gpio()
1905 cmd->gpio_num = pin_idx; in ixgbe_aci_set_gpio()
1906 cmd->gpio_val = value ? 1 : 0; in ixgbe_aci_set_gpio()
1908 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_set_gpio()
1912 * ixgbe_aci_get_gpio - get GPIO pin state
1913 * @hw: pointer to the hw struct
1923 s32 ixgbe_aci_get_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, in ixgbe_aci_get_gpio() argument
1932 cmd->gpio_ctrl_handle = IXGBE_CPU_TO_LE16(gpio_ctrl_handle); in ixgbe_aci_get_gpio()
1933 cmd->gpio_num = pin_idx; in ixgbe_aci_get_gpio()
1935 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_get_gpio()
1939 *value = !!cmd->gpio_val; in ixgbe_aci_get_gpio()
1944 * ixgbe_aci_sff_eeprom - read/write SFF EEPROM
1945 * @hw: pointer to the HW struct
1947 * @bus_addr: I2C bus address of the eeprom (typically 0xA0, 0=topo default)
1948 * @mem_addr: I2C offset. lower 8 bits for address, 8 upper bits zero padding.
1951 * @data: pointer to data buffer to be read/written to the I2C device.
1952 * @length: 1-16 for read, 1 for write.
1959 s32 ixgbe_aci_sff_eeprom(struct ixgbe_hw *hw, u16 lport, u8 bus_addr, in ixgbe_aci_sff_eeprom() argument
1973 cmd->lport_num = (u8)(lport & 0xff); in ixgbe_aci_sff_eeprom()
1974 cmd->lport_num_valid = (u8)((lport >> 8) & 0x01); in ixgbe_aci_sff_eeprom()
1975 cmd->i2c_bus_addr = IXGBE_CPU_TO_LE16(((bus_addr >> 1) & in ixgbe_aci_sff_eeprom()
1980 cmd->i2c_offset = IXGBE_CPU_TO_LE16(mem_addr & 0xff); in ixgbe_aci_sff_eeprom()
1981 cmd->module_page = page; in ixgbe_aci_sff_eeprom()
1983 cmd->i2c_bus_addr |= IXGBE_CPU_TO_LE16(IXGBE_ACI_SFF_IS_WRITE); in ixgbe_aci_sff_eeprom()
1985 status = ixgbe_aci_send_cmd(hw, &desc, data, length); in ixgbe_aci_sff_eeprom()
1990 * ixgbe_aci_prog_topo_dev_nvm - program Topology Device NVM
1991 * @hw: pointer to the hardware structure
1992 * @topo_params: pointer to structure storing topology parameters for a device
1994 * Program Topology Device NVM using ACI command (0x06F2).
1998 s32 ixgbe_aci_prog_topo_dev_nvm(struct ixgbe_hw *hw, in ixgbe_aci_prog_topo_dev_nvm() argument
2008 memcpy(&cmd->topo_params, topo_params, sizeof(*topo_params)); in ixgbe_aci_prog_topo_dev_nvm()
2010 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_prog_topo_dev_nvm()
2014 * ixgbe_aci_read_topo_dev_nvm - read Topology Device NVM
2015 * @hw: pointer to the hardware structure
2016 * @topo_params: pointer to structure storing topology parameters for a device
2017 * @start_address: byte offset in the topology device NVM
2019 * @data_size: number of bytes to be read from the topology device NVM
2020 * Read Topology Device NVM (0x06F3)
2022 * Read Topology of Device NVM using ACI command (0x06F3).
2026 s32 ixgbe_aci_read_topo_dev_nvm(struct ixgbe_hw *hw, in ixgbe_aci_read_topo_dev_nvm() argument
2043 memcpy(&cmd->topo_params, topo_params, sizeof(*topo_params)); in ixgbe_aci_read_topo_dev_nvm()
2044 cmd->start_address = IXGBE_CPU_TO_LE32(start_address); in ixgbe_aci_read_topo_dev_nvm()
2046 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_read_topo_dev_nvm()
2050 memcpy(data, cmd->data_read, data_size); in ixgbe_aci_read_topo_dev_nvm()
2056 * ixgbe_acquire_nvm - Generic request for acquiring the NVM ownership
2057 * @hw: pointer to the HW structure
2064 s32 ixgbe_acquire_nvm(struct ixgbe_hw *hw, in ixgbe_acquire_nvm() argument
2070 fla = IXGBE_READ_REG(hw, GLNVM_FLA); in ixgbe_acquire_nvm()
2074 return ixgbe_acquire_res(hw, IXGBE_NVM_RES_ID, access, in ixgbe_acquire_nvm()
2079 * ixgbe_release_nvm - Generic request for releasing the NVM ownership
2080 * @hw: pointer to the HW structure
2084 void ixgbe_release_nvm(struct ixgbe_hw *hw) in ixgbe_release_nvm() argument
2089 fla = IXGBE_READ_REG(hw, GLNVM_FLA); in ixgbe_release_nvm()
2093 ixgbe_release_res(hw, IXGBE_NVM_RES_ID); in ixgbe_release_nvm()
2098 * ixgbe_aci_read_nvm - read NVM
2099 * @hw: pointer to the HW struct
2111 s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset, in ixgbe_aci_read_nvm() argument
2126 cmd->cmd_flags |= IXGBE_ACI_NVM_FLASH_ONLY; in ixgbe_aci_read_nvm()
2130 cmd->cmd_flags |= IXGBE_ACI_NVM_LAST_CMD; in ixgbe_aci_read_nvm()
2131 cmd->module_typeid = IXGBE_CPU_TO_LE16(module_typeid); in ixgbe_aci_read_nvm()
2132 cmd->offset_low = IXGBE_CPU_TO_LE16(offset & 0xFFFF); in ixgbe_aci_read_nvm()
2133 cmd->offset_high = (offset >> 16) & 0xFF; in ixgbe_aci_read_nvm()
2134 cmd->length = IXGBE_CPU_TO_LE16(length); in ixgbe_aci_read_nvm()
2136 return ixgbe_aci_send_cmd(hw, &desc, data, length); in ixgbe_aci_read_nvm()
2140 * ixgbe_aci_erase_nvm - erase NVM sector
2141 * @hw: pointer to the HW struct
2148 s32 ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid) in ixgbe_aci_erase_nvm() argument
2158 status = ixgbe_aci_read_nvm(hw, 0, 2 * module_typeid + 2, 2, &len, true, in ixgbe_aci_erase_nvm()
2167 cmd->module_typeid = IXGBE_CPU_TO_LE16(module_typeid); in ixgbe_aci_erase_nvm()
2168 cmd->length = len; in ixgbe_aci_erase_nvm()
2169 cmd->offset_low = 0; in ixgbe_aci_erase_nvm()
2170 cmd->offset_high = 0; in ixgbe_aci_erase_nvm()
2172 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_erase_nvm()
2176 * ixgbe_aci_update_nvm - update NVM
2177 * @hw: pointer to the HW struct
2189 s32 ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid, in ixgbe_aci_update_nvm() argument
2204 cmd->cmd_flags |= command_flags; in ixgbe_aci_update_nvm()
2208 cmd->cmd_flags |= IXGBE_ACI_NVM_LAST_CMD; in ixgbe_aci_update_nvm()
2209 cmd->module_typeid = IXGBE_CPU_TO_LE16(module_typeid); in ixgbe_aci_update_nvm()
2210 cmd->offset_low = IXGBE_CPU_TO_LE16(offset & 0xFFFF); in ixgbe_aci_update_nvm()
2211 cmd->offset_high = (offset >> 16) & 0xFF; in ixgbe_aci_update_nvm()
2212 cmd->length = IXGBE_CPU_TO_LE16(length); in ixgbe_aci_update_nvm()
2216 return ixgbe_aci_send_cmd(hw, &desc, data, length); in ixgbe_aci_update_nvm()
2220 * ixgbe_aci_read_nvm_cfg - read an NVM config block
2221 * @hw: pointer to the HW struct
2233 s32 ixgbe_aci_read_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags, in ixgbe_aci_read_nvm_cfg() argument
2245 cmd->cmd_flags = cmd_flags; in ixgbe_aci_read_nvm_cfg()
2246 cmd->id = IXGBE_CPU_TO_LE16(field_id); in ixgbe_aci_read_nvm_cfg()
2248 status = ixgbe_aci_send_cmd(hw, &desc, data, buf_size); in ixgbe_aci_read_nvm_cfg()
2250 *elem_count = IXGBE_LE16_TO_CPU(cmd->count); in ixgbe_aci_read_nvm_cfg()
2256 * ixgbe_aci_write_nvm_cfg - write an NVM config block
2257 * @hw: pointer to the HW struct
2268 s32 ixgbe_aci_write_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags, in ixgbe_aci_write_nvm_cfg() argument
2279 cmd->count = IXGBE_CPU_TO_LE16(elem_count); in ixgbe_aci_write_nvm_cfg()
2280 cmd->cmd_flags = cmd_flags; in ixgbe_aci_write_nvm_cfg()
2282 return ixgbe_aci_send_cmd(hw, &desc, data, buf_size); in ixgbe_aci_write_nvm_cfg()
2286 * ixgbe_nvm_validate_checksum - validate checksum
2287 * @hw: pointer to the HW struct
2295 s32 ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw) in ixgbe_nvm_validate_checksum() argument
2301 status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); in ixgbe_nvm_validate_checksum()
2308 cmd->flags = IXGBE_ACI_NVM_CHECKSUM_VERIFY; in ixgbe_nvm_validate_checksum()
2310 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_nvm_validate_checksum()
2312 ixgbe_release_nvm(hw); in ixgbe_nvm_validate_checksum()
2315 if (IXGBE_LE16_TO_CPU(cmd->checksum) != in ixgbe_nvm_validate_checksum()
2326 * ixgbe_nvm_recalculate_checksum - recalculate checksum
2327 * @hw: pointer to the HW struct
2334 s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw) in ixgbe_nvm_recalculate_checksum() argument
2340 status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); in ixgbe_nvm_recalculate_checksum()
2347 cmd->flags = IXGBE_ACI_NVM_CHECKSUM_RECALC; in ixgbe_nvm_recalculate_checksum()
2349 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_nvm_recalculate_checksum()
2351 ixgbe_release_nvm(hw); in ixgbe_nvm_recalculate_checksum()
2357 * ixgbe_nvm_write_activate - NVM activate write
2358 * @hw: pointer to the HW struct
2378 s32 ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags, in ixgbe_nvm_write_activate() argument
2389 cmd->cmd_flags = LO_BYTE(cmd_flags); in ixgbe_nvm_write_activate()
2390 cmd->offset_high = HI_BYTE(cmd_flags); in ixgbe_nvm_write_activate()
2392 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_nvm_write_activate()
2394 *response_flags = cmd->cmd_flags; in ixgbe_nvm_write_activate()
2400 * ixgbe_get_flash_bank_offset - Get offset into requested flash bank
2401 * @hw: pointer to the HW structure
2411 static u32 ixgbe_get_flash_bank_offset(struct ixgbe_hw *hw, in ixgbe_get_flash_bank_offset() argument
2415 struct ixgbe_bank_info *banks = &hw->flash.banks; in ixgbe_get_flash_bank_offset()
2422 offset = banks->nvm_ptr; in ixgbe_get_flash_bank_offset()
2423 size = banks->nvm_size; in ixgbe_get_flash_bank_offset()
2424 active_bank = banks->nvm_bank; in ixgbe_get_flash_bank_offset()
2427 offset = banks->orom_ptr; in ixgbe_get_flash_bank_offset()
2428 size = banks->orom_size; in ixgbe_get_flash_bank_offset()
2429 active_bank = banks->orom_bank; in ixgbe_get_flash_bank_offset()
2432 offset = banks->netlist_ptr; in ixgbe_get_flash_bank_offset()
2433 size = banks->netlist_size; in ixgbe_get_flash_bank_offset()
2434 active_bank = banks->netlist_bank; in ixgbe_get_flash_bank_offset()
2466 * ixgbe_read_flash_module - Read a word from one of the main NVM modules
2467 * @hw: pointer to the HW structure
2479 * hw->flash.banks data being setup by ixgbe_determine_active_flash_banks()
2484 static s32 ixgbe_read_flash_module(struct ixgbe_hw *hw, in ixgbe_read_flash_module() argument
2491 start = ixgbe_get_flash_bank_offset(hw, bank, module); in ixgbe_read_flash_module()
2496 status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); in ixgbe_read_flash_module()
2500 status = ixgbe_read_flat_nvm(hw, start + offset, &length, data, false); in ixgbe_read_flash_module()
2502 ixgbe_release_nvm(hw); in ixgbe_read_flash_module()
2508 * ixgbe_read_netlist_module - Read data from the netlist module area
2509 * @hw: pointer to the HW structure
2518 static s32 ixgbe_read_netlist_module(struct ixgbe_hw *hw, in ixgbe_read_netlist_module() argument
2525 status = ixgbe_read_flash_module(hw, bank, E610_SR_NETLIST_BANK_PTR, in ixgbe_read_netlist_module()
2536 * ixgbe_read_nvm_module - Read from the active main NVM module
2537 * @hw: pointer to the HW structure
2547 static s32 ixgbe_read_nvm_module(struct ixgbe_hw *hw, in ixgbe_read_nvm_module() argument
2554 status = ixgbe_read_flash_module(hw, bank, E610_SR_1ST_NVM_BANK_PTR, in ixgbe_read_nvm_module()
2565 * ixgbe_get_nvm_css_hdr_len - Read the CSS header length from the
2567 * @hw: pointer to the HW struct
2576 static s32 ixgbe_get_nvm_css_hdr_len(struct ixgbe_hw *hw, in ixgbe_get_nvm_css_hdr_len() argument
2584 status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_L, in ixgbe_get_nvm_css_hdr_len()
2589 status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_H, in ixgbe_get_nvm_css_hdr_len()
2604 * ixgbe_read_nvm_sr_copy - Read a word from the Shadow RAM copy in the NVM bank
2605 * @hw: pointer to the HW structure
2615 static s32 ixgbe_read_nvm_sr_copy(struct ixgbe_hw *hw, in ixgbe_read_nvm_sr_copy() argument
2622 status = ixgbe_get_nvm_css_hdr_len(hw, bank, &hdr_len); in ixgbe_read_nvm_sr_copy()
2628 return ixgbe_read_nvm_module(hw, bank, hdr_len + offset, data); in ixgbe_read_nvm_sr_copy()
2632 * ixgbe_get_nvm_minsrevs - Get the minsrevs values from flash
2633 * @hw: pointer to the HW struct
2642 s32 ixgbe_get_nvm_minsrevs(struct ixgbe_hw *hw, in ixgbe_get_nvm_minsrevs() argument
2649 status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); in ixgbe_get_nvm_minsrevs()
2653 status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID, in ixgbe_get_nvm_minsrevs()
2657 ixgbe_release_nvm(hw); in ixgbe_get_nvm_minsrevs()
2669 minsrevs->nvm = minsrev_h << 16 | minsrev_l; in ixgbe_get_nvm_minsrevs()
2670 minsrevs->nvm_valid = true; in ixgbe_get_nvm_minsrevs()
2678 minsrevs->orom = minsrev_h << 16 | minsrev_l; in ixgbe_get_nvm_minsrevs()
2679 minsrevs->orom_valid = true; in ixgbe_get_nvm_minsrevs()
2686 * ixgbe_update_nvm_minsrevs - Update minsrevs TLV data in flash
2687 * @hw: pointer to the HW struct
2691 * area of the flash. Reads the minsrevs->nvm_valid and minsrevs->orom_valid
2697 s32 ixgbe_update_nvm_minsrevs(struct ixgbe_hw *hw, in ixgbe_update_nvm_minsrevs() argument
2703 if (!minsrevs->nvm_valid && !minsrevs->orom_valid) { in ixgbe_update_nvm_minsrevs()
2707 status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); in ixgbe_update_nvm_minsrevs()
2712 status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID, 0, in ixgbe_update_nvm_minsrevs()
2717 if (minsrevs->nvm_valid) { in ixgbe_update_nvm_minsrevs()
2718 data.nvm_minsrev_l = IXGBE_CPU_TO_LE16(minsrevs->nvm & 0xFFFF); in ixgbe_update_nvm_minsrevs()
2719 data.nvm_minsrev_h = IXGBE_CPU_TO_LE16(minsrevs->nvm >> 16); in ixgbe_update_nvm_minsrevs()
2724 if (minsrevs->orom_valid) { in ixgbe_update_nvm_minsrevs()
2725 data.orom_minsrev_l = IXGBE_CPU_TO_LE16(minsrevs->orom & 0xFFFF); in ixgbe_update_nvm_minsrevs()
2726 data.orom_minsrev_h = IXGBE_CPU_TO_LE16(minsrevs->orom >> 16); in ixgbe_update_nvm_minsrevs()
2732 status = ixgbe_aci_update_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID, 0, in ixgbe_update_nvm_minsrevs()
2739 status = ixgbe_nvm_write_activate(hw, 0, NULL); in ixgbe_update_nvm_minsrevs()
2742 ixgbe_release_nvm(hw); in ixgbe_update_nvm_minsrevs()
2748 * ixgbe_get_nvm_srev - Read the security revision from the NVM CSS header
2749 * @hw: pointer to the HW struct
2758 static s32 ixgbe_get_nvm_srev(struct ixgbe_hw *hw, in ixgbe_get_nvm_srev() argument
2764 status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_L, &srev_l); in ixgbe_get_nvm_srev()
2768 status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_H, &srev_h); in ixgbe_get_nvm_srev()
2778 * ixgbe_get_nvm_ver_info - Read NVM version information
2779 * @hw: pointer to the HW struct
2788 static s32 ixgbe_get_nvm_ver_info(struct ixgbe_hw *hw, in ixgbe_get_nvm_ver_info() argument
2795 status = ixgbe_read_nvm_sr_copy(hw, bank, in ixgbe_get_nvm_ver_info()
2801 nvm->major = (ver & E610_NVM_VER_HI_MASK) >> E610_NVM_VER_HI_SHIFT; in ixgbe_get_nvm_ver_info()
2802 nvm->minor = (ver & E610_NVM_VER_LO_MASK) >> E610_NVM_VER_LO_SHIFT; in ixgbe_get_nvm_ver_info()
2804 status = ixgbe_read_nvm_sr_copy(hw, bank, E610_SR_NVM_EETRACK_LO, in ixgbe_get_nvm_ver_info()
2809 status = ixgbe_read_nvm_sr_copy(hw, bank, E610_SR_NVM_EETRACK_HI, in ixgbe_get_nvm_ver_info()
2815 nvm->eetrack = (eetrack_hi << 16) | eetrack_lo; in ixgbe_get_nvm_ver_info()
2817 status = ixgbe_get_nvm_srev(hw, bank, &nvm->srev); in ixgbe_get_nvm_ver_info()
2823 * ixgbe_get_inactive_nvm_ver - Read Option ROM version from the inactive bank
2824 * @hw: pointer to the HW structure
2833 s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm) in ixgbe_get_inactive_nvm_ver() argument
2835 return ixgbe_get_nvm_ver_info(hw, IXGBE_INACTIVE_FLASH_BANK, nvm); in ixgbe_get_inactive_nvm_ver()
2839 * ixgbe_get_active_nvm_ver - Read Option ROM version from the active bank
2840 * @hw: pointer to the HW structure
2848 s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm) in ixgbe_get_active_nvm_ver() argument
2850 return ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, nvm); in ixgbe_get_active_nvm_ver()
2855 * @hw: pointer to the HW struct
2865 static s32 ixgbe_get_netlist_info(struct ixgbe_hw *hw, in ixgbe_get_netlist_info() argument
2873 status = ixgbe_read_netlist_module(hw, bank, IXGBE_NETLIST_TYPE_OFFSET, in ixgbe_get_netlist_info()
2882 status = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_MODULE_LEN, in ixgbe_get_netlist_info()
2894 status = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_NODE_COUNT, in ixgbe_get_netlist_info()
2900 id_blk = (u16 *)ixgbe_calloc(hw, IXGBE_NETLIST_ID_BLK_SIZE, in ixgbe_get_netlist_info()
2906 status = ixgbe_read_flash_module(hw, bank, E610_SR_NETLIST_BANK_PTR, in ixgbe_get_netlist_info()
2916 netlist->major = id_blk[IXGBE_NETLIST_ID_BLK_MAJOR_VER_HIGH] << 16 | in ixgbe_get_netlist_info()
2918 netlist->minor = id_blk[IXGBE_NETLIST_ID_BLK_MINOR_VER_HIGH] << 16 | in ixgbe_get_netlist_info()
2920 netlist->type = id_blk[IXGBE_NETLIST_ID_BLK_TYPE_HIGH] << 16 | in ixgbe_get_netlist_info()
2922 netlist->rev = id_blk[IXGBE_NETLIST_ID_BLK_REV_HIGH] << 16 | in ixgbe_get_netlist_info()
2924 netlist->cust_ver = id_blk[IXGBE_NETLIST_ID_BLK_CUST_VER]; in ixgbe_get_netlist_info()
2926 netlist->hash = id_blk[IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(15)] << 16 | in ixgbe_get_netlist_info()
2930 ixgbe_free(hw, id_blk); in ixgbe_get_netlist_info()
2937 * @hw: pointer to the HW struct
2946 s32 ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw, in ixgbe_get_inactive_netlist_ver() argument
2949 return ixgbe_get_netlist_info(hw, IXGBE_INACTIVE_FLASH_BANK, netlist); in ixgbe_get_inactive_netlist_ver()
2953 * ixgbe_read_sr_pointer - Read the value of a Shadow RAM pointer word
2954 * @hw: pointer to the HW structure
2968 static s32 ixgbe_read_sr_pointer(struct ixgbe_hw *hw, u16 offset, u32 *pointer) in ixgbe_read_sr_pointer() argument
2973 status = ixgbe_read_ee_aci_E610(hw, offset, &value); in ixgbe_read_sr_pointer()
2987 * ixgbe_read_sr_area_size - Read an area size from a Shadow RAM word
2988 * @hw: pointer to the HW structure
3001 static s32 ixgbe_read_sr_area_size(struct ixgbe_hw *hw, u16 offset, u32 *size) in ixgbe_read_sr_area_size() argument
3006 status = ixgbe_read_ee_aci_E610(hw, offset, &value); in ixgbe_read_sr_area_size()
3017 * ixgbe_discover_flash_size - Discover the available flash size.
3018 * @hw: pointer to the HW struct
3020 * The device flash could be up to 16MB in size. However, it is possible that
3026 static s32 ixgbe_discover_flash_size(struct ixgbe_hw *hw) in ixgbe_discover_flash_size() argument
3031 status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); in ixgbe_discover_flash_size()
3035 while ((max_size - min_size) > 1) { in ixgbe_discover_flash_size()
3040 status = ixgbe_read_flat_nvm(hw, offset, &len, &data, false); in ixgbe_discover_flash_size()
3042 hw->aci.last_status == IXGBE_ACI_RC_EINVAL) { in ixgbe_discover_flash_size()
3053 hw->flash.flash_size = max_size; in ixgbe_discover_flash_size()
3056 ixgbe_release_nvm(hw); in ixgbe_discover_flash_size()
3062 * ixgbe_determine_active_flash_banks - Discover active bank for each module
3063 * @hw: pointer to the HW struct
3073 static s32 ixgbe_determine_active_flash_banks(struct ixgbe_hw *hw) in ixgbe_determine_active_flash_banks() argument
3075 struct ixgbe_bank_info *banks = &hw->flash.banks; in ixgbe_determine_active_flash_banks()
3079 status = ixgbe_read_ee_aci_E610(hw, E610_SR_NVM_CTRL_WORD, &ctrl_word); in ixgbe_determine_active_flash_banks()
3091 banks->nvm_bank = IXGBE_1ST_FLASH_BANK; in ixgbe_determine_active_flash_banks()
3093 banks->nvm_bank = IXGBE_2ND_FLASH_BANK; in ixgbe_determine_active_flash_banks()
3096 banks->orom_bank = IXGBE_1ST_FLASH_BANK; in ixgbe_determine_active_flash_banks()
3098 banks->orom_bank = IXGBE_2ND_FLASH_BANK; in ixgbe_determine_active_flash_banks()
3101 banks->netlist_bank = IXGBE_1ST_FLASH_BANK; in ixgbe_determine_active_flash_banks()
3103 banks->netlist_bank = IXGBE_2ND_FLASH_BANK; in ixgbe_determine_active_flash_banks()
3105 status = ixgbe_read_sr_pointer(hw, E610_SR_1ST_NVM_BANK_PTR, in ixgbe_determine_active_flash_banks()
3106 &banks->nvm_ptr); in ixgbe_determine_active_flash_banks()
3111 status = ixgbe_read_sr_area_size(hw, E610_SR_NVM_BANK_SIZE, in ixgbe_determine_active_flash_banks()
3112 &banks->nvm_size); in ixgbe_determine_active_flash_banks()
3117 status = ixgbe_read_sr_pointer(hw, E610_SR_1ST_OROM_BANK_PTR, in ixgbe_determine_active_flash_banks()
3118 &banks->orom_ptr); in ixgbe_determine_active_flash_banks()
3123 status = ixgbe_read_sr_area_size(hw, E610_SR_OROM_BANK_SIZE, in ixgbe_determine_active_flash_banks()
3124 &banks->orom_size); in ixgbe_determine_active_flash_banks()
3129 status = ixgbe_read_sr_pointer(hw, E610_SR_NETLIST_BANK_PTR, in ixgbe_determine_active_flash_banks()
3130 &banks->netlist_ptr); in ixgbe_determine_active_flash_banks()
3135 status = ixgbe_read_sr_area_size(hw, E610_SR_NETLIST_BANK_SIZE, in ixgbe_determine_active_flash_banks()
3136 &banks->netlist_size); in ixgbe_determine_active_flash_banks()
3145 * ixgbe_init_nvm - initializes NVM setting
3146 * @hw: pointer to the HW struct
3153 s32 ixgbe_init_nvm(struct ixgbe_hw *hw) in ixgbe_init_nvm() argument
3155 struct ixgbe_flash_info *flash = &hw->flash; in ixgbe_init_nvm()
3162 gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS); in ixgbe_init_nvm()
3166 flash->sr_words = BIT(sr_size) * IXGBE_SR_WORDS_IN_1KB; in ixgbe_init_nvm()
3169 fla = IXGBE_READ_REG(hw, GLNVM_FLA); in ixgbe_init_nvm()
3171 flash->blank_nvm_mode = false; in ixgbe_init_nvm()
3174 flash->blank_nvm_mode = true; in ixgbe_init_nvm()
3178 status = ixgbe_discover_flash_size(hw); in ixgbe_init_nvm()
3183 status = ixgbe_determine_active_flash_banks(hw); in ixgbe_init_nvm()
3188 status = ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, in ixgbe_init_nvm()
3189 &flash->nvm); in ixgbe_init_nvm()
3195 status = ixgbe_get_netlist_info(hw, IXGBE_ACTIVE_FLASH_BANK, in ixgbe_init_nvm()
3196 &flash->netlist); in ixgbe_init_nvm()
3202 * ixgbe_sanitize_operate - Clear the user data
3203 * @hw: pointer to the HW struct
3209 s32 ixgbe_sanitize_operate(struct ixgbe_hw *hw) in ixgbe_sanitize_operate() argument
3217 status = ixgbe_sanitize_nvm(hw, cmd_flags, &values); in ixgbe_sanitize_operate()
3232 * ixgbe_sanitize_nvm - Sanitize NVM
3233 * @hw: pointer to the HW struct
3241 s32 ixgbe_sanitize_nvm(struct ixgbe_hw *hw, u8 cmd_flags, u8 *values) in ixgbe_sanitize_nvm() argument
3249 cmd->cmd_flags = cmd_flags; in ixgbe_sanitize_nvm()
3251 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_sanitize_nvm()
3253 *values = cmd->values; in ixgbe_sanitize_nvm()
3259 * ixgbe_read_sr_word_aci - Reads Shadow RAM via ACI
3260 * @hw: pointer to the HW structure
3261 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
3268 s32 ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data) in ixgbe_read_sr_word_aci() argument
3274 status = ixgbe_read_flat_nvm(hw, offset * sizeof(u16), &bytes, in ixgbe_read_sr_word_aci()
3284 * ixgbe_read_sr_buf_aci - Reads Shadow RAM buf via ACI
3285 * @hw: pointer to the HW structure
3286 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
3295 s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words, in ixgbe_read_sr_buf_aci() argument
3301 status = ixgbe_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true); in ixgbe_read_sr_buf_aci()
3312 * ixgbe_read_flat_nvm - Read portion of NVM by flat offset
3313 * @hw: pointer to the HW struct
3329 s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length, in ixgbe_read_flat_nvm() argument
3341 (hw->eeprom.word_size * 2u))) { in ixgbe_read_flat_nvm()
3354 IXGBE_ACI_MAX_BUFFER_SIZE - sector_offset, in ixgbe_read_flat_nvm()
3355 inlen - bytes_read); in ixgbe_read_flat_nvm()
3363 status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_START_POINT, in ixgbe_read_flat_nvm()
3379 * ixgbe_check_sr_access_params - verify params for Shadow RAM R/W operations.
3380 * @hw: pointer to the HW structure
3388 * * - IXGBE_SUCCESS - success.
3389 * * - IXGBE_ERR_PARAM - NVM error: offset beyond SR limit or
3393 static s32 ixgbe_check_sr_access_params(struct ixgbe_hw *hw, u32 offset, in ixgbe_check_sr_access_params() argument
3396 if ((offset + words) > hw->eeprom.word_size) { in ixgbe_check_sr_access_params()
3407 if (((offset + (words - 1)) / IXGBE_SR_SECTOR_SIZE_IN_WORDS) != in ixgbe_check_sr_access_params()
3417 * ixgbe_write_sr_word_aci - Writes Shadow RAM word
3418 * @hw: pointer to the HW structure
3428 s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data) in ixgbe_write_sr_word_aci() argument
3433 status = ixgbe_check_sr_access_params(hw, offset, 1); in ixgbe_write_sr_word_aci()
3435 status = ixgbe_aci_update_nvm(hw, 0, BYTES_PER_WORD * offset, in ixgbe_write_sr_word_aci()
3443 * ixgbe_write_sr_buf_aci - Writes Shadow RAM buf
3444 * @hw: pointer to the HW structure
3455 s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words, in ixgbe_write_sr_buf_aci() argument
3463 vmem = ixgbe_calloc(hw, words, sizeof(u16)); in ixgbe_write_sr_buf_aci()
3474 status = ixgbe_check_sr_access_params(hw, offset, words); in ixgbe_write_sr_buf_aci()
3476 status = ixgbe_aci_update_nvm(hw, 0, BYTES_PER_WORD * offset, in ixgbe_write_sr_buf_aci()
3480 ixgbe_free(hw, vmem); in ixgbe_write_sr_buf_aci()
3486 * ixgbe_aci_alternate_write - write to alternate structure
3487 * @hw: pointer to the hardware structure
3488 * @reg_addr0: address of first dword to be written
3490 * @reg_addr1: address of second dword to be written
3498 s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0, in ixgbe_aci_alternate_write() argument
3508 cmd->dword0_addr = IXGBE_CPU_TO_LE32(reg_addr0); in ixgbe_aci_alternate_write()
3509 cmd->dword1_addr = IXGBE_CPU_TO_LE32(reg_addr1); in ixgbe_aci_alternate_write()
3510 cmd->dword0_value = IXGBE_CPU_TO_LE32(reg_val0); in ixgbe_aci_alternate_write()
3511 cmd->dword1_value = IXGBE_CPU_TO_LE32(reg_val1); in ixgbe_aci_alternate_write()
3513 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_alternate_write()
3519 * ixgbe_aci_alternate_read - read from alternate structure
3520 * @hw: pointer to the hardware structure
3521 * @reg_addr0: address of first dword to be read
3523 * @reg_addr1: address of second dword to be read
3533 s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0, in ixgbe_aci_alternate_read() argument
3546 cmd->dword0_addr = IXGBE_CPU_TO_LE32(reg_addr0); in ixgbe_aci_alternate_read()
3547 cmd->dword1_addr = IXGBE_CPU_TO_LE32(reg_addr1); in ixgbe_aci_alternate_read()
3549 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_alternate_read()
3552 *reg_val0 = IXGBE_LE32_TO_CPU(cmd->dword0_value); in ixgbe_aci_alternate_read()
3555 *reg_val1 = IXGBE_LE32_TO_CPU(cmd->dword1_value); in ixgbe_aci_alternate_read()
3562 * ixgbe_aci_alternate_write_done - check if writing to alternate structure
3564 * @hw: pointer to the HW structure.
3572 s32 ixgbe_aci_alternate_write_done(struct ixgbe_hw *hw, u8 bios_mode, in ixgbe_aci_alternate_write_done() argument
3585 cmd->flags = bios_mode; in ixgbe_aci_alternate_write_done()
3587 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_alternate_write_done()
3589 *reset_needed = (IXGBE_LE16_TO_CPU(cmd->flags) & in ixgbe_aci_alternate_write_done()
3596 * ixgbe_aci_alternate_clear - clear alternate structure
3597 * @hw: pointer to the HW structure.
3604 s32 ixgbe_aci_alternate_clear(struct ixgbe_hw *hw) in ixgbe_aci_alternate_clear() argument
3612 status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_alternate_clear()
3618 * ixgbe_aci_get_internal_data - get internal FW/HW data
3619 * @hw: pointer to the hardware structure
3630 * Get internal FW/HW data using ACI command (0xFF08) for debug purposes.
3634 s32 ixgbe_aci_get_internal_data(struct ixgbe_hw *hw, u16 cluster_id, in ixgbe_aci_get_internal_data() argument
3652 cmd->cluster_id = IXGBE_CPU_TO_LE16(cluster_id); in ixgbe_aci_get_internal_data()
3653 cmd->table_id = IXGBE_CPU_TO_LE16(table_id); in ixgbe_aci_get_internal_data()
3654 cmd->idx = IXGBE_CPU_TO_LE32(start); in ixgbe_aci_get_internal_data()
3656 status = ixgbe_aci_send_cmd(hw, &desc, buf, buf_size); in ixgbe_aci_get_internal_data()
3662 *ret_next_cluster = IXGBE_LE16_TO_CPU(cmd->cluster_id); in ixgbe_aci_get_internal_data()
3664 *ret_next_table = IXGBE_LE16_TO_CPU(cmd->table_id); in ixgbe_aci_get_internal_data()
3666 *ret_next_index = IXGBE_LE32_TO_CPU(cmd->idx); in ixgbe_aci_get_internal_data()
3673 * ixgbe_validate_nvm_rw_reg - Check that an NVM access request is valid
3687 switch (cmd->offset) { in ixgbe_validate_nvm_rw_reg()
3701 if (cmd->offset == (u32)GL_HIDA(i)) in ixgbe_validate_nvm_rw_reg()
3705 if (cmd->offset == (u32)GL_HIBA(i)) in ixgbe_validate_nvm_rw_reg()
3713 * ixgbe_nvm_access_read - Handle an NVM read request
3714 * @hw: pointer to the HW struct
3723 static s32 ixgbe_nvm_access_read(struct ixgbe_hw *hw, in ixgbe_nvm_access_read() argument
3730 memset(&data->regval, 0, cmd->data_size); in ixgbe_nvm_access_read()
3737 DEBUGOUT1("NVM access: reading register %08x\n", cmd->offset); in ixgbe_nvm_access_read()
3740 data->regval = IXGBE_READ_REG(hw, cmd->offset); in ixgbe_nvm_access_read()
3746 * ixgbe_nvm_access_write - Handle an NVM write request
3747 * @hw: pointer to the HW struct
3756 static s32 ixgbe_nvm_access_write(struct ixgbe_hw *hw, in ixgbe_nvm_access_write() argument
3767 /* Reject requests to write to read-only registers */ in ixgbe_nvm_access_write()
3768 switch (cmd->offset) { in ixgbe_nvm_access_write()
3776 cmd->offset, data->regval); in ixgbe_nvm_access_write()
3779 IXGBE_WRITE_REG(hw, cmd->offset, data->regval); in ixgbe_nvm_access_write()
3785 * ixgbe_handle_nvm_access - Handle an NVM access request
3786 * @hw: pointer to the HW struct
3800 s32 ixgbe_handle_nvm_access(struct ixgbe_hw *hw, in ixgbe_handle_nvm_access() argument
3804 switch (cmd->command) { in ixgbe_handle_nvm_access()
3806 return ixgbe_nvm_access_read(hw, cmd, data); in ixgbe_handle_nvm_access()
3808 return ixgbe_nvm_access_write(hw, cmd, data); in ixgbe_handle_nvm_access()
3815 * ixgbe_aci_set_health_status_config - Configure FW health events
3816 * @hw: pointer to the HW struct
3820 * PF using ACI command (0xFF20). The supported event types are: PF-specific,
3825 s32 ixgbe_aci_set_health_status_config(struct ixgbe_hw *hw, u8 event_source) in ixgbe_aci_set_health_status_config() argument
3835 cmd->event_source = event_source; in ixgbe_aci_set_health_status_config()
3837 return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); in ixgbe_aci_set_health_status_config()
3841 * ixgbe_init_ops_E610 - Inits func ptrs and MAC type
3842 * @hw: pointer to hardware structure
3849 s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw) in ixgbe_init_ops_E610() argument
3851 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_ops_E610()
3852 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_E610()
3853 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_ops_E610()
3856 ret_val = ixgbe_init_ops_X550(hw); in ixgbe_init_ops_E610()
3859 mac->ops.reset_hw = ixgbe_reset_hw_E610; in ixgbe_init_ops_E610()
3860 mac->ops.start_hw = ixgbe_start_hw_E610; in ixgbe_init_ops_E610()
3861 mac->ops.get_media_type = ixgbe_get_media_type_E610; in ixgbe_init_ops_E610()
3862 mac->ops.get_supported_physical_layer = in ixgbe_init_ops_E610()
3864 mac->ops.get_san_mac_addr = NULL; in ixgbe_init_ops_E610()
3865 mac->ops.set_san_mac_addr = NULL; in ixgbe_init_ops_E610()
3866 mac->ops.get_wwn_prefix = NULL; in ixgbe_init_ops_E610()
3867 mac->ops.setup_link = ixgbe_setup_link_E610; in ixgbe_init_ops_E610()
3868 mac->ops.check_link = ixgbe_check_link_E610; in ixgbe_init_ops_E610()
3869 mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_E610; in ixgbe_init_ops_E610()
3870 mac->ops.setup_fc = ixgbe_setup_fc_E610; in ixgbe_init_ops_E610()
3871 mac->ops.fc_autoneg = ixgbe_fc_autoneg_E610; in ixgbe_init_ops_E610()
3872 mac->ops.set_fw_drv_ver = ixgbe_set_fw_drv_ver_E610; in ixgbe_init_ops_E610()
3873 mac->ops.disable_rx = ixgbe_disable_rx_E610; in ixgbe_init_ops_E610()
3874 mac->ops.setup_eee = ixgbe_setup_eee_E610; in ixgbe_init_ops_E610()
3875 mac->ops.fw_recovery_mode = ixgbe_fw_recovery_mode_E610; in ixgbe_init_ops_E610()
3876 mac->ops.fw_rollback_mode = ixgbe_fw_rollback_mode_E610; in ixgbe_init_ops_E610()
3877 mac->ops.get_fw_tsam_mode = ixgbe_get_fw_tsam_mode_E610; in ixgbe_init_ops_E610()
3878 mac->ops.get_fw_version = ixgbe_aci_get_fw_ver; in ixgbe_init_ops_E610()
3879 mac->ops.get_nvm_version = ixgbe_get_active_nvm_ver; in ixgbe_init_ops_E610()
3880 mac->ops.get_thermal_sensor_data = NULL; in ixgbe_init_ops_E610()
3881 mac->ops.init_thermal_sensor_thresh = NULL; in ixgbe_init_ops_E610()
3884 phy->ops.init = ixgbe_init_phy_ops_E610; in ixgbe_init_ops_E610()
3885 phy->ops.identify = ixgbe_identify_phy_E610; in ixgbe_init_ops_E610()
3886 phy->eee_speeds_supported = IXGBE_LINK_SPEED_10_FULL | in ixgbe_init_ops_E610()
3889 phy->eee_speeds_advertised = phy->eee_speeds_supported; in ixgbe_init_ops_E610()
3892 eeprom->ops.init_params = ixgbe_init_eeprom_params_E610; in ixgbe_init_ops_E610()
3893 eeprom->ops.read = ixgbe_read_ee_aci_E610; in ixgbe_init_ops_E610()
3894 eeprom->ops.read_buffer = ixgbe_read_ee_aci_buffer_E610; in ixgbe_init_ops_E610()
3895 eeprom->ops.write = ixgbe_write_ee_aci_E610; in ixgbe_init_ops_E610()
3896 eeprom->ops.write_buffer = ixgbe_write_ee_aci_buffer_E610; in ixgbe_init_ops_E610()
3897 eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_E610; in ixgbe_init_ops_E610()
3898 eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_E610; in ixgbe_init_ops_E610()
3899 eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_E610; in ixgbe_init_ops_E610()
3900 eeprom->ops.read_pba_string = ixgbe_read_pba_string_E610; in ixgbe_init_ops_E610()
3903 hw->mac.ops.set_lan_id(hw); in ixgbe_init_ops_E610()
3909 * ixgbe_reset_hw_E610 - Perform hardware reset
3910 * @hw: pointer to hardware structure
3917 s32 ixgbe_reset_hw_E610(struct ixgbe_hw *hw) in ixgbe_reset_hw_E610() argument
3919 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_reset_hw_E610()
3926 status = hw->mac.ops.stop_adapter(hw); in ixgbe_reset_hw_E610()
3931 ixgbe_clear_tx_pending(hw); in ixgbe_reset_hw_E610()
3933 status = hw->phy.ops.init(hw); in ixgbe_reset_hw_E610()
3938 status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask); in ixgbe_reset_hw_E610()
3945 ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_E610()
3946 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_E610()
3947 IXGBE_WRITE_FLUSH(hw); in ixgbe_reset_hw_E610()
3948 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_reset_hw_E610()
3950 /* Poll for reset bit to self-clear indicating reset is complete */ in ixgbe_reset_hw_E610()
3953 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_E610()
3968 * for any pending HW events to complete. in ixgbe_reset_hw_E610()
3970 if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { in ixgbe_reset_hw_E610()
3971 hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_reset_hw_E610()
3976 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT); in ixgbe_reset_hw_E610()
3978 /* Store the permanent mac address */ in ixgbe_reset_hw_E610()
3979 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_E610()
3982 * Store MAC address from RAR0, clear receive address registers, and in ixgbe_reset_hw_E610()
3984 * since we modify this value when programming the SAN MAC address. in ixgbe_reset_hw_E610()
3986 hw->mac.num_rar_entries = 128; in ixgbe_reset_hw_E610()
3987 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_E610()
3994 * ixgbe_start_hw_E610 - Prepare hardware for Tx/Rx
3995 * @hw: pointer to hardware structure
4000 * Then performs revision-specific operations, if any.
4002 s32 ixgbe_start_hw_E610(struct ixgbe_hw *hw) in ixgbe_start_hw_E610() argument
4006 ret_val = hw->mac.ops.get_fw_version(hw); in ixgbe_start_hw_E610()
4010 ret_val = ixgbe_start_hw_generic(hw); in ixgbe_start_hw_E610()
4014 ixgbe_start_hw_gen2(hw); in ixgbe_start_hw_E610()
4021 * ixgbe_get_media_type_E610 - Gets media type
4022 * @hw: pointer to the HW struct
4031 enum ixgbe_media_type ixgbe_get_media_type_E610(struct ixgbe_hw *hw) in ixgbe_get_media_type_E610() argument
4038 rc = ixgbe_update_link_info(hw); in ixgbe_get_media_type_E610()
4048 if (!(hw->link.link_info.link_info & IXGBE_ACI_LINK_UP) && in ixgbe_get_media_type_E610()
4049 (hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE)) { in ixgbe_get_media_type_E610()
4051 rc = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_get_media_type_E610()
4059 for (i = 64; i > 0; i--) { in ixgbe_get_media_type_E610()
4060 phy_mask = (u64)((u64)1 << (i - 1)); in ixgbe_get_media_type_E610()
4063 hw->link.link_info.phy_type_high = phy_mask; in ixgbe_get_media_type_E610()
4064 hw->link.link_info.phy_type_low = 0; in ixgbe_get_media_type_E610()
4072 for (i = 64; i > 0; i--) { in ixgbe_get_media_type_E610()
4073 phy_mask = (u64)((u64)1 << (i - 1)); in ixgbe_get_media_type_E610()
4076 hw->link.link_info.phy_type_high = 0; in ixgbe_get_media_type_E610()
4077 hw->link.link_info.phy_type_low = phy_mask; in ixgbe_get_media_type_E610()
4086 hw->phy.media_type = ixgbe_get_media_type_from_phy_type(hw); in ixgbe_get_media_type_E610()
4088 return hw->phy.media_type; in ixgbe_get_media_type_E610()
4092 * ixgbe_get_supported_physical_layer_E610 - Returns physical layer type
4093 * @hw: pointer to hardware structure
4099 u64 ixgbe_get_supported_physical_layer_E610(struct ixgbe_hw *hw) in ixgbe_get_supported_physical_layer_E610() argument
4106 rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_TOPO_CAP_MEDIA, in ixgbe_get_supported_physical_layer_E610()
4143 * ixgbe_setup_link_E610 - Set up link
4144 * @hw: pointer to hardware structure
4152 s32 ixgbe_setup_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed speed, in ixgbe_setup_link_E610() argument
4156 return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait); in ixgbe_setup_link_E610()
4160 * ixgbe_check_link_E610 - Determine link and speed status
4161 * @hw: pointer to hardware structure
4171 s32 ixgbe_check_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed *speed, in ixgbe_check_link_E610() argument
4183 hw->link.get_link_info = true; in ixgbe_check_link_E610()
4186 rc = ixgbe_get_link_status(hw, link_up); in ixgbe_check_link_E610()
4192 for (i = 0; i < hw->mac.max_link_up_time; i++) { in ixgbe_check_link_E610()
4194 hw->link.get_link_info = true; in ixgbe_check_link_E610()
4195 rc = ixgbe_get_link_status(hw, link_up); in ixgbe_check_link_E610()
4208 switch (hw->link.link_info.link_speed) { in ixgbe_check_link_E610()
4239 * ixgbe_get_link_capabilities_E610 - Determine link capabilities
4240 * @hw: pointer to hardware structure
4248 s32 ixgbe_get_link_capabilities_E610(struct ixgbe_hw *hw, in ixgbe_get_link_capabilities_E610() argument
4256 *speed = hw->phy.speeds_supported; in ixgbe_get_link_capabilities_E610()
4262 * ixgbe_cfg_phy_fc - Configure PHY Flow Control (FC) data based on FC mode
4263 * @hw: pointer to hardware structure
4271 s32 ixgbe_cfg_phy_fc(struct ixgbe_hw *hw, in ixgbe_cfg_phy_fc() argument
4286 ixgbe_malloc(hw, sizeof(*pcaps)); in ixgbe_cfg_phy_fc()
4294 status = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_cfg_phy_fc()
4299 pause_mask |= pcaps->caps & IXGBE_ACI_PHY_EN_TX_LINK_PAUSE; in ixgbe_cfg_phy_fc()
4300 pause_mask |= pcaps->caps & IXGBE_ACI_PHY_EN_RX_LINK_PAUSE; in ixgbe_cfg_phy_fc()
4319 cfg->caps &= ~(IXGBE_ACI_PHY_EN_TX_LINK_PAUSE | in ixgbe_cfg_phy_fc()
4323 cfg->caps |= pause_mask; in ixgbe_cfg_phy_fc()
4327 ixgbe_free(hw, pcaps); in ixgbe_cfg_phy_fc()
4332 * ixgbe_setup_fc_E610 - Set up flow control
4333 * @hw: pointer to hardware structure
4339 s32 ixgbe_setup_fc_E610(struct ixgbe_hw *hw) in ixgbe_setup_fc_E610() argument
4346 status = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_setup_fc_E610()
4354 status = ixgbe_cfg_phy_fc(hw, &cfg, hw->fc.requested_mode); in ixgbe_setup_fc_E610()
4362 status = ixgbe_aci_set_phy_cfg(hw, &cfg); in ixgbe_setup_fc_E610()
4371 * ixgbe_fc_autoneg_E610 - Configure flow control
4372 * @hw: pointer to hardware structure
4376 void ixgbe_fc_autoneg_E610(struct ixgbe_hw *hw) in ixgbe_fc_autoneg_E610() argument
4381 * Current FC mode will be stored in the hw context. */ in ixgbe_fc_autoneg_E610()
4382 status = ixgbe_aci_get_link_info(hw, false, NULL); in ixgbe_fc_autoneg_E610()
4388 if (!(hw->link.link_info.link_info & IXGBE_ACI_LINK_UP)) { in ixgbe_fc_autoneg_E610()
4393 /* Check if auto-negotiation has completed */ in ixgbe_fc_autoneg_E610()
4394 if (!(hw->link.link_info.an_info & IXGBE_ACI_AN_COMPLETED)) { in ixgbe_fc_autoneg_E610()
4401 hw->fc.fc_was_autonegged = true; in ixgbe_fc_autoneg_E610()
4403 hw->fc.fc_was_autonegged = false; in ixgbe_fc_autoneg_E610()
4404 hw->fc.current_mode = hw->fc.requested_mode; in ixgbe_fc_autoneg_E610()
4409 * ixgbe_set_fw_drv_ver_E610 - Send driver version to FW
4410 * @hw: pointer to the HW structure
4421 * IXGBE_SUCCESS - OK
4422 * IXGBE_ERR_PARAM - incorrect parameters were given
4423 * IXGBE_ERR_ACI_ERROR - encountered an error during sending the command
4424 * IXGBE_ERR_ACI_TIMEOUT - a timeout occurred
4425 * IXGBE_ERR_OUT_OF_MEM - ran out of memory
4427 s32 ixgbe_set_fw_drv_ver_E610(struct ixgbe_hw *hw, u8 maj, u8 minor, u8 build, in ixgbe_set_fw_drv_ver_E610() argument
4446 return ixgbe_aci_send_driver_ver(hw, &dv); in ixgbe_set_fw_drv_ver_E610()
4450 * ixgbe_disable_rx_E610 - Disable RX unit
4451 * @hw: pointer to hardware structure
4457 void ixgbe_disable_rx_E610(struct ixgbe_hw *hw) in ixgbe_disable_rx_E610() argument
4463 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); in ixgbe_disable_rx_E610()
4468 pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC); in ixgbe_disable_rx_E610()
4471 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc); in ixgbe_disable_rx_E610()
4472 hw->mac.set_lben = true; in ixgbe_disable_rx_E610()
4474 hw->mac.set_lben = false; in ixgbe_disable_rx_E610()
4477 status = ixgbe_aci_disable_rxen(hw); in ixgbe_disable_rx_E610()
4479 /* If we fail - disable RX using register write */ in ixgbe_disable_rx_E610()
4481 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); in ixgbe_disable_rx_E610()
4484 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl); in ixgbe_disable_rx_E610()
4491 * ixgbe_setup_eee_E610 - Enable/disable EEE support
4492 * @hw: pointer to the HW structure
4499 s32 ixgbe_setup_eee_E610(struct ixgbe_hw *hw, bool enable_eee) in ixgbe_setup_eee_E610() argument
4506 status = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_setup_eee_E610()
4534 status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg); in ixgbe_setup_eee_E610()
4540 * ixgbe_fw_recovery_mode_E610 - Check FW NVM recovery mode
4541 * @hw: pointer to hardware structure
4548 bool ixgbe_fw_recovery_mode_E610(struct ixgbe_hw *hw) in ixgbe_fw_recovery_mode_E610() argument
4550 u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM); in ixgbe_fw_recovery_mode_E610()
4556 * ixgbe_fw_rollback_mode_E610 - Check FW NVM Rollback
4557 * @hw: pointer to hardware structure
4564 bool ixgbe_fw_rollback_mode_E610(struct ixgbe_hw *hw) in ixgbe_fw_rollback_mode_E610() argument
4566 u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM); in ixgbe_fw_rollback_mode_E610()
4572 * ixgbe_get_fw_tsam_mode_E610 - Check FW NVM Thermal Sensor Autonomous Mode
4573 * @hw: pointer to hardware structure
4580 bool ixgbe_get_fw_tsam_mode_E610(struct ixgbe_hw *hw) in ixgbe_get_fw_tsam_mode_E610() argument
4582 u32 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_X550EM_a); in ixgbe_get_fw_tsam_mode_E610()
4588 * ixgbe_init_phy_ops_E610 - PHY specific init
4589 * @hw: pointer to hardware structure
4596 s32 ixgbe_init_phy_ops_E610(struct ixgbe_hw *hw) in ixgbe_init_phy_ops_E610() argument
4598 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_phy_ops_E610()
4599 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_E610()
4602 phy->ops.identify_sfp = ixgbe_identify_module_E610; in ixgbe_init_phy_ops_E610()
4603 phy->ops.read_reg = NULL; /* PHY reg access is not required */ in ixgbe_init_phy_ops_E610()
4604 phy->ops.write_reg = NULL; in ixgbe_init_phy_ops_E610()
4605 phy->ops.read_reg_mdi = NULL; in ixgbe_init_phy_ops_E610()
4606 phy->ops.write_reg_mdi = NULL; in ixgbe_init_phy_ops_E610()
4607 phy->ops.setup_link = ixgbe_setup_phy_link_E610; in ixgbe_init_phy_ops_E610()
4608 phy->ops.get_firmware_version = ixgbe_get_phy_firmware_version_E610; in ixgbe_init_phy_ops_E610()
4609 phy->ops.read_i2c_byte = NULL; /* disabled for E610 */ in ixgbe_init_phy_ops_E610()
4610 phy->ops.write_i2c_byte = NULL; /* disabled for E610 */ in ixgbe_init_phy_ops_E610()
4611 phy->ops.read_i2c_sff8472 = ixgbe_read_i2c_sff8472_E610; in ixgbe_init_phy_ops_E610()
4612 phy->ops.read_i2c_eeprom = ixgbe_read_i2c_eeprom_E610; in ixgbe_init_phy_ops_E610()
4613 phy->ops.write_i2c_eeprom = ixgbe_write_i2c_eeprom_E610; in ixgbe_init_phy_ops_E610()
4614 phy->ops.i2c_bus_clear = NULL; /* do not use generic implementation */ in ixgbe_init_phy_ops_E610()
4615 phy->ops.check_overtemp = ixgbe_check_overtemp_E610; in ixgbe_init_phy_ops_E610()
4616 if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) in ixgbe_init_phy_ops_E610()
4617 phy->ops.set_phy_power = ixgbe_set_phy_power_E610; in ixgbe_init_phy_ops_E610()
4619 phy->ops.set_phy_power = NULL; in ixgbe_init_phy_ops_E610()
4620 phy->ops.enter_lplu = ixgbe_enter_lplu_E610; in ixgbe_init_phy_ops_E610()
4621 phy->ops.handle_lasi = NULL; /* no implementation for E610 */ in ixgbe_init_phy_ops_E610()
4622 phy->ops.read_i2c_byte_unlocked = NULL; /* disabled for E610 */ in ixgbe_init_phy_ops_E610()
4623 phy->ops.write_i2c_byte_unlocked = NULL; /* disabled for E610 */ in ixgbe_init_phy_ops_E610()
4625 /* TODO: Set functions pointers based on device ID */ in ixgbe_init_phy_ops_E610()
4628 ret_val = phy->ops.identify(hw); in ixgbe_init_phy_ops_E610()
4638 * ixgbe_identify_phy_E610 - Identify PHY
4639 * @hw: pointer to hardware structure
4645 s32 ixgbe_identify_phy_E610(struct ixgbe_hw *hw) in ixgbe_identify_phy_E610() argument
4651 hw->phy.type = ixgbe_phy_fw; in ixgbe_identify_phy_E610()
4653 rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_TOPO_CAP_MEDIA, in ixgbe_identify_phy_E610()
4661 rc = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_identify_phy_E610()
4669 hw->phy.speeds_supported = IXGBE_LINK_SPEED_UNKNOWN; in ixgbe_identify_phy_E610()
4673 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10_FULL; in ixgbe_identify_phy_E610()
4677 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_identify_phy_E610()
4684 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_identify_phy_E610()
4693 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_identify_phy_E610()
4696 * auto-negotiation set used during driver initialization due to in ixgbe_identify_phy_E610()
4698 * exist in case of E610 2.5G SKU device (0x57b1). in ixgbe_identify_phy_E610()
4700 if (!hw->phy.autoneg_advertised && in ixgbe_identify_phy_E610()
4701 hw->device_id != IXGBE_DEV_ID_E610_2_5G_T) in ixgbe_identify_phy_E610()
4702 hw->phy.autoneg_advertised = hw->phy.speeds_supported; in ixgbe_identify_phy_E610()
4709 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_identify_phy_E610()
4711 if (!hw->phy.autoneg_advertised && in ixgbe_identify_phy_E610()
4712 hw->device_id == IXGBE_DEV_ID_E610_2_5G_T) in ixgbe_identify_phy_E610()
4713 hw->phy.autoneg_advertised = hw->phy.speeds_supported; in ixgbe_identify_phy_E610()
4718 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_identify_phy_E610()
4721 memcpy(&hw->phy.id, pcaps.phy_id_oui, sizeof(u32)); in ixgbe_identify_phy_E610()
4727 * ixgbe_identify_module_E610 - Identify SFP module type
4728 * @hw: pointer to hardware structure
4734 s32 ixgbe_identify_module_E610(struct ixgbe_hw *hw) in ixgbe_identify_module_E610() argument
4740 rc = ixgbe_update_link_info(hw); in ixgbe_identify_module_E610()
4745 (hw->link.link_info.link_info & in ixgbe_identify_module_E610()
4749 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_module_E610()
4751 /* Get module type from hw context updated by ixgbe_update_link_info() */ in ixgbe_identify_module_E610()
4752 module_type = hw->link.link_info.module_type[IXGBE_ACI_MOD_TYPE_IDENT]; in ixgbe_identify_module_E610()
4756 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; in ixgbe_identify_module_E610()
4758 hw->phy.sfp_type = ixgbe_sfp_type_sr; in ixgbe_identify_module_E610()
4761 hw->phy.sfp_type = ixgbe_sfp_type_lr; in ixgbe_identify_module_E610()
4765 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_module_E610()
4773 * ixgbe_setup_phy_link_E610 - Sets up firmware-controlled PHYs
4774 * @hw: pointer to hardware structure
4776 * Set the parameters for the firmware-controlled PHYs.
4780 s32 ixgbe_setup_phy_link_E610(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_E610() argument
4788 rc = ixgbe_aci_get_link_info(hw, false, NULL); in ixgbe_setup_phy_link_E610()
4794 if (!(hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE)) in ixgbe_setup_phy_link_E610()
4797 rc = ixgbe_aci_get_phy_caps(hw, false, rmode, &pcaps); in ixgbe_setup_phy_link_E610()
4806 rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_ACTIVE_CFG, in ixgbe_setup_phy_link_E610()
4817 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) { in ixgbe_setup_phy_link_E610()
4821 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) { in ixgbe_setup_phy_link_E610()
4826 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { in ixgbe_setup_phy_link_E610()
4834 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) { in ixgbe_setup_phy_link_E610()
4841 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) { in ixgbe_setup_phy_link_E610()
4846 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) { in ixgbe_setup_phy_link_E610()
4867 rc = ixgbe_aci_set_phy_cfg(hw, &pcfg); in ixgbe_setup_phy_link_E610()
4875 * ixgbe_get_phy_firmware_version_E610 - Gets the PHY Firmware Version
4876 * @hw: pointer to hardware structure
4884 s32 ixgbe_get_phy_firmware_version_E610(struct ixgbe_hw *hw, in ixgbe_get_phy_firmware_version_E610() argument
4893 status = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_get_phy_firmware_version_E610()
4899 /* TODO: determine which bytes of the 8-byte phy_fw_ver in ixgbe_get_phy_firmware_version_E610()
4900 * field should be written to the 2-byte firmware_version in ixgbe_get_phy_firmware_version_E610()
4908 * ixgbe_read_i2c_sff8472_E610 - Reads 8 bit word over I2C interface
4909 * @hw: pointer to hardware structure
4910 * @byte_offset: byte offset at address 0xA2
4913 * Performs byte read operation from SFP module's SFF-8472 data over I2C.
4917 s32 ixgbe_read_i2c_sff8472_E610(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_E610() argument
4920 return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR2, in ixgbe_read_i2c_sff8472_E610()
4927 * ixgbe_read_i2c_eeprom_E610 - Reads 8 bit EEPROM word over I2C interface
4928 * @hw: pointer to hardware structure
4936 s32 ixgbe_read_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_E610() argument
4939 return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR, in ixgbe_read_i2c_eeprom_E610()
4946 * ixgbe_write_i2c_eeprom_E610 - Writes 8 bit EEPROM word over I2C interface
4947 * @hw: pointer to hardware structure
4955 s32 ixgbe_write_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_eeprom_E610() argument
4958 return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR, in ixgbe_write_i2c_eeprom_E610()
4965 * ixgbe_check_overtemp_E610 - Check firmware-controlled PHYs for overtemp
4966 * @hw: pointer to hardware structure
4972 s32 ixgbe_check_overtemp_E610(struct ixgbe_hw *hw) in ixgbe_check_overtemp_E610() argument
4979 if (!hw) in ixgbe_check_overtemp_E610()
4984 resp->cmd_flags = IXGBE_CPU_TO_LE16(IXGBE_ACI_LSE_NOP); in ixgbe_check_overtemp_E610()
4986 status = ixgbe_aci_send_cmd(hw, &desc, &link_data, sizeof(link_data)); in ixgbe_check_overtemp_E610()
5000 * ixgbe_set_phy_power_E610 - Control power for copper PHY
5001 * @hw: pointer to hardware structure
5010 s32 ixgbe_set_phy_power_E610(struct ixgbe_hw *hw, bool on) in ixgbe_set_phy_power_E610() argument
5016 status = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_set_phy_power_E610()
5036 status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg); in ixgbe_set_phy_power_E610()
5042 * ixgbe_enter_lplu_E610 - Transition to low power states
5043 * @hw: pointer to hardware structure
5046 * (from D0 to non-D0). Link is required to enter LPLU so avoid resetting the
5051 s32 ixgbe_enter_lplu_E610(struct ixgbe_hw *hw) in ixgbe_enter_lplu_E610() argument
5057 status = ixgbe_aci_get_phy_caps(hw, false, in ixgbe_enter_lplu_E610()
5066 status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg); in ixgbe_enter_lplu_E610()
5072 * ixgbe_init_eeprom_params_E610 - Initialize EEPROM params
5073 * @hw: pointer to hardware structure
5080 s32 ixgbe_init_eeprom_params_E610(struct ixgbe_hw *hw) in ixgbe_init_eeprom_params_E610() argument
5082 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_E610()
5086 if (eeprom->type == ixgbe_eeprom_uninitialized) { in ixgbe_init_eeprom_params_E610()
5087 eeprom->type = ixgbe_flash; in ixgbe_init_eeprom_params_E610()
5089 gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS); in ixgbe_init_eeprom_params_E610()
5094 eeprom->word_size = BIT(sr_size) * IXGBE_SR_WORDS_IN_1KB; in ixgbe_init_eeprom_params_E610()
5097 eeprom->type, eeprom->word_size); in ixgbe_init_eeprom_params_E610()
5104 * ixgbe_read_ee_aci_E610 - Read EEPROM word using the admin command.
5105 * @hw: pointer to hardware structure
5116 s32 ixgbe_read_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 *data) in ixgbe_read_ee_aci_E610() argument
5120 if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { in ixgbe_read_ee_aci_E610()
5121 status = ixgbe_init_eeprom_params(hw); in ixgbe_read_ee_aci_E610()
5126 status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); in ixgbe_read_ee_aci_E610()
5130 status = ixgbe_read_sr_word_aci(hw, offset, data); in ixgbe_read_ee_aci_E610()
5131 ixgbe_release_nvm(hw); in ixgbe_read_ee_aci_E610()
5137 * ixgbe_read_ee_aci_buffer_E610- Read EEPROM word(s) using admin commands.
5138 * @hw: pointer to hardware structure
5150 s32 ixgbe_read_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset, in ixgbe_read_ee_aci_buffer_E610() argument
5155 if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { in ixgbe_read_ee_aci_buffer_E610()
5156 status = ixgbe_init_eeprom_params(hw); in ixgbe_read_ee_aci_buffer_E610()
5161 status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); in ixgbe_read_ee_aci_buffer_E610()
5165 status = ixgbe_read_sr_buf_aci(hw, offset, &words, data); in ixgbe_read_ee_aci_buffer_E610()
5166 ixgbe_release_nvm(hw); in ixgbe_read_ee_aci_buffer_E610()
5172 * ixgbe_write_ee_aci_E610 - Write EEPROM word using the admin command.
5173 * @hw: pointer to hardware structure
5184 s32 ixgbe_write_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 data) in ixgbe_write_ee_aci_E610() argument
5188 if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { in ixgbe_write_ee_aci_E610()
5189 status = ixgbe_init_eeprom_params(hw); in ixgbe_write_ee_aci_E610()
5194 status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); in ixgbe_write_ee_aci_E610()
5198 status = ixgbe_write_sr_word_aci(hw, (u32)offset, &data); in ixgbe_write_ee_aci_E610()
5199 ixgbe_release_nvm(hw); in ixgbe_write_ee_aci_E610()
5205 * ixgbe_write_ee_aci_buffer_E610 - Write EEPROM word(s) using admin commands.
5206 * @hw: pointer to hardware structure
5218 s32 ixgbe_write_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset, in ixgbe_write_ee_aci_buffer_E610() argument
5223 if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { in ixgbe_write_ee_aci_buffer_E610()
5224 status = ixgbe_init_eeprom_params(hw); in ixgbe_write_ee_aci_buffer_E610()
5229 status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); in ixgbe_write_ee_aci_buffer_E610()
5233 status = ixgbe_write_sr_buf_aci(hw, (u32)offset, words, data); in ixgbe_write_ee_aci_buffer_E610()
5234 ixgbe_release_nvm(hw); in ixgbe_write_ee_aci_buffer_E610()
5240 * ixgbe_calc_eeprom_checksum_E610 - Calculates and returns the checksum
5241 * @hw: pointer to hardware structure
5244 * except the VPD and PCIe ALT Auto-load modules. The structure and size of VPD
5251 * Return: the negative error code on error, or the 16-bit checksum
5253 s32 ixgbe_calc_eeprom_checksum_E610(struct ixgbe_hw *hw) in ixgbe_calc_eeprom_checksum_E610() argument
5265 if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { in ixgbe_calc_eeprom_checksum_E610()
5266 status = ixgbe_init_eeprom_params(hw); in ixgbe_calc_eeprom_checksum_E610()
5271 vmem = ixgbe_calloc(hw, IXGBE_SR_SECTOR_SIZE_IN_WORDS, sizeof(u16)); in ixgbe_calc_eeprom_checksum_E610()
5275 status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); in ixgbe_calc_eeprom_checksum_E610()
5281 status = ixgbe_read_sr_word_aci(hw, E610_SR_VPD_PTR, &vpd_module); in ixgbe_calc_eeprom_checksum_E610()
5285 /* read pointer to PCIe Alt Auto-load module */ in ixgbe_calc_eeprom_checksum_E610()
5286 status = ixgbe_read_sr_word_aci(hw, E610_SR_PCIE_ALT_AUTO_LOAD_PTR, in ixgbe_calc_eeprom_checksum_E610()
5292 * except the VPD and PCIe ALT Auto-load modules in ixgbe_calc_eeprom_checksum_E610()
5294 for (i = 0; i < hw->eeprom.word_size; i++) { in ixgbe_calc_eeprom_checksum_E610()
5299 status = ixgbe_read_sr_buf_aci(hw, i, &words, data); in ixgbe_calc_eeprom_checksum_E610()
5319 checksum = (u16)IXGBE_SR_SW_CHECKSUM_BASE - checksum_local; in ixgbe_calc_eeprom_checksum_E610()
5323 ixgbe_release_nvm(hw); in ixgbe_calc_eeprom_checksum_E610()
5324 ixgbe_free(hw, vmem); in ixgbe_calc_eeprom_checksum_E610()
5333 * ixgbe_update_eeprom_checksum_E610 - Updates the EEPROM checksum and flash
5334 * @hw: pointer to hardware structure
5345 s32 ixgbe_update_eeprom_checksum_E610(struct ixgbe_hw *hw) in ixgbe_update_eeprom_checksum_E610() argument
5349 if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { in ixgbe_update_eeprom_checksum_E610()
5350 status = ixgbe_init_eeprom_params(hw); in ixgbe_update_eeprom_checksum_E610()
5355 status = ixgbe_nvm_recalculate_checksum(hw); in ixgbe_update_eeprom_checksum_E610()
5358 status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); in ixgbe_update_eeprom_checksum_E610()
5362 status = ixgbe_nvm_write_activate(hw, IXGBE_ACI_NVM_ACTIV_REQ_EMPR, in ixgbe_update_eeprom_checksum_E610()
5364 ixgbe_release_nvm(hw); in ixgbe_update_eeprom_checksum_E610()
5370 * ixgbe_validate_eeprom_checksum_E610 - Validate EEPROM checksum
5371 * @hw: pointer to hardware structure
5382 s32 ixgbe_validate_eeprom_checksum_E610(struct ixgbe_hw *hw, u16 *checksum_val) in ixgbe_validate_eeprom_checksum_E610() argument
5386 if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { in ixgbe_validate_eeprom_checksum_E610()
5387 status = ixgbe_init_eeprom_params(hw); in ixgbe_validate_eeprom_checksum_E610()
5392 status = ixgbe_nvm_validate_checksum(hw); in ixgbe_validate_eeprom_checksum_E610()
5399 status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); in ixgbe_validate_eeprom_checksum_E610()
5403 status = ixgbe_read_sr_word_aci(hw, E610_SR_SW_CHECKSUM_WORD, in ixgbe_validate_eeprom_checksum_E610()
5405 ixgbe_release_nvm(hw); in ixgbe_validate_eeprom_checksum_E610()
5415 * ixgbe_get_pfa_module_tlv - Reads sub module TLV from NVM PFA
5416 * @hw: pointer to hardware structure
5427 static s32 ixgbe_get_pfa_module_tlv(struct ixgbe_hw *hw, u16 *module_tlv, in ixgbe_get_pfa_module_tlv() argument
5434 status = ixgbe_read_ee_aci_E610(hw, E610_SR_PFA_PTR, &pfa_ptr); in ixgbe_get_pfa_module_tlv()
5438 status = ixgbe_read_ee_aci_E610(hw, pfa_ptr, &pfa_len); in ixgbe_get_pfa_module_tlv()
5451 status = ixgbe_read_ee_aci_E610(hw, next_tlv, in ixgbe_get_pfa_module_tlv()
5457 status = ixgbe_read_ee_aci_E610(hw, next_tlv + 1, &tlv_len); in ixgbe_get_pfa_module_tlv()
5479 * ixgbe_read_pba_string_E610 - Reads part number string from NVM
5480 * @hw: pointer to hardware structure
5488 s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, in ixgbe_read_pba_string_E610() argument
5496 status = ixgbe_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len, in ixgbe_read_pba_string_E610()
5503 status = ixgbe_read_ee_aci_E610(hw, (pba_tlv + 2), &pba_size); in ixgbe_read_pba_string_E610()
5515 pba_size--; in ixgbe_read_pba_string_E610()
5521 status = ixgbe_read_ee_aci_E610(hw, (pba_tlv + 2 + 1) + i, in ixgbe_read_pba_string_E610()