2   SPDX-License-Identifier: BSD-3-Clause
4   Copyright (c) 2001-2020, Intel Corporation
41  * ixgbe_dcb_get_tc_stats_82599 - Returns status for each traffic class
62 		stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc));  in ixgbe_dcb_get_tc_stats_82599()
64 		stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(tc));  in ixgbe_dcb_get_tc_stats_82599()
65 		stats->qbtc[tc] +=  in ixgbe_dcb_get_tc_stats_82599()
68 		stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc));  in ixgbe_dcb_get_tc_stats_82599()
70 		stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(tc));  in ixgbe_dcb_get_tc_stats_82599()
71 		stats->qbrc[tc] +=  in ixgbe_dcb_get_tc_stats_82599()
75 		stats->qprdc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRDC(tc));  in ixgbe_dcb_get_tc_stats_82599()
82  * ixgbe_dcb_get_pfc_stats_82599 - Return CBFC status data
102 		stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc));  in ixgbe_dcb_get_pfc_stats_82599()
104 		stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(tc));  in ixgbe_dcb_get_pfc_stats_82599()
111  * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter
174  * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter
181  * Configure Tx Descriptor Arbiter and credits for each traffic class.
189 	/* Clear the per-Tx queue credits; we use per-TC instead */  in ixgbe_dcb_config_tx_desc_arbiter_82599()
212 	 * Configure Tx descriptor plane (recycle mode; WSP) and  in ixgbe_dcb_config_tx_desc_arbiter_82599()
222  * ixgbe_dcb_config_tx_data_arbiter_82599 - Config Tx Data arbiter
230  * Configure Tx Packet Arbiter and credits for each traffic class.
276 	 * Configure Tx packet plane (recycle mode; SP; arb delay) and  in ixgbe_dcb_config_tx_data_arbiter_82599()
287  * ixgbe_dcb_config_pfc_82599 - Configure priority flow control
313 	if (hw->mac.type >= ixgbe_mac_X540)  in ixgbe_dcb_config_pfc_82599()
327 	/* Configure PFC Tx thresholds per TC */  in ixgbe_dcb_config_pfc_82599()
339 			reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;  in ixgbe_dcb_config_pfc_82599()
340 			fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE;  in ixgbe_dcb_config_pfc_82599()
344 			 * In order to prevent Tx hangs when the internal Tx  in ixgbe_dcb_config_pfc_82599()
346 			 * to the Rx packet buffer size - 24KB.  This allows  in ixgbe_dcb_config_pfc_82599()
347 			 * the Tx switch to function even under heavy Rx  in ixgbe_dcb_config_pfc_82599()
350 			reg = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576;  in ixgbe_dcb_config_pfc_82599()
363 	reg = hw->fc.pause_time | (hw->fc.pause_time << 16);  in ixgbe_dcb_config_pfc_82599()
368 	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);  in ixgbe_dcb_config_pfc_82599()
374  * ixgbe_dcb_config_tc_stats_82599 - Config traffic class statistics
378  * Configure queue statistics registers, all queues belonging to same traffic
390 		tc_count = dcb_config->num_tcs.pg_tcs;  in ixgbe_dcb_config_tc_stats_82599()
391 		vt_mode = dcb_config->vt_mode;  in ixgbe_dcb_config_tc_stats_82599()
399 		 * Receive Queues stats setting  in ixgbe_dcb_config_tc_stats_82599()
400 		 * 32 RQSMR registers, each configuring 4 queues.  in ixgbe_dcb_config_tc_stats_82599()
402 		 * Set all 16 queues of each TC to the same stat  in ixgbe_dcb_config_tc_stats_82599()
410 		 * Transmit Queues stats setting  in ixgbe_dcb_config_tc_stats_82599()
411 		 * 32 TQSM registers, each controlling 4 queues.  in ixgbe_dcb_config_tc_stats_82599()
413 		 * Set all queues of each TC to the same stat  in ixgbe_dcb_config_tc_stats_82599()
415 		 * Tx queues are allocated non-uniformly to TCs:  in ixgbe_dcb_config_tc_stats_82599()
439 		 * Receive Queues stats setting  in ixgbe_dcb_config_tc_stats_82599()
440 		 * 32 RQSMR registers, each configuring 4 queues.  in ixgbe_dcb_config_tc_stats_82599()
442 		 * Set all 16 queues of each TC to the same stat  in ixgbe_dcb_config_tc_stats_82599()
447 				/* In 4 TC mode, odd 16-queue ranges are  in ixgbe_dcb_config_tc_stats_82599()
455 		 * Transmit Queues stats setting  in ixgbe_dcb_config_tc_stats_82599()
456 		 * 32 TQSM registers, each controlling 4 queues.  in ixgbe_dcb_config_tc_stats_82599()
458 		 * Set all queues of each TC to the same stat  in ixgbe_dcb_config_tc_stats_82599()
460 		 * Tx queues are allocated non-uniformly to TCs:  in ixgbe_dcb_config_tc_stats_82599()
476 		 * Receive Queues stats setting  in ixgbe_dcb_config_tc_stats_82599()
477 		 * 32 RQSMR registers, each configuring 4 queues.  in ixgbe_dcb_config_tc_stats_82599()
480 		 * pool. Set all 32 queues of each TC across pools to the same  in ixgbe_dcb_config_tc_stats_82599()
486 		 * Transmit Queues stats setting  in ixgbe_dcb_config_tc_stats_82599()
487 		 * 32 TQSM registers, each controlling 4 queues.  in ixgbe_dcb_config_tc_stats_82599()
490 		 * pool. Set all 32 queues of each TC across pools to the same  in ixgbe_dcb_config_tc_stats_82599()
501  * ixgbe_dcb_config_82599 - Configure general DCB parameters
513 	/* Disable the Tx desc arbiter so that MTQC can be changed */  in ixgbe_dcb_config_82599()
519 	if (dcb_config->num_tcs.pg_tcs == 8) {  in ixgbe_dcb_config_82599()
544 	if (dcb_config->num_tcs.pg_tcs == 4) {  in ixgbe_dcb_config_82599()
545 		/* We support both VT-on and VT-off with 4 TCs. */  in ixgbe_dcb_config_82599()
546 		if (dcb_config->vt_mode)  in ixgbe_dcb_config_82599()
555 	/* Enable DCB for Tx with 8 TCs */  in ixgbe_dcb_config_82599()
556 	if (dcb_config->num_tcs.pg_tcs == 8)  in ixgbe_dcb_config_82599()
559 		/* We support both VT-on and VT-off with 4 TCs. */  in ixgbe_dcb_config_82599()
561 		if (dcb_config->vt_mode)  in ixgbe_dcb_config_82599()
566 	/* Disable drop for all queues */  in ixgbe_dcb_config_82599()
571 	/* Enable the Tx desc arbiter */  in ixgbe_dcb_config_82599()
576 	/* Enable Security TX Buffer IFG for DCB */  in ixgbe_dcb_config_82599()
585  * ixgbe_dcb_hw_config_82599 - Configure and enable DCB