2   SPDX-License-Identifier: BSD-3-Clause
4   Copyright (c) 2001-2020, Intel Corporation
41  * ixgbe_dcb_get_tc_stats_82599 - Returns status for each traffic class
60 	for (tc = 0; tc < tc_count; tc++) {  in ixgbe_dcb_get_tc_stats_82599()
62 		stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc));  in ixgbe_dcb_get_tc_stats_82599()
64 		stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(tc));  in ixgbe_dcb_get_tc_stats_82599()
65 		stats->qbtc[tc] +=  in ixgbe_dcb_get_tc_stats_82599()
68 		stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc));  in ixgbe_dcb_get_tc_stats_82599()
70 		stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(tc));  in ixgbe_dcb_get_tc_stats_82599()
71 		stats->qbrc[tc] +=  in ixgbe_dcb_get_tc_stats_82599()
75 		stats->qprdc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRDC(tc));  in ixgbe_dcb_get_tc_stats_82599()
82  * ixgbe_dcb_get_pfc_stats_82599 - Return CBFC status data
100 	for (tc = 0; tc < tc_count; tc++) {  in ixgbe_dcb_get_pfc_stats_82599()
102 		stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc));  in ixgbe_dcb_get_pfc_stats_82599()
104 		stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(tc));  in ixgbe_dcb_get_pfc_stats_82599()
111  * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter
115  * @bwg_id: bandwidth grouping indexed by traffic class
116  * @tsa: transmission selection algorithm indexed by traffic class
117  * @map: priority to tc assignments indexed by priority
125 	u32 reg = 0;  in ixgbe_dcb_config_rx_arbiter_82599()
126 	u32 credit_refill = 0;  in ixgbe_dcb_config_rx_arbiter_82599()
127 	u32 credit_max = 0;  in ixgbe_dcb_config_rx_arbiter_82599()
128 	u8  i = 0;  in ixgbe_dcb_config_rx_arbiter_82599()
143 	reg = 0;  in ixgbe_dcb_config_rx_arbiter_82599()
144 	for (i = 0; i < IXGBE_DCB_MAX_USER_PRIORITY; i++)  in ixgbe_dcb_config_rx_arbiter_82599()
150 	for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {  in ixgbe_dcb_config_rx_arbiter_82599()
174  * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter
178  * @bwg_id: bandwidth grouping indexed by traffic class
179  * @tsa: transmission selection algorithm indexed by traffic class
189 	/* Clear the per-Tx queue credits; we use per-TC instead */  in ixgbe_dcb_config_tx_desc_arbiter_82599()
190 	for (i = 0; i < 128; i++) {  in ixgbe_dcb_config_tx_desc_arbiter_82599()
192 		IXGBE_WRITE_REG(hw, IXGBE_RTTDT1C, 0);  in ixgbe_dcb_config_tx_desc_arbiter_82599()
196 	for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {  in ixgbe_dcb_config_tx_desc_arbiter_82599()
222  * ixgbe_dcb_config_tx_data_arbiter_82599 - Config Tx Data arbiter
226  * @bwg_id: bandwidth grouping indexed by traffic class
227  * @tsa: transmission selection algorithm indexed by traffic class
228  * @map: priority to tc assignments indexed by priority
254 	reg = 0;  in ixgbe_dcb_config_tx_data_arbiter_82599()
255 	for (i = 0; i < IXGBE_DCB_MAX_USER_PRIORITY; i++)  in ixgbe_dcb_config_tx_data_arbiter_82599()
261 	for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {  in ixgbe_dcb_config_tx_data_arbiter_82599()
287  * ixgbe_dcb_config_pfc_82599 - Configure priority flow control
290  * @map: priority to tc assignments indexed by priority
297 	u8 max_tc = 0;  in ixgbe_dcb_config_pfc_82599()
313 	if (hw->mac.type >= ixgbe_mac_X540)  in ixgbe_dcb_config_pfc_82599()
321 	for (i = 0; i < IXGBE_DCB_MAX_USER_PRIORITY; i++) {  in ixgbe_dcb_config_pfc_82599()
328 	for (i = 0; i <= max_tc; i++) {  in ixgbe_dcb_config_pfc_82599()
329 		int enabled = 0;  in ixgbe_dcb_config_pfc_82599()
331 		for (j = 0; j < IXGBE_DCB_MAX_USER_PRIORITY; j++) {  in ixgbe_dcb_config_pfc_82599()
339 			reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;  in ixgbe_dcb_config_pfc_82599()
340 			fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE;  in ixgbe_dcb_config_pfc_82599()
346 			 * to the Rx packet buffer size - 24KB.  This allows  in ixgbe_dcb_config_pfc_82599()
350 			reg = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576;  in ixgbe_dcb_config_pfc_82599()
351 			IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);  in ixgbe_dcb_config_pfc_82599()
358 		IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);  in ixgbe_dcb_config_pfc_82599()
359 		IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), 0);  in ixgbe_dcb_config_pfc_82599()
363 	reg = hw->fc.pause_time | (hw->fc.pause_time << 16);  in ixgbe_dcb_config_pfc_82599()
364 	for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++)  in ixgbe_dcb_config_pfc_82599()
368 	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);  in ixgbe_dcb_config_pfc_82599()
374  * ixgbe_dcb_config_tc_stats_82599 - Config traffic class statistics
384 	u32 reg = 0;  in ixgbe_dcb_config_tc_stats_82599()
385 	u8  i   = 0;  in ixgbe_dcb_config_tc_stats_82599()
390 		tc_count = dcb_config->num_tcs.pg_tcs;  in ixgbe_dcb_config_tc_stats_82599()
391 		vt_mode = dcb_config->vt_mode;  in ixgbe_dcb_config_tc_stats_82599()
405 		for (i = 0; i < 32; i++) {  in ixgbe_dcb_config_tc_stats_82599()
406 			reg = 0x01010101 * (i / 4);  in ixgbe_dcb_config_tc_stats_82599()
415 		 * Tx queues are allocated non-uniformly to TCs:  in ixgbe_dcb_config_tc_stats_82599()
418 		for (i = 0; i < 32; i++) {  in ixgbe_dcb_config_tc_stats_82599()
420 				reg = 0x00000000;  in ixgbe_dcb_config_tc_stats_82599()
422 				reg = 0x01010101;  in ixgbe_dcb_config_tc_stats_82599()
424 				reg = 0x02020202;  in ixgbe_dcb_config_tc_stats_82599()
426 				reg = 0x03030303;  in ixgbe_dcb_config_tc_stats_82599()
428 				reg = 0x04040404;  in ixgbe_dcb_config_tc_stats_82599()
430 				reg = 0x05050505;  in ixgbe_dcb_config_tc_stats_82599()
432 				reg = 0x06060606;  in ixgbe_dcb_config_tc_stats_82599()
434 				reg = 0x07070707;  in ixgbe_dcb_config_tc_stats_82599()
445 		for (i = 0; i < 32; i++) {  in ixgbe_dcb_config_tc_stats_82599()
447 				/* In 4 TC mode, odd 16-queue ranges are  in ixgbe_dcb_config_tc_stats_82599()
451 			reg = 0x01010101 * (i / 8);  in ixgbe_dcb_config_tc_stats_82599()
460 		 * Tx queues are allocated non-uniformly to TCs:  in ixgbe_dcb_config_tc_stats_82599()
463 		for (i = 0; i < 32; i++) {  in ixgbe_dcb_config_tc_stats_82599()
465 				reg = 0x00000000;  in ixgbe_dcb_config_tc_stats_82599()
467 				reg = 0x01010101;  in ixgbe_dcb_config_tc_stats_82599()
469 				reg = 0x02020202;  in ixgbe_dcb_config_tc_stats_82599()
471 				reg = 0x03030303;  in ixgbe_dcb_config_tc_stats_82599()
483 		for (i = 0; i < 32; i++)  in ixgbe_dcb_config_tc_stats_82599()
484 			IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), 0x03020100);  in ixgbe_dcb_config_tc_stats_82599()
493 		for (i = 0; i < 32; i++)  in ixgbe_dcb_config_tc_stats_82599()
494 			IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), 0x03020100);  in ixgbe_dcb_config_tc_stats_82599()
501  * ixgbe_dcb_config_82599 - Configure general DCB parameters
519 	if (dcb_config->num_tcs.pg_tcs == 8) {  in ixgbe_dcb_config_82599()
522 		case 0:  in ixgbe_dcb_config_82599()
539 			ASSERT(0);  in ixgbe_dcb_config_82599()
544 	if (dcb_config->num_tcs.pg_tcs == 4) {  in ixgbe_dcb_config_82599()
545 		/* We support both VT-on and VT-off with 4 TCs. */  in ixgbe_dcb_config_82599()
546 		if (dcb_config->vt_mode)  in ixgbe_dcb_config_82599()
556 	if (dcb_config->num_tcs.pg_tcs == 8)  in ixgbe_dcb_config_82599()
559 		/* We support both VT-on and VT-off with 4 TCs. */  in ixgbe_dcb_config_82599()
561 		if (dcb_config->vt_mode)  in ixgbe_dcb_config_82599()
567 	for (q = 0; q < 128; q++)  in ixgbe_dcb_config_82599()
585  * ixgbe_dcb_hw_config_82599 - Configure and enable DCB
590  * @bwg_id: bandwidth grouping indexed by traffic class
591  * @tsa: transmission selection algorithm indexed by traffic class
592  * @map: priority to tc assignments indexed by priority