Lines Matching +full:spi +full:- +full:lsb +full:- +full:first
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
64 * ixgbe_init_ops_generic - Inits function ptrs
71 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_ops_generic()
72 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_generic()
78 eeprom->ops.init_params = ixgbe_init_eeprom_params_generic; in ixgbe_init_ops_generic()
81 eeprom->ops.read = ixgbe_read_eerd_generic; in ixgbe_init_ops_generic()
82 eeprom->ops.read_buffer = ixgbe_read_eerd_buffer_generic; in ixgbe_init_ops_generic()
84 eeprom->ops.read = ixgbe_read_eeprom_bit_bang_generic; in ixgbe_init_ops_generic()
85 eeprom->ops.read_buffer = in ixgbe_init_ops_generic()
88 eeprom->ops.write = ixgbe_write_eeprom_generic; in ixgbe_init_ops_generic()
89 eeprom->ops.write_buffer = ixgbe_write_eeprom_buffer_bit_bang_generic; in ixgbe_init_ops_generic()
90 eeprom->ops.validate_checksum = in ixgbe_init_ops_generic()
92 eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_generic; in ixgbe_init_ops_generic()
93 eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_generic; in ixgbe_init_ops_generic()
96 mac->ops.init_hw = ixgbe_init_hw_generic; in ixgbe_init_ops_generic()
97 mac->ops.reset_hw = NULL; in ixgbe_init_ops_generic()
98 mac->ops.start_hw = ixgbe_start_hw_generic; in ixgbe_init_ops_generic()
99 mac->ops.clear_hw_cntrs = ixgbe_clear_hw_cntrs_generic; in ixgbe_init_ops_generic()
100 mac->ops.get_media_type = NULL; in ixgbe_init_ops_generic()
101 mac->ops.get_supported_physical_layer = NULL; in ixgbe_init_ops_generic()
102 mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_generic; in ixgbe_init_ops_generic()
103 mac->ops.get_mac_addr = ixgbe_get_mac_addr_generic; in ixgbe_init_ops_generic()
104 mac->ops.stop_adapter = ixgbe_stop_adapter_generic; in ixgbe_init_ops_generic()
105 mac->ops.get_bus_info = ixgbe_get_bus_info_generic; in ixgbe_init_ops_generic()
106 mac->ops.set_lan_id = ixgbe_set_lan_id_multi_port_pcie; in ixgbe_init_ops_generic()
107 mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync; in ixgbe_init_ops_generic()
108 mac->ops.release_swfw_sync = ixgbe_release_swfw_sync; in ixgbe_init_ops_generic()
109 mac->ops.prot_autoc_read = prot_autoc_read_generic; in ixgbe_init_ops_generic()
110 mac->ops.prot_autoc_write = prot_autoc_write_generic; in ixgbe_init_ops_generic()
113 mac->ops.led_on = ixgbe_led_on_generic; in ixgbe_init_ops_generic()
114 mac->ops.led_off = ixgbe_led_off_generic; in ixgbe_init_ops_generic()
115 mac->ops.blink_led_start = ixgbe_blink_led_start_generic; in ixgbe_init_ops_generic()
116 mac->ops.blink_led_stop = ixgbe_blink_led_stop_generic; in ixgbe_init_ops_generic()
117 mac->ops.init_led_link_act = ixgbe_init_led_link_act_generic; in ixgbe_init_ops_generic()
120 mac->ops.set_rar = ixgbe_set_rar_generic; in ixgbe_init_ops_generic()
121 mac->ops.clear_rar = ixgbe_clear_rar_generic; in ixgbe_init_ops_generic()
122 mac->ops.insert_mac_addr = NULL; in ixgbe_init_ops_generic()
123 mac->ops.set_vmdq = NULL; in ixgbe_init_ops_generic()
124 mac->ops.clear_vmdq = NULL; in ixgbe_init_ops_generic()
125 mac->ops.init_rx_addrs = ixgbe_init_rx_addrs_generic; in ixgbe_init_ops_generic()
126 mac->ops.update_uc_addr_list = ixgbe_update_uc_addr_list_generic; in ixgbe_init_ops_generic()
127 mac->ops.update_mc_addr_list = ixgbe_update_mc_addr_list_generic; in ixgbe_init_ops_generic()
128 mac->ops.enable_mc = ixgbe_enable_mc_generic; in ixgbe_init_ops_generic()
129 mac->ops.disable_mc = ixgbe_disable_mc_generic; in ixgbe_init_ops_generic()
130 mac->ops.clear_vfta = NULL; in ixgbe_init_ops_generic()
131 mac->ops.set_vfta = NULL; in ixgbe_init_ops_generic()
132 mac->ops.set_vlvf = NULL; in ixgbe_init_ops_generic()
133 mac->ops.init_uta_tables = NULL; in ixgbe_init_ops_generic()
134 mac->ops.enable_rx = ixgbe_enable_rx_generic; in ixgbe_init_ops_generic()
135 mac->ops.disable_rx = ixgbe_disable_rx_generic; in ixgbe_init_ops_generic()
136 mac->ops.toggle_txdctl = ixgbe_toggle_txdctl_generic; in ixgbe_init_ops_generic()
139 mac->ops.fc_enable = ixgbe_fc_enable_generic; in ixgbe_init_ops_generic()
140 mac->ops.setup_fc = ixgbe_setup_fc_generic; in ixgbe_init_ops_generic()
141 mac->ops.fc_autoneg = ixgbe_fc_autoneg; in ixgbe_init_ops_generic()
144 mac->ops.get_link_capabilities = NULL; in ixgbe_init_ops_generic()
145 mac->ops.setup_link = NULL; in ixgbe_init_ops_generic()
146 mac->ops.check_link = NULL; in ixgbe_init_ops_generic()
147 mac->ops.dmac_config = NULL; in ixgbe_init_ops_generic()
148 mac->ops.dmac_update_tcs = NULL; in ixgbe_init_ops_generic()
149 mac->ops.dmac_config_tcs = NULL; in ixgbe_init_ops_generic()
155 * ixgbe_device_supports_autoneg_fc - Check if device supports autonegotiation
171 switch (hw->phy.media_type) { in ixgbe_device_supports_autoneg_fc()
176 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
185 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_device_supports_autoneg_fc()
196 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_XFI) in ixgbe_device_supports_autoneg_fc()
203 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
228 hw->device_id); in ixgbe_device_supports_autoneg_fc()
234 * ixgbe_setup_fc_generic - Set up flow control
249 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { in ixgbe_setup_fc_generic()
260 if (hw->fc.requested_mode == ixgbe_fc_default) in ixgbe_setup_fc_generic()
261 hw->fc.requested_mode = ixgbe_fc_full; in ixgbe_setup_fc_generic()
268 switch (hw->phy.media_type) { in ixgbe_setup_fc_generic()
271 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, ®_bp); in ixgbe_setup_fc_generic()
284 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_setup_fc_generic()
301 switch (hw->fc.requested_mode) { in ixgbe_setup_fc_generic()
305 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
308 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
318 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
321 } else if (hw->phy.media_type == ixgbe_media_type_copper) { in ixgbe_setup_fc_generic()
339 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
342 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
353 if (hw->mac.type < ixgbe_mac_X540) { in ixgbe_setup_fc_generic()
355 * Enable auto-negotiation between the MAC & PHY; in ixgbe_setup_fc_generic()
362 if (hw->fc.strict_ieee) in ixgbe_setup_fc_generic()
374 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
376 ret_val = hw->mac.ops.prot_autoc_write(hw, reg_bp, locked); in ixgbe_setup_fc_generic()
379 } else if ((hw->phy.media_type == ixgbe_media_type_copper) && in ixgbe_setup_fc_generic()
381 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_setup_fc_generic()
391 * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
408 hw->phy.media_type = hw->mac.ops.get_media_type(hw); in ixgbe_start_hw_generic()
413 hw->mac.ops.clear_vfta(hw); in ixgbe_start_hw_generic()
416 hw->mac.ops.clear_hw_cntrs(hw); in ixgbe_start_hw_generic()
432 switch (hw->mac.type) { in ixgbe_start_hw_generic()
436 hw->mac.ops.get_device_caps(hw, &device_caps); in ixgbe_start_hw_generic()
438 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
440 hw->need_crosstalk_fix = true; in ixgbe_start_hw_generic()
443 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
448 hw->adapter_stopped = false; in ixgbe_start_hw_generic()
454 * ixgbe_start_hw_gen2 - Init sequence for common device family
469 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_start_hw_gen2()
476 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_start_hw_gen2()
482 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_start_hw_gen2()
491 * ixgbe_init_hw_generic - Generic hardware initialization
507 status = hw->mac.ops.reset_hw(hw); in ixgbe_init_hw_generic()
511 status = hw->mac.ops.start_hw(hw); in ixgbe_init_hw_generic()
515 if (hw->mac.ops.init_led_link_act) in ixgbe_init_hw_generic()
516 hw->mac.ops.init_led_link_act(hw); in ixgbe_init_hw_generic()
525 * ixgbe_clear_hw_cntrs_generic - Generic clear hardware counters
549 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
560 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
568 if (hw->mac.type >= ixgbe_mac_82599EB) in ixgbe_clear_hw_cntrs_generic()
585 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_clear_hw_cntrs_generic()
610 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
622 if (hw->mac.type == ixgbe_mac_X540 || in ixgbe_clear_hw_cntrs_generic()
623 hw->mac.type == ixgbe_mac_X550) { in ixgbe_clear_hw_cntrs_generic()
624 if (hw->phy.id == 0) in ixgbe_clear_hw_cntrs_generic()
626 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL, in ixgbe_clear_hw_cntrs_generic()
628 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH, in ixgbe_clear_hw_cntrs_generic()
630 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL, in ixgbe_clear_hw_cntrs_generic()
632 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH, in ixgbe_clear_hw_cntrs_generic()
640 * ixgbe_read_pba_string_generic - Reads part number string from EEPROM
663 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); in ixgbe_read_pba_string_generic()
669 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr); in ixgbe_read_pba_string_generic()
696 pba_num[6] = '-'; in ixgbe_read_pba_string_generic()
704 /* switch all the data but the '-' to hex char */ in ixgbe_read_pba_string_generic()
709 pba_num[offset] += 'A' - 0xA; in ixgbe_read_pba_string_generic()
715 ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length); in ixgbe_read_pba_string_generic()
721 if (length == 0xFFFF || length == 0 || length > hw->eeprom.word_size) { in ixgbe_read_pba_string_generic()
727 if (pba_num_size < (((u32)length * 2) - 1)) { in ixgbe_read_pba_string_generic()
734 length--; in ixgbe_read_pba_string_generic()
737 ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data); in ixgbe_read_pba_string_generic()
751 * ixgbe_read_pba_num_generic - Reads part number from EEPROM
764 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); in ixgbe_read_pba_num_generic()
774 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &data); in ixgbe_read_pba_num_generic()
807 ret_val = hw->eeprom.ops.read_buffer(hw, IXGBE_PBANUM0_PTR, 2, in ixgbe_read_pba_raw()
808 &pba->word[0]); in ixgbe_read_pba_raw()
813 pba->word[0] = eeprom_buf[IXGBE_PBANUM0_PTR]; in ixgbe_read_pba_raw()
814 pba->word[1] = eeprom_buf[IXGBE_PBANUM1_PTR]; in ixgbe_read_pba_raw()
820 if (pba->word[0] == IXGBE_PBANUM_PTR_GUARD) { in ixgbe_read_pba_raw()
821 if (pba->pba_block == NULL) in ixgbe_read_pba_raw()
834 ret_val = hw->eeprom.ops.read_buffer(hw, pba->word[1], in ixgbe_read_pba_raw()
836 pba->pba_block); in ixgbe_read_pba_raw()
840 if (eeprom_buf_size > (u32)(pba->word[1] + in ixgbe_read_pba_raw()
842 memcpy(pba->pba_block, in ixgbe_read_pba_raw()
843 &eeprom_buf[pba->word[1]], in ixgbe_read_pba_raw()
874 ret_val = hw->eeprom.ops.write_buffer(hw, IXGBE_PBANUM0_PTR, 2, in ixgbe_write_pba_raw()
875 &pba->word[0]); in ixgbe_write_pba_raw()
880 eeprom_buf[IXGBE_PBANUM0_PTR] = pba->word[0]; in ixgbe_write_pba_raw()
881 eeprom_buf[IXGBE_PBANUM1_PTR] = pba->word[1]; in ixgbe_write_pba_raw()
887 if (pba->word[0] == IXGBE_PBANUM_PTR_GUARD) { in ixgbe_write_pba_raw()
888 if (pba->pba_block == NULL) in ixgbe_write_pba_raw()
892 ret_val = hw->eeprom.ops.write_buffer(hw, pba->word[1], in ixgbe_write_pba_raw()
893 pba->pba_block[0], in ixgbe_write_pba_raw()
894 pba->pba_block); in ixgbe_write_pba_raw()
898 if (eeprom_buf_size > (u32)(pba->word[1] + in ixgbe_write_pba_raw()
899 pba->pba_block[0])) { in ixgbe_write_pba_raw()
900 memcpy(&eeprom_buf[pba->word[1]], in ixgbe_write_pba_raw()
901 pba->pba_block, in ixgbe_write_pba_raw()
902 pba->pba_block[0] * sizeof(u16)); in ixgbe_write_pba_raw()
934 ret_val = hw->eeprom.ops.read_buffer(hw, IXGBE_PBANUM0_PTR, 2, in ixgbe_get_pba_block_size()
949 ret_val = hw->eeprom.ops.read(hw, pba_word[1] + 0, in ixgbe_get_pba_block_size()
974 * ixgbe_get_mac_addr_generic - Generic get MAC address
978 * Reads the adapter's MAC address from first Receive Address Register (RAR0)
1003 * ixgbe_set_pci_config_data_generic - Generic store PCI bus info
1011 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_set_pci_config_data_generic()
1013 if (hw->bus.type == ixgbe_bus_type_unknown) in ixgbe_set_pci_config_data_generic()
1014 hw->bus.type = ixgbe_bus_type_pci_express; in ixgbe_set_pci_config_data_generic()
1018 hw->bus.width = ixgbe_bus_width_pcie_x1; in ixgbe_set_pci_config_data_generic()
1021 hw->bus.width = ixgbe_bus_width_pcie_x2; in ixgbe_set_pci_config_data_generic()
1024 hw->bus.width = ixgbe_bus_width_pcie_x4; in ixgbe_set_pci_config_data_generic()
1027 hw->bus.width = ixgbe_bus_width_pcie_x8; in ixgbe_set_pci_config_data_generic()
1030 hw->bus.width = ixgbe_bus_width_unknown; in ixgbe_set_pci_config_data_generic()
1036 hw->bus.speed = ixgbe_bus_speed_2500; in ixgbe_set_pci_config_data_generic()
1039 hw->bus.speed = ixgbe_bus_speed_5000; in ixgbe_set_pci_config_data_generic()
1042 hw->bus.speed = ixgbe_bus_speed_8000; in ixgbe_set_pci_config_data_generic()
1045 hw->bus.speed = ixgbe_bus_speed_16000; in ixgbe_set_pci_config_data_generic()
1048 hw->bus.speed = ixgbe_bus_speed_unknown; in ixgbe_set_pci_config_data_generic()
1052 mac->ops.set_lan_id(hw); in ixgbe_set_pci_config_data_generic()
1056 * ixgbe_get_bus_info_generic - Generic set PCI bus info
1069 link_status = IXGBE_READ_PCIE_WORD(hw, hw->mac.type == ixgbe_mac_E610 ? in ixgbe_get_bus_info_generic()
1079 * ixgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
1082 * Determines the LAN function id by reading memory-mapped registers and swaps
1088 struct ixgbe_bus_info *bus = &hw->bus; in ixgbe_set_lan_id_multi_port_pcie()
1095 bus->func = (reg & IXGBE_STATUS_LAN_ID) >> IXGBE_STATUS_LAN_ID_SHIFT; in ixgbe_set_lan_id_multi_port_pcie()
1096 bus->lan_id = (u8)bus->func; in ixgbe_set_lan_id_multi_port_pcie()
1101 bus->func ^= 0x1; in ixgbe_set_lan_id_multi_port_pcie()
1104 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) { in ixgbe_set_lan_id_multi_port_pcie()
1105 hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4); in ixgbe_set_lan_id_multi_port_pcie()
1106 bus->instance_id = (ee_ctrl_4 & IXGBE_EE_CTRL_4_INST_ID) >> in ixgbe_set_lan_id_multi_port_pcie()
1112 * ixgbe_stop_adapter_generic - Generic stop Tx/Rx units
1131 hw->adapter_stopped = true; in ixgbe_stop_adapter_generic()
1143 for (i = 0; i < hw->mac.max_tx_queues; i++) in ixgbe_stop_adapter_generic()
1147 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_stop_adapter_generic()
1159 * Prevent the PCI-E bus from hanging by disabling PCI-E primary in ixgbe_stop_adapter_generic()
1166 * ixgbe_init_led_link_act_generic - Store the LED index link/activity.
1174 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_led_link_act_generic()
1186 mac->led_link_act = i; in ixgbe_init_led_link_act_generic()
1195 switch (hw->mac.type) { in ixgbe_init_led_link_act_generic()
1198 mac->led_link_act = 1; in ixgbe_init_led_link_act_generic()
1201 mac->led_link_act = 2; in ixgbe_init_led_link_act_generic()
1207 * ixgbe_led_on_generic - Turns on the software controllable LEDs.
1230 * ixgbe_led_off_generic - Turns off the software controllable LEDs.
1253 * ixgbe_init_eeprom_params_generic - Initialize EEPROM params
1261 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_generic()
1267 if (eeprom->type == ixgbe_eeprom_uninitialized) { in ixgbe_init_eeprom_params_generic()
1268 eeprom->type = ixgbe_eeprom_none; in ixgbe_init_eeprom_params_generic()
1271 eeprom->semaphore_delay = 10; in ixgbe_init_eeprom_params_generic()
1273 eeprom->word_page_size = 0; in ixgbe_init_eeprom_params_generic()
1276 * Check for EEPROM present first. in ixgbe_init_eeprom_params_generic()
1281 eeprom->type = ixgbe_eeprom_spi; in ixgbe_init_eeprom_params_generic()
1284 * SPI EEPROM is assumed here. This code would need to in ixgbe_init_eeprom_params_generic()
1285 * change if a future EEPROM is not SPI. in ixgbe_init_eeprom_params_generic()
1289 eeprom->word_size = 1 << (eeprom_size + in ixgbe_init_eeprom_params_generic()
1294 eeprom->address_bits = 16; in ixgbe_init_eeprom_params_generic()
1296 eeprom->address_bits = 8; in ixgbe_init_eeprom_params_generic()
1298 "%d\n", eeprom->type, eeprom->word_size, in ixgbe_init_eeprom_params_generic()
1299 eeprom->address_bits); in ixgbe_init_eeprom_params_generic()
1306 * ixgbe_write_eeprom_buffer_bit_bang_generic - Write EEPROM using bit-bang
1312 * Reads 16 bit word(s) from EEPROM through bit-bang method
1322 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_buffer_bit_bang_generic()
1329 if (offset + words > hw->eeprom.word_size) { in ixgbe_write_eeprom_buffer_bit_bang_generic()
1338 if ((hw->eeprom.word_page_size == 0) && in ixgbe_write_eeprom_buffer_bit_bang_generic()
1348 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_write_eeprom_buffer_bit_bang_generic()
1349 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_write_eeprom_buffer_bit_bang_generic()
1362 * ixgbe_write_eeprom_buffer_bit_bang - Writes 16 bit word(s) to EEPROM
1404 * Some SPI eeproms use the 8th address bit embedded in ixgbe_write_eeprom_buffer_bit_bang()
1407 if ((hw->eeprom.address_bits == 8) && in ixgbe_write_eeprom_buffer_bit_bang()
1411 /* Send the Write command (8-bit opcode + addr) */ in ixgbe_write_eeprom_buffer_bit_bang()
1415 hw->eeprom.address_bits); in ixgbe_write_eeprom_buffer_bit_bang()
1417 page_size = hw->eeprom.word_page_size; in ixgbe_write_eeprom_buffer_bit_bang()
1419 /* Send the data in burst via SPI*/ in ixgbe_write_eeprom_buffer_bit_bang()
1429 if (((offset + i) & (page_size - 1)) == in ixgbe_write_eeprom_buffer_bit_bang()
1430 (page_size - 1)) in ixgbe_write_eeprom_buffer_bit_bang()
1437 /* Done with writing - release the EEPROM */ in ixgbe_write_eeprom_buffer_bit_bang()
1445 * ixgbe_write_eeprom_generic - Writes 16 bit value to EEPROM
1459 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_generic()
1461 if (offset >= hw->eeprom.word_size) { in ixgbe_write_eeprom_generic()
1473 * ixgbe_read_eeprom_buffer_bit_bang_generic - Read EEPROM using bit-bang
1479 * Reads 16 bit word(s) from EEPROM through bit-bang method
1489 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1496 if (offset + words > hw->eeprom.word_size) { in ixgbe_read_eeprom_buffer_bit_bang_generic()
1507 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_read_eeprom_buffer_bit_bang_generic()
1508 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1522 * ixgbe_read_eeprom_buffer_bit_bang - Read EEPROM using bit-bang
1528 * Reads 16 bit word(s) from EEPROM through bit-bang method
1554 * Some SPI eeproms use the 8th address bit embedded in ixgbe_read_eeprom_buffer_bit_bang()
1557 if ((hw->eeprom.address_bits == 8) && in ixgbe_read_eeprom_buffer_bit_bang()
1565 hw->eeprom.address_bits); in ixgbe_read_eeprom_buffer_bit_bang()
1580 * ixgbe_read_eeprom_bit_bang_generic - Read EEPROM word using bit-bang
1585 * Reads 16 bit value from EEPROM through bit-bang method
1594 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_bit_bang_generic()
1596 if (offset >= hw->eeprom.word_size) { in ixgbe_read_eeprom_bit_bang_generic()
1608 * ixgbe_read_eerd_buffer_generic - Read EEPROM word(s) using EERD
1625 hw->eeprom.ops.init_params(hw); in ixgbe_read_eerd_buffer_generic()
1633 if (offset >= hw->eeprom.word_size) { in ixgbe_read_eerd_buffer_generic()
1659 * ixgbe_detect_eeprom_page_size_generic - Detect EEPROM page size
1679 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX; in ixgbe_detect_eeprom_page_size_generic()
1682 hw->eeprom.word_page_size = 0; in ixgbe_detect_eeprom_page_size_generic()
1694 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; in ixgbe_detect_eeprom_page_size_generic()
1697 hw->eeprom.word_page_size); in ixgbe_detect_eeprom_page_size_generic()
1703 * ixgbe_read_eerd_generic - Read EEPROM word using EERD
1716 * ixgbe_write_eewr_buffer_generic - Write EEPROM word(s) using EEWR
1733 hw->eeprom.ops.init_params(hw); in ixgbe_write_eewr_buffer_generic()
1741 if (offset >= hw->eeprom.word_size) { in ixgbe_write_eewr_buffer_generic()
1772 * ixgbe_write_eewr_generic - Write EEPROM word using EEWR
1785 * ixgbe_poll_eerd_eewr_done - Poll EERD read or EEWR write status
1821 * ixgbe_acquire_eeprom - Acquire EEPROM using bit-bang
1824 * Prepares EEPROM for access using bit-bang method. This function should
1835 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) in ixgbe_acquire_eeprom()
1859 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_acquire_eeprom()
1876 * ixgbe_get_eeprom_semaphore - Get hardware semaphore
1879 * Sets the hardware semaphores so EEPROM access can occur for bit-bang method
1890 /* Get SMBI software semaphore between device drivers first */ in ixgbe_get_eeprom_semaphore()
1905 DEBUGOUT("Driver can't access the Eeprom - SMBI Semaphore " in ixgbe_get_eeprom_semaphore()
1966 * ixgbe_release_eeprom_semaphore - Release hardware semaphore
1986 * ixgbe_ready_eeprom - Polls for EEPROM ready
1998 * Read "Status Register" repeatedly until the LSB is cleared. The in ixgbe_ready_eeprom()
2015 * On some parts, SPI write time could vary from 0-20mSec on 3.3V in ixgbe_ready_eeprom()
2016 * devices (and only 0-5mSec on 5V devices) in ixgbe_ready_eeprom()
2019 DEBUGOUT("SPI EEPROM Status error\n"); in ixgbe_ready_eeprom()
2027 * ixgbe_standby_eeprom - Returns EEPROM to a "standby" state
2050 * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM.
2070 mask = 0x01 << (count - 1); in ixgbe_shift_out_eeprom_bits()
2107 * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM
2147 * ixgbe_raise_eeprom_clk - Raises the EEPROM's clock input.
2166 * ixgbe_lower_eeprom_clk - Lowers the EEPROM's clock input.
2185 * ixgbe_release_eeprom - Release EEPROM, release semaphores
2208 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_release_eeprom()
2211 msec_delay(hw->eeprom.semaphore_delay); in ixgbe_release_eeprom()
2215 * ixgbe_calc_eeprom_checksum_generic - Calculates and returns the checksum
2218 * Returns a negative error code on error, or the 16-bit checksum
2231 /* Include 0x0-0x3F in the checksum */ in ixgbe_calc_eeprom_checksum_generic()
2233 if (hw->eeprom.ops.read(hw, i, &word)) { in ixgbe_calc_eeprom_checksum_generic()
2242 if (hw->eeprom.ops.read(hw, i, &pointer)) { in ixgbe_calc_eeprom_checksum_generic()
2251 if (hw->eeprom.ops.read(hw, pointer, &length)) { in ixgbe_calc_eeprom_checksum_generic()
2260 if (hw->eeprom.ops.read(hw, j, &word)) { in ixgbe_calc_eeprom_checksum_generic()
2268 checksum = (u16)IXGBE_EEPROM_SUM - checksum; in ixgbe_calc_eeprom_checksum_generic()
2274 * ixgbe_validate_eeprom_checksum_generic - Validate EEPROM checksum
2290 /* Read the first word from the EEPROM. If this times out or fails, do in ixgbe_validate_eeprom_checksum_generic()
2294 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_validate_eeprom_checksum_generic()
2300 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_validate_eeprom_checksum_generic()
2306 status = hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum); in ixgbe_validate_eeprom_checksum_generic()
2326 * ixgbe_update_eeprom_checksum_generic - Updates the EEPROM checksum
2336 /* Read the first word from the EEPROM. If this times out or fails, do in ixgbe_update_eeprom_checksum_generic()
2340 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_update_eeprom_checksum_generic()
2346 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_update_eeprom_checksum_generic()
2352 status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM, checksum); in ixgbe_update_eeprom_checksum_generic()
2358 * ixgbe_validate_mac_addr - Validate MAC address
2384 * ixgbe_set_rar_generic - Set Rx address register
2397 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_rar_generic()
2409 hw->mac.ops.set_vmdq(hw, index, vmdq); in ixgbe_set_rar_generic()
2438 * ixgbe_clear_rar_generic - Remove Rx address register
2447 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_rar_generic()
2470 hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_clear_rar_generic()
2476 * ixgbe_init_rx_addrs_generic - Initializes receive address filters.
2486 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_init_rx_addrs_generic()
2495 if (ixgbe_validate_mac_addr(hw->mac.addr) == in ixgbe_init_rx_addrs_generic()
2498 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); in ixgbe_init_rx_addrs_generic()
2501 hw->mac.addr[0], hw->mac.addr[1], in ixgbe_init_rx_addrs_generic()
2502 hw->mac.addr[2]); in ixgbe_init_rx_addrs_generic()
2503 DEBUGOUT3("%.2X %.2X %.2X\n", hw->mac.addr[3], in ixgbe_init_rx_addrs_generic()
2504 hw->mac.addr[4], hw->mac.addr[5]); in ixgbe_init_rx_addrs_generic()
2509 hw->mac.addr[0], hw->mac.addr[1], in ixgbe_init_rx_addrs_generic()
2510 hw->mac.addr[2]); in ixgbe_init_rx_addrs_generic()
2511 DEBUGOUT3("%.2X %.2X %.2X\n", hw->mac.addr[3], in ixgbe_init_rx_addrs_generic()
2512 hw->mac.addr[4], hw->mac.addr[5]); in ixgbe_init_rx_addrs_generic()
2514 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); in ixgbe_init_rx_addrs_generic()
2518 hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_init_rx_addrs_generic()
2520 hw->addr_ctrl.overflow_promisc = 0; in ixgbe_init_rx_addrs_generic()
2522 hw->addr_ctrl.rar_used_count = 1; in ixgbe_init_rx_addrs_generic()
2525 DEBUGOUT1("Clearing RAR[1-%d]\n", rar_entries - 1); in ixgbe_init_rx_addrs_generic()
2532 hw->addr_ctrl.mta_in_use = 0; in ixgbe_init_rx_addrs_generic()
2533 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_init_rx_addrs_generic()
2536 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_init_rx_addrs_generic()
2545 * ixgbe_add_uc_addr - Adds a secondary unicast address.
2554 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_add_uc_addr()
2566 if (hw->addr_ctrl.rar_used_count < rar_entries) { in ixgbe_add_uc_addr()
2567 rar = hw->addr_ctrl.rar_used_count; in ixgbe_add_uc_addr()
2568 hw->mac.ops.set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV); in ixgbe_add_uc_addr()
2570 hw->addr_ctrl.rar_used_count++; in ixgbe_add_uc_addr()
2572 hw->addr_ctrl.overflow_promisc++; in ixgbe_add_uc_addr()
2579 * ixgbe_update_uc_addr_list_generic - Updates MAC list of secondary addresses
2587 * first secondary addresses, and falls back to promiscuous mode as needed.
2597 u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc; in ixgbe_update_uc_addr_list_generic()
2608 uc_addr_in_use = hw->addr_ctrl.rar_used_count - 1; in ixgbe_update_uc_addr_list_generic()
2609 hw->addr_ctrl.rar_used_count -= uc_addr_in_use; in ixgbe_update_uc_addr_list_generic()
2610 hw->addr_ctrl.overflow_promisc = 0; in ixgbe_update_uc_addr_list_generic()
2613 DEBUGOUT1("Clearing RAR[1-%d]\n", uc_addr_in_use+1); in ixgbe_update_uc_addr_list_generic()
2626 if (hw->addr_ctrl.overflow_promisc) { in ixgbe_update_uc_addr_list_generic()
2628 if (!old_promisc_setting && !hw->addr_ctrl.user_set_promisc) { in ixgbe_update_uc_addr_list_generic()
2636 if (old_promisc_setting && !hw->addr_ctrl.user_set_promisc) { in ixgbe_update_uc_addr_list_generic()
2649 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
2654 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
2655 * incoming rx multicast addresses, to determine the bit-vector to check in
2656 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
2666 switch (hw->mac.mc_filter_type) { in ixgbe_mta_vector()
2685 /* vector can only be 12-bits or boundary will be exceeded */ in ixgbe_mta_vector()
2691 * ixgbe_set_mta - Set bit-vector in multicast table
2695 * Sets the bit-vector in the multicast table.
2705 hw->addr_ctrl.mta_in_use++; in ixgbe_set_mta()
2708 DEBUGOUT1(" bit-vector = 0x%03X\n", vector); in ixgbe_set_mta()
2711 * The MTA is a register array of 128 32-bit registers. It is treated in ixgbe_set_mta()
2721 hw->mac.mta_shadow[vector_reg] |= (1 << vector_bit); in ixgbe_set_mta()
2725 * ixgbe_update_mc_addr_list_generic - Updates MAC list of multicast addresses
2748 hw->addr_ctrl.num_mc_addrs = mc_addr_count; in ixgbe_update_mc_addr_list_generic()
2749 hw->addr_ctrl.mta_in_use = 0; in ixgbe_update_mc_addr_list_generic()
2754 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); in ixgbe_update_mc_addr_list_generic()
2764 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_update_mc_addr_list_generic()
2766 hw->mac.mta_shadow[i]); in ixgbe_update_mc_addr_list_generic()
2768 if (hw->addr_ctrl.mta_in_use > 0) in ixgbe_update_mc_addr_list_generic()
2770 IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type); in ixgbe_update_mc_addr_list_generic()
2777 * ixgbe_enable_mc_generic - Enable multicast address in RAR
2784 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_enable_mc_generic()
2788 if (a->mta_in_use > 0) in ixgbe_enable_mc_generic()
2790 hw->mac.mc_filter_type); in ixgbe_enable_mc_generic()
2796 * ixgbe_disable_mc_generic - Disable multicast address in RAR
2803 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_disable_mc_generic()
2807 if (a->mta_in_use > 0) in ixgbe_disable_mc_generic()
2808 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_disable_mc_generic()
2814 * ixgbe_fc_enable_generic - Enable flow control
2830 if (!hw->fc.pause_time) { in ixgbe_fc_enable_generic()
2837 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2838 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2839 if (!hw->fc.low_water[i] || in ixgbe_fc_enable_generic()
2840 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2849 hw->mac.ops.fc_autoneg(hw); in ixgbe_fc_enable_generic()
2868 switch (hw->fc.current_mode) { in ixgbe_fc_enable_generic()
2914 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2915 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2916 fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; in ixgbe_fc_enable_generic()
2918 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_generic()
2924 * to the Rx packet buffer size - 24KB. This allows in ixgbe_fc_enable_generic()
2928 fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576; in ixgbe_fc_enable_generic()
2935 reg = hw->fc.pause_time * 0x00010001; in ixgbe_fc_enable_generic()
2940 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); in ixgbe_fc_enable_generic()
2947 * ixgbe_negotiate_fc - Negotiate flow control
2978 if (hw->fc.requested_mode == ixgbe_fc_full) { in ixgbe_negotiate_fc()
2979 hw->fc.current_mode = ixgbe_fc_full; in ixgbe_negotiate_fc()
2982 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2987 hw->fc.current_mode = ixgbe_fc_tx_pause; in ixgbe_negotiate_fc()
2991 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2994 hw->fc.current_mode = ixgbe_fc_none; in ixgbe_negotiate_fc()
3001 * ixgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber
3013 * - link is up but AN did not complete, or if in ixgbe_fc_autoneg_fiber()
3014 * - link is up and AN completed but timed out in ixgbe_fc_autoneg_fiber()
3020 DEBUGOUT("Auto-Negotiation did not complete or timed out\n"); in ixgbe_fc_autoneg_fiber()
3038 * ixgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37
3050 * - backplane autoneg was not completed, or if in ixgbe_fc_autoneg_backplane()
3051 * - we are 82599 and link partner is not AN enabled in ixgbe_fc_autoneg_backplane()
3055 DEBUGOUT("Auto-Negotiation did not complete\n"); in ixgbe_fc_autoneg_backplane()
3059 if (hw->mac.type == ixgbe_mac_82599EB) { in ixgbe_fc_autoneg_backplane()
3082 * ixgbe_fc_autoneg_copper - Enable flow control IEEE clause 37
3092 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_fc_autoneg_copper()
3095 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP, in ixgbe_fc_autoneg_copper()
3106 * ixgbe_fc_autoneg - Configure flow control
3123 * - FC autoneg is disabled, or if in ixgbe_fc_autoneg()
3124 * - link is not up. in ixgbe_fc_autoneg()
3126 if (hw->fc.disable_fc_autoneg) { in ixgbe_fc_autoneg()
3133 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_fc_autoneg()
3139 switch (hw->phy.media_type) { in ixgbe_fc_autoneg()
3165 hw->fc.fc_was_autonegged = true; in ixgbe_fc_autoneg()
3167 hw->fc.fc_was_autonegged = false; in ixgbe_fc_autoneg()
3168 hw->fc.current_mode = hw->fc.requested_mode; in ixgbe_fc_autoneg()
3173 * ixgbe_pcie_timeout_poll - Return number of times to poll for completion
3176 * System-wide timeout range is encoded in PCIe Device Control2 register.
3220 * ixgbe_disable_pcie_primary - Disable PCI-express primary access
3223 * Disables PCI-Express primary access and verifies there are no pending
3241 IXGBE_REMOVED(hw->hw_addr)) in ixgbe_disable_pcie_primary()
3254 * of this need. The first reset prevents new primary requests from in ixgbe_disable_pcie_primary()
3259 DEBUGOUT("GIO Primary Disable bit didn't clear - requesting resets\n"); in ixgbe_disable_pcie_primary()
3260 hw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_disable_pcie_primary()
3262 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_disable_pcie_primary()
3273 if (IXGBE_REMOVED(hw->hw_addr)) in ixgbe_disable_pcie_primary()
3288 * ixgbe_acquire_swfw_sync - Acquire SWFW semaphore
3335 * ixgbe_release_swfw_sync - Release SWFW semaphore
3359 * ixgbe_disable_sec_rx_path_generic - Stops the receive data path
3382 /* Use interrupt-safe sleep just in case */ in ixgbe_disable_sec_rx_path_generic()
3395 * prot_autoc_read_generic - Hides MAC differences needed for AUTOC read
3410 * prot_autoc_write_generic - Hides MAC differences needed for AUTOC write
3427 * ixgbe_enable_sec_rx_path_generic - Enables the receive data path
3447 * ixgbe_enable_rx_dma_generic - Enable the Rx DMA unit
3466 * ixgbe_blink_led_start_generic - Blink LED based on index.
3485 * Link must be up to auto-blink the LEDs; in ixgbe_blink_led_start_generic()
3488 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_blink_led_start_generic()
3491 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_start_generic()
3498 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_start_generic()
3516 * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
3532 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_stop_generic()
3539 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_stop_generic()
3554 * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
3570 * First read the EEPROM pointer to see if the MAC addresses are in ixgbe_get_san_mac_addr_offset()
3573 ret_val = hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR, in ixgbe_get_san_mac_addr_offset()
3585 * ixgbe_get_san_mac_addr_generic - SAN MAC address retrieval from the EEPROM
3590 * per-port, so set_lan_id() must be called before reading the addresses.
3592 * upon for non-SFP connections, so we must call it here.
3603 * First read the EEPROM pointer to see if the MAC addresses are in ixgbe_get_san_mac_addr_generic()
3611 hw->mac.ops.set_lan_id(hw); in ixgbe_get_san_mac_addr_generic()
3613 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : in ixgbe_get_san_mac_addr_generic()
3616 ret_val = hw->eeprom.ops.read(hw, san_mac_offset, in ixgbe_get_san_mac_addr_generic()
3641 * ixgbe_set_san_mac_addr_generic - Write the SAN MAC address to the EEPROM
3661 hw->mac.ops.set_lan_id(hw); in ixgbe_set_san_mac_addr_generic()
3663 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : in ixgbe_set_san_mac_addr_generic()
3669 hw->eeprom.ops.write(hw, san_mac_offset, san_mac_data); in ixgbe_set_san_mac_addr_generic()
3677 * ixgbe_get_pcie_msix_count_generic - Gets MSI-X vector count
3680 * Read PCIe configuration space, and get the MSI-X vector count from
3689 switch (hw->mac.type) { in ixgbe_get_pcie_msix_count_generic()
3712 if (IXGBE_REMOVED(hw->hw_addr)) in ixgbe_get_pcie_msix_count_generic()
3716 /* MSI-X count is zero-based in HW */ in ixgbe_get_pcie_msix_count_generic()
3726 * ixgbe_insert_mac_addr_generic - Find a RAR for this mac address
3751 * Either find the mac_id in rar or find the first empty space. in ixgbe_insert_mac_addr_generic()
3756 for (rar = 0; rar < hw->mac.rar_highwater; rar++) { in ixgbe_insert_mac_addr_generic()
3769 if (rar < hw->mac.rar_highwater) { in ixgbe_insert_mac_addr_generic()
3773 /* stick it into first empty RAR slot we found */ in ixgbe_insert_mac_addr_generic()
3776 } else if (rar == hw->mac.rar_highwater) { in ixgbe_insert_mac_addr_generic()
3779 hw->mac.rar_highwater++; in ixgbe_insert_mac_addr_generic()
3780 } else if (rar >= hw->mac.num_rar_entries) { in ixgbe_insert_mac_addr_generic()
3795 * ixgbe_clear_vmdq_generic - Disassociate a VMDq pool index from a rx address
3803 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_vmdq_generic()
3817 if (IXGBE_REMOVED(hw->hw_addr)) in ixgbe_clear_vmdq_generic()
3836 mpsar_hi &= ~(1 << (vmdq - 32)); in ixgbe_clear_vmdq_generic()
3842 rar != 0 && rar != hw->mac.san_mac_rar_index) in ixgbe_clear_vmdq_generic()
3843 hw->mac.ops.clear_rar(hw, rar); in ixgbe_clear_vmdq_generic()
3849 * ixgbe_set_vmdq_generic - Associate a VMDq pool index with a rx address
3857 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_vmdq_generic()
3874 mpsar |= 1 << (vmdq - 32); in ixgbe_set_vmdq_generic()
3881 * ixgbe_set_vmdq_san_mac_generic - Associate default VMDq pool index with
3889 * MPSAR table needs to be updated for SAN_MAC RAR [hw->mac.san_mac_rar_index]
3893 u32 rar = hw->mac.san_mac_rar_index; in ixgbe_set_vmdq_san_mac_generic()
3902 IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 1 << (vmdq - 32)); in ixgbe_set_vmdq_san_mac_generic()
3909 * ixgbe_init_uta_tables_generic - Initialize the Unicast Table Array
3926 * ixgbe_find_vlvf_slot - find the vlanid or the first empty slot
3929 * @vlvf_bypass: true to find vlanid only, false returns first empty slot if
3954 /* Search for the vlan id in the VLVF entries. Save off the first empty in ixgbe_find_vlvf_slot()
3957 * pre-decrement loop covering (IXGBE_VLVF_ENTRIES - 1) .. 1 in ixgbe_find_vlvf_slot()
3959 for (regindex = IXGBE_VLVF_ENTRIES; --regindex;) { in ixgbe_find_vlvf_slot()
3967 /* If we are here then we didn't find the VLAN. Return first empty in ixgbe_find_vlvf_slot()
3977 * ixgbe_set_vfta_generic - Set VLAN filter table
3998 * this is a 2 part operation - first the VFTA, then the in ixgbe_set_vfta_generic()
4004 * The VFTA is a bitstring made up of 128 32-bit registers in ixgbe_set_vfta_generic()
4006 * bits[11-5]: which register in ixgbe_set_vfta_generic()
4007 * bits[4-0]: which bit in the register in ixgbe_set_vfta_generic()
4041 * ixgbe_set_vlvf_generic - Set VLAN Pool Filter
4090 !IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + 1 - vind / 32))) { in ixgbe_set_vlvf_generic()
4091 /* Clear VFTA first, then disable VLVF. Otherwise in ixgbe_set_vlvf_generic()
4130 * ixgbe_clear_vfta_generic - Clear VLAN filter table
4141 for (offset = 0; offset < hw->mac.vft_size; offset++) in ixgbe_clear_vfta_generic()
4154 * ixgbe_toggle_txdctl_generic - Toggle VF's queues
4209 * ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
4219 if (!hw->need_crosstalk_fix) in ixgbe_need_crosstalk_fix()
4223 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_need_crosstalk_fix()
4235 * ixgbe_check_mac_link_generic - Determine link and speed status
4257 switch (hw->mac.type) { in ixgbe_check_mac_link_generic()
4268 /* sanity check - No SFP+ devices here */ in ixgbe_check_mac_link_generic()
4291 for (i = 0; i < hw->mac.max_link_up_time; i++) { in ixgbe_check_mac_link_generic()
4326 if (hw->mac.type >= ixgbe_mac_X550) { in ixgbe_check_mac_link_generic()
4336 if (hw->mac.type == ixgbe_mac_X550 || in ixgbe_check_mac_link_generic()
4337 hw->mac.type == ixgbe_mac_E610) { in ixgbe_check_mac_link_generic()
4344 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T || in ixgbe_check_mac_link_generic()
4345 hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) in ixgbe_check_mac_link_generic()
4356 * ixgbe_get_wwn_prefix_generic - Get alternative WWNN/WWPN prefix from
4373 /* clear output first */ in ixgbe_get_wwn_prefix_generic()
4379 if (hw->eeprom.ops.read(hw, offset, &alt_san_mac_blk_offset)) in ixgbe_get_wwn_prefix_generic()
4388 if (hw->eeprom.ops.read(hw, offset, &caps)) in ixgbe_get_wwn_prefix_generic()
4395 if (hw->eeprom.ops.read(hw, offset, wwnn_prefix)) { in ixgbe_get_wwn_prefix_generic()
4401 if (hw->eeprom.ops.read(hw, offset, wwpn_prefix)) in ixgbe_get_wwn_prefix_generic()
4414 * ixgbe_get_fcoe_boot_status_generic - Get FCOE boot status from EEPROM
4427 /* clear output first */ in ixgbe_get_fcoe_boot_status_generic()
4432 status = hw->eeprom.ops.read(hw, offset, &caps); in ixgbe_get_fcoe_boot_status_generic()
4440 status = hw->eeprom.ops.read(hw, IXGBE_ISCSI_FCOE_BLK_PTR, &offset); in ixgbe_get_fcoe_boot_status_generic()
4449 status = hw->eeprom.ops.read(hw, offset, &flags); in ixgbe_get_fcoe_boot_status_generic()
4463 * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
4465 * @enable: enable or disable switch for MAC anti-spoofing
4466 * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing
4475 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_mac_anti_spoofing()
4487 * ixgbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing
4489 * @enable: enable or disable switch for VLAN anti-spoofing
4490 * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing
4499 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_vlan_anti_spoofing()
4511 * ixgbe_get_device_caps_generic - Get additional device capabilities
4522 hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps); in ixgbe_get_device_caps_generic()
4528 * ixgbe_enable_relaxed_ordering_gen2 - Enable relaxed ordering
4540 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_enable_relaxed_ordering_gen2()
4546 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_enable_relaxed_ordering_gen2()
4556 * ixgbe_calculate_checksum - Calculate checksum for buffer
4575 return (u8) (0 - sum); in ixgbe_calculate_checksum()
4579 * ixgbe_hic_unlocked - Issue command to manageability block unlocked
4660 * ixgbe_host_interface_command - Issue command to manageability block
4695 status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
4709 /* first pull in the header so we know the buffer length */ in ixgbe_host_interface_command()
4720 if (resp->cmd == IXGBE_HOST_INTERFACE_FLASH_READ_CMD || in ixgbe_host_interface_command()
4721 resp->cmd == IXGBE_HOST_INTERFACE_SHADOW_RAM_READ_CMD) { in ixgbe_host_interface_command()
4727 buf_len = (((u16)(resp->cmd_or_resp.ret_status) << 3) in ixgbe_host_interface_command()
4728 & 0xF00) | resp->buf_len; in ixgbe_host_interface_command()
4731 buf_len = resp->buf_len; in ixgbe_host_interface_command()
4752 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
4758 * ixgbe_set_fw_drv_ver_generic - Sends driver version to firmware
4786 fw_cmd.port_num = (u8)hw->bus.func; in ixgbe_set_fw_drv_ver_generic()
4818 * ixgbe_set_rxpba_generic - Initialize Rx packet buffer
4827 u32 pbsize = hw->mac.rx_pb_size; in ixgbe_set_rxpba_generic()
4832 pbsize -= headroom; in ixgbe_set_rxpba_generic()
4842 /* ixgbe_dcb_pba_80_48 strategy weight first half of packet in ixgbe_set_rxpba_generic()
4846 pbsize -= rxpktsize * (num_pb / 2); in ixgbe_set_rxpba_generic()
4850 rxpktsize = (pbsize / (num_pb - i)) << IXGBE_RXPBSIZE_SHIFT; in ixgbe_set_rxpba_generic()
4855 rxpktsize = (pbsize / (num_pb - i)) << IXGBE_RXPBSIZE_SHIFT; in ixgbe_set_rxpba_generic()
4865 txpbthresh = (txpktsize / 1024) - IXGBE_TXPKT_SIZE_MAX; in ixgbe_set_rxpba_generic()
4880 * ixgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo
4896 if (!(hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED)) in ixgbe_clear_tx_pending()
4919 if (IXGBE_REMOVED(hw->hw_addr)) in ixgbe_clear_tx_pending()
4954 * ixgbe_get_thermal_sensor_data_generic - Gathers thermal sensor data
4969 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_get_thermal_sensor_data_generic()
4974 if ((hw->mac.type != ixgbe_mac_82599EB) || in ixgbe_get_thermal_sensor_data_generic()
4980 status = hw->eeprom.ops.read(hw, IXGBE_ETS_CFG, &ets_offset); in ixgbe_get_thermal_sensor_data_generic()
4989 status = hw->eeprom.ops.read(hw, ets_offset, &ets_cfg); in ixgbe_get_thermal_sensor_data_generic()
5004 status = hw->eeprom.ops.read(hw, (ets_offset + 1 + i), in ixgbe_get_thermal_sensor_data_generic()
5015 status = hw->phy.ops.read_i2c_byte(hw, in ixgbe_get_thermal_sensor_data_generic()
5018 &data->sensor[i].temp); in ixgbe_get_thermal_sensor_data_generic()
5028 * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds
5047 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_init_thermal_sensor_thresh_generic()
5054 if ((hw->mac.type != ixgbe_mac_82599EB) || in ixgbe_init_thermal_sensor_thresh_generic()
5059 if (hw->eeprom.ops.read(hw, offset, &ets_offset)) in ixgbe_init_thermal_sensor_thresh_generic()
5065 if (hw->eeprom.ops.read(hw, offset, &ets_cfg)) in ixgbe_init_thermal_sensor_thresh_generic()
5077 if (hw->eeprom.ops.read(hw, offset, &ets_sensor)) { in ixgbe_init_thermal_sensor_thresh_generic()
5089 hw->phy.ops.write_i2c_byte(hw, in ixgbe_init_thermal_sensor_thresh_generic()
5094 data->sensor[i].location = sensor_location; in ixgbe_init_thermal_sensor_thresh_generic()
5095 data->sensor[i].caution_thresh = therm_limit; in ixgbe_init_thermal_sensor_thresh_generic()
5096 data->sensor[i].max_op_thresh = therm_limit - in ixgbe_init_thermal_sensor_thresh_generic()
5109 * ixgbe_bypass_rw_generic - Bit bang data into by_pass FW
5115 * Bit-bangs the cmd to the by_pass FW status points to what is returned.
5130 switch (hw->mac.type) { in ixgbe_bypass_rw_generic()
5175 if ((cmd >> (31 - i)) & 0x01) { in ixgbe_bypass_rw_generic()
5221 * ixgbe_bypass_valid_rd_generic - Verify valid return from bit-bang.
5222 * @in_reg: The register cmd for the bit-bang read.
5223 * @out_reg: The register returned from a bit-bang read.
5242 * - All the event actions in ixgbe_bypass_valid_rd_generic()
5243 * - The timeout value in ixgbe_bypass_valid_rd_generic()
5258 * - time valid bit in ixgbe_bypass_valid_rd_generic()
5259 * - time we last sent in ixgbe_bypass_valid_rd_generic()
5277 * ixgbe_bypass_set_generic - Set a bypass field in the FW CTRL Regiter.
5323 * ixgbe_bypass_rd_eep_generic - Read the bypass FW eeprom addres.
5355 * ixgbe_get_orom_version - Return option ROM from EEPROM
5360 * if valid option ROM version, nvm_ver->or_valid set to true
5361 * else nvm_ver->or_valid is false.
5368 nvm_ver->or_valid = false; in ixgbe_get_orom_version()
5370 hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset); in ixgbe_get_orom_version()
5376 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh); in ixgbe_get_orom_version()
5377 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl); in ixgbe_get_orom_version()
5385 nvm_ver->or_valid = true; in ixgbe_get_orom_version()
5386 nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT; in ixgbe_get_orom_version()
5387 nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) | in ixgbe_get_orom_version()
5389 nvm_ver->or_patch = eeprom_cfg_blkh & NVM_OROM_PATCH_MASK; in ixgbe_get_orom_version()
5393 * ixgbe_get_oem_prod_version - Return OEM Product version
5398 * if valid OEM product version, nvm_ver->oem_valid set to true
5399 * else nvm_ver->oem_valid is false.
5406 nvm_ver->oem_valid = false; in ixgbe_get_oem_prod_version()
5407 hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset); in ixgbe_get_oem_prod_version()
5414 hw->eeprom.ops.read(hw, offset, &mod_len); in ixgbe_get_oem_prod_version()
5415 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap); in ixgbe_get_oem_prod_version()
5422 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver); in ixgbe_get_oem_prod_version()
5423 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num); in ixgbe_get_oem_prod_version()
5430 nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT; in ixgbe_get_oem_prod_version()
5431 nvm_ver->oem_minor = prod_ver & NVM_VER_MASK; in ixgbe_get_oem_prod_version()
5432 nvm_ver->oem_release = rel_num; in ixgbe_get_oem_prod_version()
5433 nvm_ver->oem_valid = true; in ixgbe_get_oem_prod_version()
5437 * ixgbe_get_etk_id - Return Etrack ID from EEPROM
5448 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l)) in ixgbe_get_etk_id()
5450 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h)) in ixgbe_get_etk_id()
5457 nvm_ver->etk_id = etk_id_h; in ixgbe_get_etk_id()
5458 nvm_ver->etk_id |= (etk_id_l << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
5460 nvm_ver->etk_id = etk_id_l; in ixgbe_get_etk_id()
5461 nvm_ver->etk_id |= (etk_id_h << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
5466 * ixgbe_get_nvm_version - Return version of NVM and its components
5482 /* eeprom version is mac-type specific */ in ixgbe_get_nvm_version()
5483 switch (hw->mac.type) { in ixgbe_get_nvm_version()
5488 nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK) in ixgbe_get_nvm_version()
5490 nvm_ver->nvm_minor = ((word & NVM_EEP_MINOR_MASK) in ixgbe_get_nvm_version()
5492 nvm_ver->nvm_id = (word & NVM_EEP_ID_MASK); in ixgbe_get_nvm_version()
5498 nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK) in ixgbe_get_nvm_version()
5500 nvm_ver->nvm_minor = ((word & NVM_EEP_MINOR_MASK) in ixgbe_get_nvm_version()
5502 nvm_ver->nvm_id = (word & NVM_EEP_ID_MASK); in ixgbe_get_nvm_version()
5512 nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK) in ixgbe_get_nvm_version()
5514 nvm_ver->nvm_minor = (word & NVM_EEP_X550_MINOR_MASK); in ixgbe_get_nvm_version()
5521 /* phy version is mac-type specific */ in ixgbe_get_nvm_version()
5522 switch (hw->mac.type) { in ixgbe_get_nvm_version()
5531 nvm_ver->phy_fw_maj = ((word & NVM_PHY_MAJOR_MASK) in ixgbe_get_nvm_version()
5533 nvm_ver->phy_fw_min = ((word & NVM_PHY_MINOR_MASK) in ixgbe_get_nvm_version()
5535 nvm_ver->phy_fw_id = (word & NVM_PHY_ID_MASK); in ixgbe_get_nvm_version()
5546 nvm_ver->devstart_major = ((word & NVM_DS_MAJOR_MASK) >> NVM_DS_SHIFT); in ixgbe_get_nvm_version()
5547 nvm_ver->devstart_minor = (word & NVM_DS_MINOR_MASK); in ixgbe_get_nvm_version()
5550 if (ixgbe_read_eeprom(hw, NVM_OEM_OFFSET, &nvm_ver->oem_specific)) in ixgbe_get_nvm_version()
5551 nvm_ver->oem_specific = NVM_VER_INVALID; in ixgbe_get_nvm_version()
5556 nvm_ver->phy_vend_maj = ((phy_ver & NVM_PHYVEND_MAJOR_MASK) in ixgbe_get_nvm_version()
5558 nvm_ver->phy_vend_min = (phy_ver & NVM_PHYVEND_MINOR_MASK); in ixgbe_get_nvm_version()
5566 * ixgbe_dcb_get_rtrup2tc_generic - read rtrup2tc reg
5590 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_disable_rx_generic()
5595 hw->mac.set_lben = true; in ixgbe_disable_rx_generic()
5597 hw->mac.set_lben = false; in ixgbe_disable_rx_generic()
5613 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_enable_rx_generic()
5614 if (hw->mac.set_lben) { in ixgbe_enable_rx_generic()
5618 hw->mac.set_lben = false; in ixgbe_enable_rx_generic()
5624 * ixgbe_mng_present - returns true when management capability is present
5631 if (hw->mac.type < ixgbe_mac_82599EB) in ixgbe_mng_present()
5640 * ixgbe_mng_enabled - Is the manageability engine enabled?
5657 if (hw->mac.type <= ixgbe_mac_X540) { in ixgbe_mng_enabled()
5667 * ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
5687 /* Mask off requested but non-supported speeds */ in ixgbe_setup_mac_link_multispeed_fiber()
5694 /* Try each speed one by one, highest priority first. We do this in in ixgbe_setup_mac_link_multispeed_fiber()
5702 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
5716 /* Allow module to change analog characteristics (1G->10G) */ in ixgbe_setup_mac_link_multispeed_fiber()
5753 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
5767 /* Allow module to change analog characteristics (10G->1G) */ in ixgbe_setup_mac_link_multispeed_fiber()
5802 hw->phy.autoneg_advertised = 0; in ixgbe_setup_mac_link_multispeed_fiber()
5805 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
5808 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
5814 * ixgbe_set_soft_rate_select_speed - Set module link speed
5840 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
5850 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
5859 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()
5869 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()