Lines Matching +full:rate +full:- +full:lp +full:- +full:ms
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
64 * ixgbe_init_ops_generic - Inits function ptrs
71 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_ops_generic()
72 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_generic()
78 eeprom->ops.init_params = ixgbe_init_eeprom_params_generic; in ixgbe_init_ops_generic()
81 eeprom->ops.read = ixgbe_read_eerd_generic; in ixgbe_init_ops_generic()
82 eeprom->ops.read_buffer = ixgbe_read_eerd_buffer_generic; in ixgbe_init_ops_generic()
84 eeprom->ops.read = ixgbe_read_eeprom_bit_bang_generic; in ixgbe_init_ops_generic()
85 eeprom->ops.read_buffer = in ixgbe_init_ops_generic()
88 eeprom->ops.write = ixgbe_write_eeprom_generic; in ixgbe_init_ops_generic()
89 eeprom->ops.write_buffer = ixgbe_write_eeprom_buffer_bit_bang_generic; in ixgbe_init_ops_generic()
90 eeprom->ops.validate_checksum = in ixgbe_init_ops_generic()
92 eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_generic; in ixgbe_init_ops_generic()
93 eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_generic; in ixgbe_init_ops_generic()
96 mac->ops.init_hw = ixgbe_init_hw_generic; in ixgbe_init_ops_generic()
97 mac->ops.reset_hw = NULL; in ixgbe_init_ops_generic()
98 mac->ops.start_hw = ixgbe_start_hw_generic; in ixgbe_init_ops_generic()
99 mac->ops.clear_hw_cntrs = ixgbe_clear_hw_cntrs_generic; in ixgbe_init_ops_generic()
100 mac->ops.get_media_type = NULL; in ixgbe_init_ops_generic()
101 mac->ops.get_supported_physical_layer = NULL; in ixgbe_init_ops_generic()
102 mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_generic; in ixgbe_init_ops_generic()
103 mac->ops.get_mac_addr = ixgbe_get_mac_addr_generic; in ixgbe_init_ops_generic()
104 mac->ops.stop_adapter = ixgbe_stop_adapter_generic; in ixgbe_init_ops_generic()
105 mac->ops.get_bus_info = ixgbe_get_bus_info_generic; in ixgbe_init_ops_generic()
106 mac->ops.set_lan_id = ixgbe_set_lan_id_multi_port_pcie; in ixgbe_init_ops_generic()
107 mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync; in ixgbe_init_ops_generic()
108 mac->ops.release_swfw_sync = ixgbe_release_swfw_sync; in ixgbe_init_ops_generic()
109 mac->ops.prot_autoc_read = prot_autoc_read_generic; in ixgbe_init_ops_generic()
110 mac->ops.prot_autoc_write = prot_autoc_write_generic; in ixgbe_init_ops_generic()
113 mac->ops.led_on = ixgbe_led_on_generic; in ixgbe_init_ops_generic()
114 mac->ops.led_off = ixgbe_led_off_generic; in ixgbe_init_ops_generic()
115 mac->ops.blink_led_start = ixgbe_blink_led_start_generic; in ixgbe_init_ops_generic()
116 mac->ops.blink_led_stop = ixgbe_blink_led_stop_generic; in ixgbe_init_ops_generic()
117 mac->ops.init_led_link_act = ixgbe_init_led_link_act_generic; in ixgbe_init_ops_generic()
120 mac->ops.set_rar = ixgbe_set_rar_generic; in ixgbe_init_ops_generic()
121 mac->ops.clear_rar = ixgbe_clear_rar_generic; in ixgbe_init_ops_generic()
122 mac->ops.insert_mac_addr = NULL; in ixgbe_init_ops_generic()
123 mac->ops.set_vmdq = NULL; in ixgbe_init_ops_generic()
124 mac->ops.clear_vmdq = NULL; in ixgbe_init_ops_generic()
125 mac->ops.init_rx_addrs = ixgbe_init_rx_addrs_generic; in ixgbe_init_ops_generic()
126 mac->ops.update_uc_addr_list = ixgbe_update_uc_addr_list_generic; in ixgbe_init_ops_generic()
127 mac->ops.update_mc_addr_list = ixgbe_update_mc_addr_list_generic; in ixgbe_init_ops_generic()
128 mac->ops.enable_mc = ixgbe_enable_mc_generic; in ixgbe_init_ops_generic()
129 mac->ops.disable_mc = ixgbe_disable_mc_generic; in ixgbe_init_ops_generic()
130 mac->ops.clear_vfta = NULL; in ixgbe_init_ops_generic()
131 mac->ops.set_vfta = NULL; in ixgbe_init_ops_generic()
132 mac->ops.set_vlvf = NULL; in ixgbe_init_ops_generic()
133 mac->ops.init_uta_tables = NULL; in ixgbe_init_ops_generic()
134 mac->ops.enable_rx = ixgbe_enable_rx_generic; in ixgbe_init_ops_generic()
135 mac->ops.disable_rx = ixgbe_disable_rx_generic; in ixgbe_init_ops_generic()
136 mac->ops.toggle_txdctl = ixgbe_toggle_txdctl_generic; in ixgbe_init_ops_generic()
139 mac->ops.fc_enable = ixgbe_fc_enable_generic; in ixgbe_init_ops_generic()
140 mac->ops.setup_fc = ixgbe_setup_fc_generic; in ixgbe_init_ops_generic()
141 mac->ops.fc_autoneg = ixgbe_fc_autoneg; in ixgbe_init_ops_generic()
144 mac->ops.get_link_capabilities = NULL; in ixgbe_init_ops_generic()
145 mac->ops.setup_link = NULL; in ixgbe_init_ops_generic()
146 mac->ops.check_link = NULL; in ixgbe_init_ops_generic()
147 mac->ops.dmac_config = NULL; in ixgbe_init_ops_generic()
148 mac->ops.dmac_update_tcs = NULL; in ixgbe_init_ops_generic()
149 mac->ops.dmac_config_tcs = NULL; in ixgbe_init_ops_generic()
155 * ixgbe_device_supports_autoneg_fc - Check if device supports autonegotiation
171 switch (hw->phy.media_type) { in ixgbe_device_supports_autoneg_fc()
176 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
184 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_device_supports_autoneg_fc()
195 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_XFI) in ixgbe_device_supports_autoneg_fc()
202 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
225 hw->device_id); in ixgbe_device_supports_autoneg_fc()
231 * ixgbe_setup_fc_generic - Set up flow control
246 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { in ixgbe_setup_fc_generic()
257 if (hw->fc.requested_mode == ixgbe_fc_default) in ixgbe_setup_fc_generic()
258 hw->fc.requested_mode = ixgbe_fc_full; in ixgbe_setup_fc_generic()
265 switch (hw->phy.media_type) { in ixgbe_setup_fc_generic()
268 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, ®_bp); in ixgbe_setup_fc_generic()
281 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_setup_fc_generic()
298 switch (hw->fc.requested_mode) { in ixgbe_setup_fc_generic()
302 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
305 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
315 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
318 } else if (hw->phy.media_type == ixgbe_media_type_copper) { in ixgbe_setup_fc_generic()
336 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
339 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
350 if (hw->mac.type < ixgbe_mac_X540) { in ixgbe_setup_fc_generic()
352 * Enable auto-negotiation between the MAC & PHY; in ixgbe_setup_fc_generic()
359 if (hw->fc.strict_ieee) in ixgbe_setup_fc_generic()
371 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
373 ret_val = hw->mac.ops.prot_autoc_write(hw, reg_bp, locked); in ixgbe_setup_fc_generic()
376 } else if ((hw->phy.media_type == ixgbe_media_type_copper) && in ixgbe_setup_fc_generic()
378 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_setup_fc_generic()
388 * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
405 hw->phy.media_type = hw->mac.ops.get_media_type(hw); in ixgbe_start_hw_generic()
410 hw->mac.ops.clear_vfta(hw); in ixgbe_start_hw_generic()
413 hw->mac.ops.clear_hw_cntrs(hw); in ixgbe_start_hw_generic()
429 switch (hw->mac.type) { in ixgbe_start_hw_generic()
433 hw->mac.ops.get_device_caps(hw, &device_caps); in ixgbe_start_hw_generic()
435 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
437 hw->need_crosstalk_fix = true; in ixgbe_start_hw_generic()
440 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
445 hw->adapter_stopped = false; in ixgbe_start_hw_generic()
451 * ixgbe_start_hw_gen2 - Init sequence for common device family
465 /* Clear the rate limiters */ in ixgbe_start_hw_gen2()
466 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_start_hw_gen2()
473 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_start_hw_gen2()
479 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_start_hw_gen2()
488 * ixgbe_init_hw_generic - Generic hardware initialization
504 status = hw->mac.ops.reset_hw(hw); in ixgbe_init_hw_generic()
508 status = hw->mac.ops.start_hw(hw); in ixgbe_init_hw_generic()
512 if (hw->mac.ops.init_led_link_act) in ixgbe_init_hw_generic()
513 hw->mac.ops.init_led_link_act(hw); in ixgbe_init_hw_generic()
522 * ixgbe_clear_hw_cntrs_generic - Generic clear hardware counters
546 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
557 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
565 if (hw->mac.type >= ixgbe_mac_82599EB) in ixgbe_clear_hw_cntrs_generic()
582 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_clear_hw_cntrs_generic()
607 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
619 if (hw->mac.type == ixgbe_mac_X550 || hw->mac.type == ixgbe_mac_X540) { in ixgbe_clear_hw_cntrs_generic()
620 if (hw->phy.id == 0) in ixgbe_clear_hw_cntrs_generic()
622 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL, in ixgbe_clear_hw_cntrs_generic()
624 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH, in ixgbe_clear_hw_cntrs_generic()
626 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL, in ixgbe_clear_hw_cntrs_generic()
628 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH, in ixgbe_clear_hw_cntrs_generic()
636 * ixgbe_read_pba_string_generic - Reads part number string from EEPROM
659 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); in ixgbe_read_pba_string_generic()
665 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr); in ixgbe_read_pba_string_generic()
692 pba_num[6] = '-'; in ixgbe_read_pba_string_generic()
700 /* switch all the data but the '-' to hex char */ in ixgbe_read_pba_string_generic()
705 pba_num[offset] += 'A' - 0xA; in ixgbe_read_pba_string_generic()
711 ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length); in ixgbe_read_pba_string_generic()
717 if (length == 0xFFFF || length == 0 || length > hw->eeprom.word_size) { in ixgbe_read_pba_string_generic()
723 if (pba_num_size < (((u32)length * 2) - 1)) { in ixgbe_read_pba_string_generic()
730 length--; in ixgbe_read_pba_string_generic()
733 ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data); in ixgbe_read_pba_string_generic()
747 * ixgbe_read_pba_num_generic - Reads part number from EEPROM
760 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); in ixgbe_read_pba_num_generic()
770 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &data); in ixgbe_read_pba_num_generic()
803 ret_val = hw->eeprom.ops.read_buffer(hw, IXGBE_PBANUM0_PTR, 2, in ixgbe_read_pba_raw()
804 &pba->word[0]); in ixgbe_read_pba_raw()
809 pba->word[0] = eeprom_buf[IXGBE_PBANUM0_PTR]; in ixgbe_read_pba_raw()
810 pba->word[1] = eeprom_buf[IXGBE_PBANUM1_PTR]; in ixgbe_read_pba_raw()
816 if (pba->word[0] == IXGBE_PBANUM_PTR_GUARD) { in ixgbe_read_pba_raw()
817 if (pba->pba_block == NULL) in ixgbe_read_pba_raw()
830 ret_val = hw->eeprom.ops.read_buffer(hw, pba->word[1], in ixgbe_read_pba_raw()
832 pba->pba_block); in ixgbe_read_pba_raw()
836 if (eeprom_buf_size > (u32)(pba->word[1] + in ixgbe_read_pba_raw()
838 memcpy(pba->pba_block, in ixgbe_read_pba_raw()
839 &eeprom_buf[pba->word[1]], in ixgbe_read_pba_raw()
870 ret_val = hw->eeprom.ops.write_buffer(hw, IXGBE_PBANUM0_PTR, 2, in ixgbe_write_pba_raw()
871 &pba->word[0]); in ixgbe_write_pba_raw()
876 eeprom_buf[IXGBE_PBANUM0_PTR] = pba->word[0]; in ixgbe_write_pba_raw()
877 eeprom_buf[IXGBE_PBANUM1_PTR] = pba->word[1]; in ixgbe_write_pba_raw()
883 if (pba->word[0] == IXGBE_PBANUM_PTR_GUARD) { in ixgbe_write_pba_raw()
884 if (pba->pba_block == NULL) in ixgbe_write_pba_raw()
888 ret_val = hw->eeprom.ops.write_buffer(hw, pba->word[1], in ixgbe_write_pba_raw()
889 pba->pba_block[0], in ixgbe_write_pba_raw()
890 pba->pba_block); in ixgbe_write_pba_raw()
894 if (eeprom_buf_size > (u32)(pba->word[1] + in ixgbe_write_pba_raw()
895 pba->pba_block[0])) { in ixgbe_write_pba_raw()
896 memcpy(&eeprom_buf[pba->word[1]], in ixgbe_write_pba_raw()
897 pba->pba_block, in ixgbe_write_pba_raw()
898 pba->pba_block[0] * sizeof(u16)); in ixgbe_write_pba_raw()
930 ret_val = hw->eeprom.ops.read_buffer(hw, IXGBE_PBANUM0_PTR, 2, in ixgbe_get_pba_block_size()
945 ret_val = hw->eeprom.ops.read(hw, pba_word[1] + 0, in ixgbe_get_pba_block_size()
970 * ixgbe_get_mac_addr_generic - Generic get MAC address
999 * ixgbe_set_pci_config_data_generic - Generic store PCI bus info
1007 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_set_pci_config_data_generic()
1009 if (hw->bus.type == ixgbe_bus_type_unknown) in ixgbe_set_pci_config_data_generic()
1010 hw->bus.type = ixgbe_bus_type_pci_express; in ixgbe_set_pci_config_data_generic()
1014 hw->bus.width = ixgbe_bus_width_pcie_x1; in ixgbe_set_pci_config_data_generic()
1017 hw->bus.width = ixgbe_bus_width_pcie_x2; in ixgbe_set_pci_config_data_generic()
1020 hw->bus.width = ixgbe_bus_width_pcie_x4; in ixgbe_set_pci_config_data_generic()
1023 hw->bus.width = ixgbe_bus_width_pcie_x8; in ixgbe_set_pci_config_data_generic()
1026 hw->bus.width = ixgbe_bus_width_unknown; in ixgbe_set_pci_config_data_generic()
1032 hw->bus.speed = ixgbe_bus_speed_2500; in ixgbe_set_pci_config_data_generic()
1035 hw->bus.speed = ixgbe_bus_speed_5000; in ixgbe_set_pci_config_data_generic()
1038 hw->bus.speed = ixgbe_bus_speed_8000; in ixgbe_set_pci_config_data_generic()
1041 hw->bus.speed = ixgbe_bus_speed_unknown; in ixgbe_set_pci_config_data_generic()
1045 mac->ops.set_lan_id(hw); in ixgbe_set_pci_config_data_generic()
1049 * ixgbe_get_bus_info_generic - Generic set PCI bus info
1070 * ixgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
1073 * Determines the LAN function id by reading memory-mapped registers and swaps
1079 struct ixgbe_bus_info *bus = &hw->bus; in ixgbe_set_lan_id_multi_port_pcie()
1086 bus->func = (reg & IXGBE_STATUS_LAN_ID) >> IXGBE_STATUS_LAN_ID_SHIFT; in ixgbe_set_lan_id_multi_port_pcie()
1087 bus->lan_id = (u8)bus->func; in ixgbe_set_lan_id_multi_port_pcie()
1092 bus->func ^= 0x1; in ixgbe_set_lan_id_multi_port_pcie()
1095 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) { in ixgbe_set_lan_id_multi_port_pcie()
1096 hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4); in ixgbe_set_lan_id_multi_port_pcie()
1097 bus->instance_id = (ee_ctrl_4 & IXGBE_EE_CTRL_4_INST_ID) >> in ixgbe_set_lan_id_multi_port_pcie()
1103 * ixgbe_stop_adapter_generic - Generic stop Tx/Rx units
1122 hw->adapter_stopped = true; in ixgbe_stop_adapter_generic()
1134 for (i = 0; i < hw->mac.max_tx_queues; i++) in ixgbe_stop_adapter_generic()
1138 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_stop_adapter_generic()
1150 * Prevent the PCI-E bus from hanging by disabling PCI-E primary in ixgbe_stop_adapter_generic()
1157 * ixgbe_init_led_link_act_generic - Store the LED index link/activity.
1165 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_led_link_act_generic()
1177 mac->led_link_act = i; in ixgbe_init_led_link_act_generic()
1186 switch (hw->mac.type) { in ixgbe_init_led_link_act_generic()
1189 mac->led_link_act = 1; in ixgbe_init_led_link_act_generic()
1192 mac->led_link_act = 2; in ixgbe_init_led_link_act_generic()
1198 * ixgbe_led_on_generic - Turns on the software controllable LEDs.
1221 * ixgbe_led_off_generic - Turns off the software controllable LEDs.
1244 * ixgbe_init_eeprom_params_generic - Initialize EEPROM params
1252 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_generic()
1258 if (eeprom->type == ixgbe_eeprom_uninitialized) { in ixgbe_init_eeprom_params_generic()
1259 eeprom->type = ixgbe_eeprom_none; in ixgbe_init_eeprom_params_generic()
1260 /* Set default semaphore delay to 10ms which is a well in ixgbe_init_eeprom_params_generic()
1262 eeprom->semaphore_delay = 10; in ixgbe_init_eeprom_params_generic()
1264 eeprom->word_page_size = 0; in ixgbe_init_eeprom_params_generic()
1272 eeprom->type = ixgbe_eeprom_spi; in ixgbe_init_eeprom_params_generic()
1280 eeprom->word_size = 1 << (eeprom_size + in ixgbe_init_eeprom_params_generic()
1285 eeprom->address_bits = 16; in ixgbe_init_eeprom_params_generic()
1287 eeprom->address_bits = 8; in ixgbe_init_eeprom_params_generic()
1289 "%d\n", eeprom->type, eeprom->word_size, in ixgbe_init_eeprom_params_generic()
1290 eeprom->address_bits); in ixgbe_init_eeprom_params_generic()
1297 * ixgbe_write_eeprom_buffer_bit_bang_generic - Write EEPROM using bit-bang
1303 * Reads 16 bit word(s) from EEPROM through bit-bang method
1313 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_buffer_bit_bang_generic()
1320 if (offset + words > hw->eeprom.word_size) { in ixgbe_write_eeprom_buffer_bit_bang_generic()
1329 if ((hw->eeprom.word_page_size == 0) && in ixgbe_write_eeprom_buffer_bit_bang_generic()
1339 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_write_eeprom_buffer_bit_bang_generic()
1340 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_write_eeprom_buffer_bit_bang_generic()
1353 * ixgbe_write_eeprom_buffer_bit_bang - Writes 16 bit word(s) to EEPROM
1398 if ((hw->eeprom.address_bits == 8) && in ixgbe_write_eeprom_buffer_bit_bang()
1402 /* Send the Write command (8-bit opcode + addr) */ in ixgbe_write_eeprom_buffer_bit_bang()
1406 hw->eeprom.address_bits); in ixgbe_write_eeprom_buffer_bit_bang()
1408 page_size = hw->eeprom.word_page_size; in ixgbe_write_eeprom_buffer_bit_bang()
1420 if (((offset + i) & (page_size - 1)) == in ixgbe_write_eeprom_buffer_bit_bang()
1421 (page_size - 1)) in ixgbe_write_eeprom_buffer_bit_bang()
1428 /* Done with writing - release the EEPROM */ in ixgbe_write_eeprom_buffer_bit_bang()
1436 * ixgbe_write_eeprom_generic - Writes 16 bit value to EEPROM
1450 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_generic()
1452 if (offset >= hw->eeprom.word_size) { in ixgbe_write_eeprom_generic()
1464 * ixgbe_read_eeprom_buffer_bit_bang_generic - Read EEPROM using bit-bang
1470 * Reads 16 bit word(s) from EEPROM through bit-bang method
1480 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1487 if (offset + words > hw->eeprom.word_size) { in ixgbe_read_eeprom_buffer_bit_bang_generic()
1498 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_read_eeprom_buffer_bit_bang_generic()
1499 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1513 * ixgbe_read_eeprom_buffer_bit_bang - Read EEPROM using bit-bang
1519 * Reads 16 bit word(s) from EEPROM through bit-bang method
1548 if ((hw->eeprom.address_bits == 8) && in ixgbe_read_eeprom_buffer_bit_bang()
1556 hw->eeprom.address_bits); in ixgbe_read_eeprom_buffer_bit_bang()
1571 * ixgbe_read_eeprom_bit_bang_generic - Read EEPROM word using bit-bang
1576 * Reads 16 bit value from EEPROM through bit-bang method
1585 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_bit_bang_generic()
1587 if (offset >= hw->eeprom.word_size) { in ixgbe_read_eeprom_bit_bang_generic()
1599 * ixgbe_read_eerd_buffer_generic - Read EEPROM word(s) using EERD
1616 hw->eeprom.ops.init_params(hw); in ixgbe_read_eerd_buffer_generic()
1624 if (offset >= hw->eeprom.word_size) { in ixgbe_read_eerd_buffer_generic()
1650 * ixgbe_detect_eeprom_page_size_generic - Detect EEPROM page size
1670 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX; in ixgbe_detect_eeprom_page_size_generic()
1673 hw->eeprom.word_page_size = 0; in ixgbe_detect_eeprom_page_size_generic()
1685 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; in ixgbe_detect_eeprom_page_size_generic()
1688 hw->eeprom.word_page_size); in ixgbe_detect_eeprom_page_size_generic()
1694 * ixgbe_read_eerd_generic - Read EEPROM word using EERD
1707 * ixgbe_write_eewr_buffer_generic - Write EEPROM word(s) using EEWR
1724 hw->eeprom.ops.init_params(hw); in ixgbe_write_eewr_buffer_generic()
1732 if (offset >= hw->eeprom.word_size) { in ixgbe_write_eewr_buffer_generic()
1763 * ixgbe_write_eewr_generic - Write EEPROM word using EEWR
1776 * ixgbe_poll_eerd_eewr_done - Poll EERD read or EEWR write status
1812 * ixgbe_acquire_eeprom - Acquire EEPROM using bit-bang
1815 * Prepares EEPROM for access using bit-bang method. This function should
1826 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) in ixgbe_acquire_eeprom()
1850 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_acquire_eeprom()
1867 * ixgbe_get_eeprom_semaphore - Get hardware semaphore
1870 * Sets the hardware semaphores so EEPROM access can occur for bit-bang method
1897 DEBUGOUT("Driver can't access the Eeprom - SMBI Semaphore " in ixgbe_get_eeprom_semaphore()
1958 * ixgbe_release_eeprom_semaphore - Release hardware semaphore
1978 * ixgbe_ready_eeprom - Polls for EEPROM ready
2007 * On some parts, SPI write time could vary from 0-20mSec on 3.3V in ixgbe_ready_eeprom()
2008 * devices (and only 0-5mSec on 5V devices) in ixgbe_ready_eeprom()
2019 * ixgbe_standby_eeprom - Returns EEPROM to a "standby" state
2042 * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM.
2062 mask = 0x01 << (count - 1); in ixgbe_shift_out_eeprom_bits()
2099 * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM
2139 * ixgbe_raise_eeprom_clk - Raises the EEPROM's clock input.
2158 * ixgbe_lower_eeprom_clk - Lowers the EEPROM's clock input.
2177 * ixgbe_release_eeprom - Release EEPROM, release semaphores
2200 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_release_eeprom()
2203 msec_delay(hw->eeprom.semaphore_delay); in ixgbe_release_eeprom()
2207 * ixgbe_calc_eeprom_checksum_generic - Calculates and returns the checksum
2210 * Returns a negative error code on error, or the 16-bit checksum
2223 /* Include 0x0-0x3F in the checksum */ in ixgbe_calc_eeprom_checksum_generic()
2225 if (hw->eeprom.ops.read(hw, i, &word)) { in ixgbe_calc_eeprom_checksum_generic()
2234 if (hw->eeprom.ops.read(hw, i, &pointer)) { in ixgbe_calc_eeprom_checksum_generic()
2243 if (hw->eeprom.ops.read(hw, pointer, &length)) { in ixgbe_calc_eeprom_checksum_generic()
2252 if (hw->eeprom.ops.read(hw, j, &word)) { in ixgbe_calc_eeprom_checksum_generic()
2260 checksum = (u16)IXGBE_EEPROM_SUM - checksum; in ixgbe_calc_eeprom_checksum_generic()
2266 * ixgbe_validate_eeprom_checksum_generic - Validate EEPROM checksum
2286 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_validate_eeprom_checksum_generic()
2292 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_validate_eeprom_checksum_generic()
2298 status = hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum); in ixgbe_validate_eeprom_checksum_generic()
2318 * ixgbe_update_eeprom_checksum_generic - Updates the EEPROM checksum
2332 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_update_eeprom_checksum_generic()
2338 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_update_eeprom_checksum_generic()
2344 status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM, checksum); in ixgbe_update_eeprom_checksum_generic()
2350 * ixgbe_validate_mac_addr - Validate MAC address
2376 * ixgbe_set_rar_generic - Set Rx address register
2389 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_rar_generic()
2401 hw->mac.ops.set_vmdq(hw, index, vmdq); in ixgbe_set_rar_generic()
2430 * ixgbe_clear_rar_generic - Remove Rx address register
2439 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_rar_generic()
2462 hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_clear_rar_generic()
2468 * ixgbe_init_rx_addrs_generic - Initializes receive address filters.
2478 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_init_rx_addrs_generic()
2487 if (ixgbe_validate_mac_addr(hw->mac.addr) == in ixgbe_init_rx_addrs_generic()
2490 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); in ixgbe_init_rx_addrs_generic()
2493 hw->mac.addr[0], hw->mac.addr[1], in ixgbe_init_rx_addrs_generic()
2494 hw->mac.addr[2]); in ixgbe_init_rx_addrs_generic()
2495 DEBUGOUT3("%.2X %.2X %.2X\n", hw->mac.addr[3], in ixgbe_init_rx_addrs_generic()
2496 hw->mac.addr[4], hw->mac.addr[5]); in ixgbe_init_rx_addrs_generic()
2501 hw->mac.addr[0], hw->mac.addr[1], in ixgbe_init_rx_addrs_generic()
2502 hw->mac.addr[2]); in ixgbe_init_rx_addrs_generic()
2503 DEBUGOUT3("%.2X %.2X %.2X\n", hw->mac.addr[3], in ixgbe_init_rx_addrs_generic()
2504 hw->mac.addr[4], hw->mac.addr[5]); in ixgbe_init_rx_addrs_generic()
2506 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); in ixgbe_init_rx_addrs_generic()
2510 hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_init_rx_addrs_generic()
2512 hw->addr_ctrl.overflow_promisc = 0; in ixgbe_init_rx_addrs_generic()
2514 hw->addr_ctrl.rar_used_count = 1; in ixgbe_init_rx_addrs_generic()
2517 DEBUGOUT1("Clearing RAR[1-%d]\n", rar_entries - 1); in ixgbe_init_rx_addrs_generic()
2524 hw->addr_ctrl.mta_in_use = 0; in ixgbe_init_rx_addrs_generic()
2525 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_init_rx_addrs_generic()
2528 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_init_rx_addrs_generic()
2537 * ixgbe_add_uc_addr - Adds a secondary unicast address.
2546 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_add_uc_addr()
2558 if (hw->addr_ctrl.rar_used_count < rar_entries) { in ixgbe_add_uc_addr()
2559 rar = hw->addr_ctrl.rar_used_count; in ixgbe_add_uc_addr()
2560 hw->mac.ops.set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV); in ixgbe_add_uc_addr()
2562 hw->addr_ctrl.rar_used_count++; in ixgbe_add_uc_addr()
2564 hw->addr_ctrl.overflow_promisc++; in ixgbe_add_uc_addr()
2571 * ixgbe_update_uc_addr_list_generic - Updates MAC list of secondary addresses
2589 u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc; in ixgbe_update_uc_addr_list_generic()
2600 uc_addr_in_use = hw->addr_ctrl.rar_used_count - 1; in ixgbe_update_uc_addr_list_generic()
2601 hw->addr_ctrl.rar_used_count -= uc_addr_in_use; in ixgbe_update_uc_addr_list_generic()
2602 hw->addr_ctrl.overflow_promisc = 0; in ixgbe_update_uc_addr_list_generic()
2605 DEBUGOUT1("Clearing RAR[1-%d]\n", uc_addr_in_use+1); in ixgbe_update_uc_addr_list_generic()
2618 if (hw->addr_ctrl.overflow_promisc) { in ixgbe_update_uc_addr_list_generic()
2620 if (!old_promisc_setting && !hw->addr_ctrl.user_set_promisc) { in ixgbe_update_uc_addr_list_generic()
2628 if (old_promisc_setting && !hw->addr_ctrl.user_set_promisc) { in ixgbe_update_uc_addr_list_generic()
2641 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
2646 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
2647 * incoming rx multicast addresses, to determine the bit-vector to check in
2648 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
2658 switch (hw->mac.mc_filter_type) { in ixgbe_mta_vector()
2677 /* vector can only be 12-bits or boundary will be exceeded */ in ixgbe_mta_vector()
2683 * ixgbe_set_mta - Set bit-vector in multicast table
2687 * Sets the bit-vector in the multicast table.
2697 hw->addr_ctrl.mta_in_use++; in ixgbe_set_mta()
2700 DEBUGOUT1(" bit-vector = 0x%03X\n", vector); in ixgbe_set_mta()
2703 * The MTA is a register array of 128 32-bit registers. It is treated in ixgbe_set_mta()
2713 hw->mac.mta_shadow[vector_reg] |= (1 << vector_bit); in ixgbe_set_mta()
2717 * ixgbe_update_mc_addr_list_generic - Updates MAC list of multicast addresses
2740 hw->addr_ctrl.num_mc_addrs = mc_addr_count; in ixgbe_update_mc_addr_list_generic()
2741 hw->addr_ctrl.mta_in_use = 0; in ixgbe_update_mc_addr_list_generic()
2746 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); in ixgbe_update_mc_addr_list_generic()
2756 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_update_mc_addr_list_generic()
2758 hw->mac.mta_shadow[i]); in ixgbe_update_mc_addr_list_generic()
2760 if (hw->addr_ctrl.mta_in_use > 0) in ixgbe_update_mc_addr_list_generic()
2762 IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type); in ixgbe_update_mc_addr_list_generic()
2769 * ixgbe_enable_mc_generic - Enable multicast address in RAR
2776 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_enable_mc_generic()
2780 if (a->mta_in_use > 0) in ixgbe_enable_mc_generic()
2782 hw->mac.mc_filter_type); in ixgbe_enable_mc_generic()
2788 * ixgbe_disable_mc_generic - Disable multicast address in RAR
2795 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_disable_mc_generic()
2799 if (a->mta_in_use > 0) in ixgbe_disable_mc_generic()
2800 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_disable_mc_generic()
2806 * ixgbe_fc_enable_generic - Enable flow control
2822 if (!hw->fc.pause_time) { in ixgbe_fc_enable_generic()
2829 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2830 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2831 if (!hw->fc.low_water[i] || in ixgbe_fc_enable_generic()
2832 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2841 hw->mac.ops.fc_autoneg(hw); in ixgbe_fc_enable_generic()
2860 switch (hw->fc.current_mode) { in ixgbe_fc_enable_generic()
2906 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2907 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2908 fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; in ixgbe_fc_enable_generic()
2910 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_generic()
2916 * to the Rx packet buffer size - 24KB. This allows in ixgbe_fc_enable_generic()
2920 fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576; in ixgbe_fc_enable_generic()
2927 reg = hw->fc.pause_time * 0x00010001; in ixgbe_fc_enable_generic()
2932 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); in ixgbe_fc_enable_generic()
2939 * ixgbe_negotiate_fc - Negotiate flow control
2970 if (hw->fc.requested_mode == ixgbe_fc_full) { in ixgbe_negotiate_fc()
2971 hw->fc.current_mode = ixgbe_fc_full; in ixgbe_negotiate_fc()
2974 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2979 hw->fc.current_mode = ixgbe_fc_tx_pause; in ixgbe_negotiate_fc()
2983 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2986 hw->fc.current_mode = ixgbe_fc_none; in ixgbe_negotiate_fc()
2993 * ixgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber
3005 * - link is up but AN did not complete, or if in ixgbe_fc_autoneg_fiber()
3006 * - link is up and AN completed but timed out in ixgbe_fc_autoneg_fiber()
3012 DEBUGOUT("Auto-Negotiation did not complete or timed out\n"); in ixgbe_fc_autoneg_fiber()
3030 * ixgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37
3042 * - backplane autoneg was not completed, or if in ixgbe_fc_autoneg_backplane()
3043 * - we are 82599 and link partner is not AN enabled in ixgbe_fc_autoneg_backplane()
3047 DEBUGOUT("Auto-Negotiation did not complete\n"); in ixgbe_fc_autoneg_backplane()
3051 if (hw->mac.type == ixgbe_mac_82599EB) { in ixgbe_fc_autoneg_backplane()
3059 * Read the 10g AN autoc and LP ability registers and resolve in ixgbe_fc_autoneg_backplane()
3074 * ixgbe_fc_autoneg_copper - Enable flow control IEEE clause 37
3084 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_fc_autoneg_copper()
3087 hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP, in ixgbe_fc_autoneg_copper()
3098 * ixgbe_fc_autoneg - Configure flow control
3115 * - FC autoneg is disabled, or if in ixgbe_fc_autoneg()
3116 * - link is not up. in ixgbe_fc_autoneg()
3118 if (hw->fc.disable_fc_autoneg) { in ixgbe_fc_autoneg()
3125 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_fc_autoneg()
3131 switch (hw->phy.media_type) { in ixgbe_fc_autoneg()
3157 hw->fc.fc_was_autonegged = true; in ixgbe_fc_autoneg()
3159 hw->fc.fc_was_autonegged = false; in ixgbe_fc_autoneg()
3160 hw->fc.current_mode = hw->fc.requested_mode; in ixgbe_fc_autoneg()
3165 * ixgbe_pcie_timeout_poll - Return number of times to poll for completion
3168 * System-wide timeout range is encoded in PCIe Device Control2 register.
3212 * ixgbe_disable_pcie_primary - Disable PCI-express primary access
3215 * Disables PCI-Express primary access and verifies there are no pending
3233 IXGBE_REMOVED(hw->hw_addr)) in ixgbe_disable_pcie_primary()
3251 DEBUGOUT("GIO Primary Disable bit didn't clear - requesting resets\n"); in ixgbe_disable_pcie_primary()
3252 hw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_disable_pcie_primary()
3254 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_disable_pcie_primary()
3265 if (IXGBE_REMOVED(hw->hw_addr)) in ixgbe_disable_pcie_primary()
3280 * ixgbe_acquire_swfw_sync - Acquire SWFW semaphore
3327 * ixgbe_release_swfw_sync - Release SWFW semaphore
3351 * ixgbe_disable_sec_rx_path_generic - Stops the receive data path
3375 /* Use interrupt-safe sleep just in case */ in ixgbe_disable_sec_rx_path_generic()
3388 * prot_autoc_read_generic - Hides MAC differences needed for AUTOC read
3403 * prot_autoc_write_generic - Hides MAC differences needed for AUTOC write
3420 * ixgbe_enable_sec_rx_path_generic - Enables the receive data path
3440 * ixgbe_enable_rx_dma_generic - Enable the Rx DMA unit
3459 * ixgbe_blink_led_start_generic - Blink LED based on index.
3478 * Link must be up to auto-blink the LEDs; in ixgbe_blink_led_start_generic()
3481 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_blink_led_start_generic()
3484 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_start_generic()
3491 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_start_generic()
3509 * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
3525 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_stop_generic()
3532 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_stop_generic()
3547 * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
3566 ret_val = hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR, in ixgbe_get_san_mac_addr_offset()
3578 * ixgbe_get_san_mac_addr_generic - SAN MAC address retrieval from the EEPROM
3583 * per-port, so set_lan_id() must be called before reading the addresses.
3585 * upon for non-SFP connections, so we must call it here.
3604 hw->mac.ops.set_lan_id(hw); in ixgbe_get_san_mac_addr_generic()
3606 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : in ixgbe_get_san_mac_addr_generic()
3609 ret_val = hw->eeprom.ops.read(hw, san_mac_offset, in ixgbe_get_san_mac_addr_generic()
3634 * ixgbe_set_san_mac_addr_generic - Write the SAN MAC address to the EEPROM
3654 hw->mac.ops.set_lan_id(hw); in ixgbe_set_san_mac_addr_generic()
3656 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : in ixgbe_set_san_mac_addr_generic()
3662 hw->eeprom.ops.write(hw, san_mac_offset, san_mac_data); in ixgbe_set_san_mac_addr_generic()
3670 * ixgbe_get_pcie_msix_count_generic - Gets MSI-X vector count
3673 * Read PCIe configuration space, and get the MSI-X vector count from
3682 switch (hw->mac.type) { in ixgbe_get_pcie_msix_count_generic()
3701 if (IXGBE_REMOVED(hw->hw_addr)) in ixgbe_get_pcie_msix_count_generic()
3705 /* MSI-X count is zero-based in HW */ in ixgbe_get_pcie_msix_count_generic()
3715 * ixgbe_insert_mac_addr_generic - Find a RAR for this mac address
3745 for (rar = 0; rar < hw->mac.rar_highwater; rar++) { in ixgbe_insert_mac_addr_generic()
3758 if (rar < hw->mac.rar_highwater) { in ixgbe_insert_mac_addr_generic()
3765 } else if (rar == hw->mac.rar_highwater) { in ixgbe_insert_mac_addr_generic()
3768 hw->mac.rar_highwater++; in ixgbe_insert_mac_addr_generic()
3769 } else if (rar >= hw->mac.num_rar_entries) { in ixgbe_insert_mac_addr_generic()
3784 * ixgbe_clear_vmdq_generic - Disassociate a VMDq pool index from a rx address
3792 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_vmdq_generic()
3806 if (IXGBE_REMOVED(hw->hw_addr)) in ixgbe_clear_vmdq_generic()
3825 mpsar_hi &= ~(1 << (vmdq - 32)); in ixgbe_clear_vmdq_generic()
3831 rar != 0 && rar != hw->mac.san_mac_rar_index) in ixgbe_clear_vmdq_generic()
3832 hw->mac.ops.clear_rar(hw, rar); in ixgbe_clear_vmdq_generic()
3838 * ixgbe_set_vmdq_generic - Associate a VMDq pool index with a rx address
3846 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_vmdq_generic()
3863 mpsar |= 1 << (vmdq - 32); in ixgbe_set_vmdq_generic()
3870 * ixgbe_set_vmdq_san_mac_generic - Associate default VMDq pool index with
3878 * MPSAR table needs to be updated for SAN_MAC RAR [hw->mac.san_mac_rar_index]
3882 u32 rar = hw->mac.san_mac_rar_index; in ixgbe_set_vmdq_san_mac_generic()
3891 IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 1 << (vmdq - 32)); in ixgbe_set_vmdq_san_mac_generic()
3898 * ixgbe_init_uta_tables_generic - Initialize the Unicast Table Array
3915 * ixgbe_find_vlvf_slot - find the vlanid or the first empty slot
3946 * pre-decrement loop covering (IXGBE_VLVF_ENTRIES - 1) .. 1 in ixgbe_find_vlvf_slot()
3948 for (regindex = IXGBE_VLVF_ENTRIES; --regindex;) { in ixgbe_find_vlvf_slot()
3966 * ixgbe_set_vfta_generic - Set VLAN filter table
3987 * this is a 2 part operation - first the VFTA, then the in ixgbe_set_vfta_generic()
3993 * The VFTA is a bitstring made up of 128 32-bit registers in ixgbe_set_vfta_generic()
3995 * bits[11-5]: which register in ixgbe_set_vfta_generic()
3996 * bits[4-0]: which bit in the register in ixgbe_set_vfta_generic()
4030 * ixgbe_set_vlvf_generic - Set VLAN Pool Filter
4079 !IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + 1 - vind / 32))) { in ixgbe_set_vlvf_generic()
4119 * ixgbe_clear_vfta_generic - Clear VLAN filter table
4130 for (offset = 0; offset < hw->mac.vft_size; offset++) in ixgbe_clear_vfta_generic()
4144 * ixgbe_toggle_txdctl_generic - Toggle VF's queues
4199 * ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
4209 if (!hw->need_crosstalk_fix) in ixgbe_need_crosstalk_fix()
4213 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_need_crosstalk_fix()
4225 * ixgbe_check_mac_link_generic - Determine link and speed status
4247 switch (hw->mac.type) { in ixgbe_check_mac_link_generic()
4258 /* sanity check - No SFP+ devices here */ in ixgbe_check_mac_link_generic()
4281 for (i = 0; i < hw->mac.max_link_up_time; i++) { in ixgbe_check_mac_link_generic()
4316 if (hw->mac.type >= ixgbe_mac_X550) { in ixgbe_check_mac_link_generic()
4326 if (hw->mac.type == ixgbe_mac_X550) { in ixgbe_check_mac_link_generic()
4333 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T || in ixgbe_check_mac_link_generic()
4334 hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) in ixgbe_check_mac_link_generic()
4345 * ixgbe_get_wwn_prefix_generic - Get alternative WWNN/WWPN prefix from
4368 if (hw->eeprom.ops.read(hw, offset, &alt_san_mac_blk_offset)) in ixgbe_get_wwn_prefix_generic()
4377 if (hw->eeprom.ops.read(hw, offset, &caps)) in ixgbe_get_wwn_prefix_generic()
4384 if (hw->eeprom.ops.read(hw, offset, wwnn_prefix)) { in ixgbe_get_wwn_prefix_generic()
4390 if (hw->eeprom.ops.read(hw, offset, wwpn_prefix)) in ixgbe_get_wwn_prefix_generic()
4403 * ixgbe_get_fcoe_boot_status_generic - Get FCOE boot status from EEPROM
4421 status = hw->eeprom.ops.read(hw, offset, &caps); in ixgbe_get_fcoe_boot_status_generic()
4429 status = hw->eeprom.ops.read(hw, IXGBE_ISCSI_FCOE_BLK_PTR, &offset); in ixgbe_get_fcoe_boot_status_generic()
4438 status = hw->eeprom.ops.read(hw, offset, &flags); in ixgbe_get_fcoe_boot_status_generic()
4452 * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
4454 * @enable: enable or disable switch for MAC anti-spoofing
4455 * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing
4464 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_mac_anti_spoofing()
4476 * ixgbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing
4478 * @enable: enable or disable switch for VLAN anti-spoofing
4479 * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing
4488 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_vlan_anti_spoofing()
4500 * ixgbe_get_device_caps_generic - Get additional device capabilities
4511 hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps); in ixgbe_get_device_caps_generic()
4517 * ixgbe_enable_relaxed_ordering_gen2 - Enable relaxed ordering
4529 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_enable_relaxed_ordering_gen2()
4535 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_enable_relaxed_ordering_gen2()
4545 * ixgbe_calculate_checksum - Calculate checksum for buffer
4564 return (u8) (0 - sum); in ixgbe_calculate_checksum()
4568 * ixgbe_hic_unlocked - Issue command to manageability block unlocked
4572 * @timeout: time in ms to wait for command completion
4649 * ixgbe_host_interface_command - Issue command to manageability block
4654 * @timeout: time in ms to wait for command completion
4684 status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
4709 if (resp->cmd == IXGBE_HOST_INTERFACE_FLASH_READ_CMD || in ixgbe_host_interface_command()
4710 resp->cmd == IXGBE_HOST_INTERFACE_SHADOW_RAM_READ_CMD) { in ixgbe_host_interface_command()
4716 buf_len = (((u16)(resp->cmd_or_resp.ret_status) << 3) in ixgbe_host_interface_command()
4717 & 0xF00) | resp->buf_len; in ixgbe_host_interface_command()
4720 buf_len = resp->buf_len; in ixgbe_host_interface_command()
4741 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
4747 * ixgbe_set_fw_drv_ver_generic - Sends driver version to firmware
4775 fw_cmd.port_num = (u8)hw->bus.func; in ixgbe_set_fw_drv_ver_generic()
4807 * ixgbe_set_rxpba_generic - Initialize Rx packet buffer
4816 u32 pbsize = hw->mac.rx_pb_size; in ixgbe_set_rxpba_generic()
4821 pbsize -= headroom; in ixgbe_set_rxpba_generic()
4835 pbsize -= rxpktsize * (num_pb / 2); in ixgbe_set_rxpba_generic()
4839 rxpktsize = (pbsize / (num_pb - i)) << IXGBE_RXPBSIZE_SHIFT; in ixgbe_set_rxpba_generic()
4844 rxpktsize = (pbsize / (num_pb - i)) << IXGBE_RXPBSIZE_SHIFT; in ixgbe_set_rxpba_generic()
4854 txpbthresh = (txpktsize / 1024) - IXGBE_TXPKT_SIZE_MAX; in ixgbe_set_rxpba_generic()
4869 * ixgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo
4885 if (!(hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED)) in ixgbe_clear_tx_pending()
4908 if (IXGBE_REMOVED(hw->hw_addr)) in ixgbe_clear_tx_pending()
4943 * ixgbe_get_thermal_sensor_data_generic - Gathers thermal sensor data
4958 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_get_thermal_sensor_data_generic()
4963 if ((hw->mac.type != ixgbe_mac_82599EB) || in ixgbe_get_thermal_sensor_data_generic()
4969 status = hw->eeprom.ops.read(hw, IXGBE_ETS_CFG, &ets_offset); in ixgbe_get_thermal_sensor_data_generic()
4978 status = hw->eeprom.ops.read(hw, ets_offset, &ets_cfg); in ixgbe_get_thermal_sensor_data_generic()
4993 status = hw->eeprom.ops.read(hw, (ets_offset + 1 + i), in ixgbe_get_thermal_sensor_data_generic()
5004 status = hw->phy.ops.read_i2c_byte(hw, in ixgbe_get_thermal_sensor_data_generic()
5007 &data->sensor[i].temp); in ixgbe_get_thermal_sensor_data_generic()
5017 * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds
5036 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_init_thermal_sensor_thresh_generic()
5043 if ((hw->mac.type != ixgbe_mac_82599EB) || in ixgbe_init_thermal_sensor_thresh_generic()
5048 if (hw->eeprom.ops.read(hw, offset, &ets_offset)) in ixgbe_init_thermal_sensor_thresh_generic()
5054 if (hw->eeprom.ops.read(hw, offset, &ets_cfg)) in ixgbe_init_thermal_sensor_thresh_generic()
5066 if (hw->eeprom.ops.read(hw, offset, &ets_sensor)) { in ixgbe_init_thermal_sensor_thresh_generic()
5078 hw->phy.ops.write_i2c_byte(hw, in ixgbe_init_thermal_sensor_thresh_generic()
5083 data->sensor[i].location = sensor_location; in ixgbe_init_thermal_sensor_thresh_generic()
5084 data->sensor[i].caution_thresh = therm_limit; in ixgbe_init_thermal_sensor_thresh_generic()
5085 data->sensor[i].max_op_thresh = therm_limit - in ixgbe_init_thermal_sensor_thresh_generic()
5098 * ixgbe_bypass_rw_generic - Bit bang data into by_pass FW
5104 * Bit-bangs the cmd to the by_pass FW status points to what is returned.
5119 switch (hw->mac.type) { in ixgbe_bypass_rw_generic()
5164 if ((cmd >> (31 - i)) & 0x01) { in ixgbe_bypass_rw_generic()
5210 * ixgbe_bypass_valid_rd_generic - Verify valid return from bit-bang.
5211 * @in_reg: The register cmd for the bit-bang read.
5212 * @out_reg: The register returned from a bit-bang read.
5231 * - All the event actions in ixgbe_bypass_valid_rd_generic()
5232 * - The timeout value in ixgbe_bypass_valid_rd_generic()
5247 * - time valid bit in ixgbe_bypass_valid_rd_generic()
5248 * - time we last sent in ixgbe_bypass_valid_rd_generic()
5266 * ixgbe_bypass_set_generic - Set a bypass field in the FW CTRL Regiter.
5312 * ixgbe_bypass_rd_eep_generic - Read the bypass FW eeprom addres.
5344 * ixgbe_get_orom_version - Return option ROM from EEPROM
5349 * if valid option ROM version, nvm_ver->or_valid set to true
5350 * else nvm_ver->or_valid is false.
5357 nvm_ver->or_valid = false; in ixgbe_get_orom_version()
5359 hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset); in ixgbe_get_orom_version()
5365 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh); in ixgbe_get_orom_version()
5366 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl); in ixgbe_get_orom_version()
5374 nvm_ver->or_valid = true; in ixgbe_get_orom_version()
5375 nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT; in ixgbe_get_orom_version()
5376 nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) | in ixgbe_get_orom_version()
5378 nvm_ver->or_patch = eeprom_cfg_blkh & NVM_OROM_PATCH_MASK; in ixgbe_get_orom_version()
5382 * ixgbe_get_oem_prod_version - Return OEM Product version
5387 * if valid OEM product version, nvm_ver->oem_valid set to true
5388 * else nvm_ver->oem_valid is false.
5395 nvm_ver->oem_valid = false; in ixgbe_get_oem_prod_version()
5396 hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset); in ixgbe_get_oem_prod_version()
5403 hw->eeprom.ops.read(hw, offset, &mod_len); in ixgbe_get_oem_prod_version()
5404 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap); in ixgbe_get_oem_prod_version()
5411 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver); in ixgbe_get_oem_prod_version()
5412 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num); in ixgbe_get_oem_prod_version()
5419 nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT; in ixgbe_get_oem_prod_version()
5420 nvm_ver->oem_minor = prod_ver & NVM_VER_MASK; in ixgbe_get_oem_prod_version()
5421 nvm_ver->oem_release = rel_num; in ixgbe_get_oem_prod_version()
5422 nvm_ver->oem_valid = true; in ixgbe_get_oem_prod_version()
5426 * ixgbe_get_etk_id - Return Etrack ID from EEPROM
5437 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l)) in ixgbe_get_etk_id()
5439 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h)) in ixgbe_get_etk_id()
5446 nvm_ver->etk_id = etk_id_h; in ixgbe_get_etk_id()
5447 nvm_ver->etk_id |= (etk_id_l << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
5449 nvm_ver->etk_id = etk_id_l; in ixgbe_get_etk_id()
5450 nvm_ver->etk_id |= (etk_id_h << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
5455 * ixgbe_get_nvm_version - Return version of NVM and its components
5471 /* eeprom version is mac-type specific */ in ixgbe_get_nvm_version()
5472 switch (hw->mac.type) { in ixgbe_get_nvm_version()
5477 nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK) in ixgbe_get_nvm_version()
5479 nvm_ver->nvm_minor = ((word & NVM_EEP_MINOR_MASK) in ixgbe_get_nvm_version()
5481 nvm_ver->nvm_id = (word & NVM_EEP_ID_MASK); in ixgbe_get_nvm_version()
5487 nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK) in ixgbe_get_nvm_version()
5489 nvm_ver->nvm_minor = ((word & NVM_EEP_MINOR_MASK) in ixgbe_get_nvm_version()
5491 nvm_ver->nvm_id = (word & NVM_EEP_ID_MASK); in ixgbe_get_nvm_version()
5500 nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK) in ixgbe_get_nvm_version()
5502 nvm_ver->nvm_minor = (word & NVM_EEP_X550_MINOR_MASK); in ixgbe_get_nvm_version()
5509 /* phy version is mac-type specific */ in ixgbe_get_nvm_version()
5510 switch (hw->mac.type) { in ixgbe_get_nvm_version()
5518 nvm_ver->phy_fw_maj = ((word & NVM_PHY_MAJOR_MASK) in ixgbe_get_nvm_version()
5520 nvm_ver->phy_fw_min = ((word & NVM_PHY_MINOR_MASK) in ixgbe_get_nvm_version()
5522 nvm_ver->phy_fw_id = (word & NVM_PHY_ID_MASK); in ixgbe_get_nvm_version()
5533 nvm_ver->devstart_major = ((word & NVM_DS_MAJOR_MASK) >> NVM_DS_SHIFT); in ixgbe_get_nvm_version()
5534 nvm_ver->devstart_minor = (word & NVM_DS_MINOR_MASK); in ixgbe_get_nvm_version()
5537 if (ixgbe_read_eeprom(hw, NVM_OEM_OFFSET, &nvm_ver->oem_specific)) in ixgbe_get_nvm_version()
5538 nvm_ver->oem_specific = NVM_VER_INVALID; in ixgbe_get_nvm_version()
5543 nvm_ver->phy_vend_maj = ((phy_ver & NVM_PHYVEND_MAJOR_MASK) in ixgbe_get_nvm_version()
5545 nvm_ver->phy_vend_min = (phy_ver & NVM_PHYVEND_MINOR_MASK); in ixgbe_get_nvm_version()
5553 * ixgbe_dcb_get_rtrup2tc_generic - read rtrup2tc reg
5577 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_disable_rx_generic()
5582 hw->mac.set_lben = true; in ixgbe_disable_rx_generic()
5584 hw->mac.set_lben = false; in ixgbe_disable_rx_generic()
5600 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_enable_rx_generic()
5601 if (hw->mac.set_lben) { in ixgbe_enable_rx_generic()
5605 hw->mac.set_lben = false; in ixgbe_enable_rx_generic()
5611 * ixgbe_mng_present - returns true when management capability is present
5618 if (hw->mac.type < ixgbe_mac_82599EB) in ixgbe_mng_present()
5627 * ixgbe_mng_enabled - Is the manageability engine enabled?
5644 if (hw->mac.type <= ixgbe_mac_X540) { in ixgbe_mng_enabled()
5654 * ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
5674 /* Mask off requested but non-supported speeds */ in ixgbe_setup_mac_link_multispeed_fiber()
5689 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
5703 /* Allow module to change analog characteristics (1G->10G) */ in ixgbe_setup_mac_link_multispeed_fiber()
5716 * Section 73.10.2, we may have to wait up to 1000ms if KR is in ixgbe_setup_mac_link_multispeed_fiber()
5740 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
5754 /* Allow module to change analog characteristics (10G->1G) */ in ixgbe_setup_mac_link_multispeed_fiber()
5789 hw->phy.autoneg_advertised = 0; in ixgbe_setup_mac_link_multispeed_fiber()
5792 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
5795 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
5801 * ixgbe_set_soft_rate_select_speed - Set module link speed
5805 * Set module link speed via the soft rate select.
5827 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
5831 DEBUGOUT("Failed to read Rx Rate Select RS0\n"); in ixgbe_set_soft_rate_select_speed()
5837 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
5841 DEBUGOUT("Failed to write Rx Rate Select RS0\n"); in ixgbe_set_soft_rate_select_speed()
5846 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()
5850 DEBUGOUT("Failed to read Rx Rate Select RS1\n"); in ixgbe_set_soft_rate_select_speed()
5856 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()
5860 DEBUGOUT("Failed to write Rx Rate Select RS1\n"); in ixgbe_set_soft_rate_select_speed()