Lines Matching +full:touch +full:- +full:hold +full:- +full:ms
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
63 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_mac_link_ops_82599()
71 if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) && in ixgbe_init_mac_link_ops_82599()
73 mac->ops.disable_tx_laser = in ixgbe_init_mac_link_ops_82599()
75 mac->ops.enable_tx_laser = in ixgbe_init_mac_link_ops_82599()
77 mac->ops.flap_tx_laser = ixgbe_flap_tx_laser_multispeed_fiber; in ixgbe_init_mac_link_ops_82599()
80 mac->ops.disable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
81 mac->ops.enable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
82 mac->ops.flap_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
85 if (hw->phy.multispeed_fiber) { in ixgbe_init_mac_link_ops_82599()
87 mac->ops.setup_link = ixgbe_setup_mac_link_multispeed_fiber; in ixgbe_init_mac_link_ops_82599()
88 mac->ops.setup_mac_link = ixgbe_setup_mac_link_82599; in ixgbe_init_mac_link_ops_82599()
89 mac->ops.set_rate_select_speed = in ixgbe_init_mac_link_ops_82599()
92 mac->ops.set_rate_select_speed = in ixgbe_init_mac_link_ops_82599()
96 (hw->phy.smart_speed == ixgbe_smart_speed_auto || in ixgbe_init_mac_link_ops_82599()
97 hw->phy.smart_speed == ixgbe_smart_speed_on) && in ixgbe_init_mac_link_ops_82599()
99 mac->ops.setup_link = ixgbe_setup_mac_link_smartspeed; in ixgbe_init_mac_link_ops_82599()
101 mac->ops.setup_link = ixgbe_setup_mac_link_82599; in ixgbe_init_mac_link_ops_82599()
107 * ixgbe_init_phy_ops_82599 - PHY/SFP specific init
117 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_phy_ops_82599()
118 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_82599()
124 if (hw->device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) { in ixgbe_init_phy_ops_82599()
126 hw->phy.qsfp_shared_i2c_bus = true; in ixgbe_init_phy_ops_82599()
138 phy->ops.read_i2c_byte = ixgbe_read_i2c_byte_82599; in ixgbe_init_phy_ops_82599()
139 phy->ops.write_i2c_byte = ixgbe_write_i2c_byte_82599; in ixgbe_init_phy_ops_82599()
142 ret_val = phy->ops.identify(hw); in ixgbe_init_phy_ops_82599()
148 if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) in ixgbe_init_phy_ops_82599()
149 hw->phy.ops.reset = NULL; in ixgbe_init_phy_ops_82599()
152 if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) { in ixgbe_init_phy_ops_82599()
153 mac->ops.setup_link = ixgbe_setup_copper_link_82599; in ixgbe_init_phy_ops_82599()
154 mac->ops.get_link_capabilities = in ixgbe_init_phy_ops_82599()
159 switch (hw->phy.type) { in ixgbe_init_phy_ops_82599()
161 phy->ops.setup_link = ixgbe_setup_phy_link_tnx; in ixgbe_init_phy_ops_82599()
162 phy->ops.check_link = ixgbe_check_phy_link_tnx; in ixgbe_init_phy_ops_82599()
163 phy->ops.get_firmware_version = in ixgbe_init_phy_ops_82599()
180 if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) { in ixgbe_setup_sfp_modules_82599()
183 hw->phy.ops.reset = NULL; in ixgbe_setup_sfp_modules_82599()
191 ret_val = hw->mac.ops.acquire_swfw_sync(hw, in ixgbe_setup_sfp_modules_82599()
198 if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) in ixgbe_setup_sfp_modules_82599()
203 if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) in ixgbe_setup_sfp_modules_82599()
208 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); in ixgbe_setup_sfp_modules_82599()
212 msec_delay(hw->eeprom.semaphore_delay); in ixgbe_setup_sfp_modules_82599()
215 ret_val = hw->mac.ops.prot_autoc_write(hw, in ixgbe_setup_sfp_modules_82599()
216 hw->mac.orig_autoc | IXGBE_AUTOC_LMS_10G_SERIAL, in ixgbe_setup_sfp_modules_82599()
232 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); in ixgbe_setup_sfp_modules_82599()
234 msec_delay(hw->eeprom.semaphore_delay); in ixgbe_setup_sfp_modules_82599()
241 * prot_autoc_read_82599 - Hides MAC differences needed for AUTOC read
246 * For this part (82599) we need to wrap read-modify-writes with a possible
255 /* If LESM is on then we need to hold the SW/FW semaphore. */ in prot_autoc_read_82599()
257 ret_val = hw->mac.ops.acquire_swfw_sync(hw, in prot_autoc_read_82599()
270 * prot_autoc_write_82599 - Hides MAC differences needed for AUTOC write
276 * This part (82599) may need to hold the SW/FW lock around all writes to
288 * - We didn't do it already (in the read part of a read-modify-write) in prot_autoc_write_82599()
289 * - LESM is enabled. in prot_autoc_write_82599()
292 ret_val = hw->mac.ops.acquire_swfw_sync(hw, in prot_autoc_write_82599()
308 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); in prot_autoc_write_82599()
314 * ixgbe_init_ops_82599 - Inits func ptrs and MAC type
318 * Does not touch the hardware.
323 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_82599()
324 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_ops_82599()
325 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_ops_82599()
335 phy->ops.identify = ixgbe_identify_phy_82599; in ixgbe_init_ops_82599()
336 phy->ops.init = ixgbe_init_phy_ops_82599; in ixgbe_init_ops_82599()
339 mac->ops.reset_hw = ixgbe_reset_hw_82599; in ixgbe_init_ops_82599()
340 mac->ops.enable_relaxed_ordering = ixgbe_enable_relaxed_ordering_gen2; in ixgbe_init_ops_82599()
341 mac->ops.get_media_type = ixgbe_get_media_type_82599; in ixgbe_init_ops_82599()
342 mac->ops.get_supported_physical_layer = in ixgbe_init_ops_82599()
344 mac->ops.disable_sec_rx_path = ixgbe_disable_sec_rx_path_generic; in ixgbe_init_ops_82599()
345 mac->ops.enable_sec_rx_path = ixgbe_enable_sec_rx_path_generic; in ixgbe_init_ops_82599()
346 mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_82599; in ixgbe_init_ops_82599()
347 mac->ops.read_analog_reg8 = ixgbe_read_analog_reg8_82599; in ixgbe_init_ops_82599()
348 mac->ops.write_analog_reg8 = ixgbe_write_analog_reg8_82599; in ixgbe_init_ops_82599()
349 mac->ops.start_hw = ixgbe_start_hw_82599; in ixgbe_init_ops_82599()
350 mac->ops.get_san_mac_addr = ixgbe_get_san_mac_addr_generic; in ixgbe_init_ops_82599()
351 mac->ops.set_san_mac_addr = ixgbe_set_san_mac_addr_generic; in ixgbe_init_ops_82599()
352 mac->ops.get_device_caps = ixgbe_get_device_caps_generic; in ixgbe_init_ops_82599()
353 mac->ops.get_wwn_prefix = ixgbe_get_wwn_prefix_generic; in ixgbe_init_ops_82599()
354 mac->ops.get_fcoe_boot_status = ixgbe_get_fcoe_boot_status_generic; in ixgbe_init_ops_82599()
355 mac->ops.prot_autoc_read = prot_autoc_read_82599; in ixgbe_init_ops_82599()
356 mac->ops.prot_autoc_write = prot_autoc_write_82599; in ixgbe_init_ops_82599()
359 mac->ops.set_vmdq = ixgbe_set_vmdq_generic; in ixgbe_init_ops_82599()
360 mac->ops.set_vmdq_san_mac = ixgbe_set_vmdq_san_mac_generic; in ixgbe_init_ops_82599()
361 mac->ops.clear_vmdq = ixgbe_clear_vmdq_generic; in ixgbe_init_ops_82599()
362 mac->ops.insert_mac_addr = ixgbe_insert_mac_addr_generic; in ixgbe_init_ops_82599()
363 mac->rar_highwater = 1; in ixgbe_init_ops_82599()
364 mac->ops.set_vfta = ixgbe_set_vfta_generic; in ixgbe_init_ops_82599()
365 mac->ops.set_vlvf = ixgbe_set_vlvf_generic; in ixgbe_init_ops_82599()
366 mac->ops.clear_vfta = ixgbe_clear_vfta_generic; in ixgbe_init_ops_82599()
367 mac->ops.init_uta_tables = ixgbe_init_uta_tables_generic; in ixgbe_init_ops_82599()
368 mac->ops.setup_sfp = ixgbe_setup_sfp_modules_82599; in ixgbe_init_ops_82599()
369 mac->ops.set_mac_anti_spoofing = ixgbe_set_mac_anti_spoofing; in ixgbe_init_ops_82599()
370 mac->ops.set_vlan_anti_spoofing = ixgbe_set_vlan_anti_spoofing; in ixgbe_init_ops_82599()
373 mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_82599; in ixgbe_init_ops_82599()
374 mac->ops.check_link = ixgbe_check_mac_link_generic; in ixgbe_init_ops_82599()
375 mac->ops.setup_rxpba = ixgbe_set_rxpba_generic; in ixgbe_init_ops_82599()
378 mac->mcft_size = IXGBE_82599_MC_TBL_SIZE; in ixgbe_init_ops_82599()
379 mac->vft_size = IXGBE_82599_VFT_TBL_SIZE; in ixgbe_init_ops_82599()
380 mac->num_rar_entries = IXGBE_82599_RAR_ENTRIES; in ixgbe_init_ops_82599()
381 mac->rx_pb_size = IXGBE_82599_RX_PB_SIZE; in ixgbe_init_ops_82599()
382 mac->max_rx_queues = IXGBE_82599_MAX_RX_QUEUES; in ixgbe_init_ops_82599()
383 mac->max_tx_queues = IXGBE_82599_MAX_TX_QUEUES; in ixgbe_init_ops_82599()
384 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw); in ixgbe_init_ops_82599()
386 mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)) in ixgbe_init_ops_82599()
390 hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_pf; in ixgbe_init_ops_82599()
393 eeprom->ops.read = ixgbe_read_eeprom_82599; in ixgbe_init_ops_82599()
394 eeprom->ops.read_buffer = ixgbe_read_eeprom_buffer_82599; in ixgbe_init_ops_82599()
397 mac->ops.set_fw_drv_ver = ixgbe_set_fw_drv_ver_generic; in ixgbe_init_ops_82599()
399 mac->ops.get_thermal_sensor_data = in ixgbe_init_ops_82599()
401 mac->ops.init_thermal_sensor_thresh = in ixgbe_init_ops_82599()
404 mac->ops.bypass_rw = ixgbe_bypass_rw_generic; in ixgbe_init_ops_82599()
405 mac->ops.bypass_valid_rd = ixgbe_bypass_valid_rd_generic; in ixgbe_init_ops_82599()
406 mac->ops.bypass_set = ixgbe_bypass_set_generic; in ixgbe_init_ops_82599()
407 mac->ops.bypass_rd_eep = ixgbe_bypass_rd_eep_generic; in ixgbe_init_ops_82599()
409 mac->ops.get_rtrup2tc = ixgbe_dcb_get_rtrup2tc_generic; in ixgbe_init_ops_82599()
415 * ixgbe_get_link_capabilities_82599 - Determines link capabilities
433 if (hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_get_link_capabilities_82599()
434 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_get_link_capabilities_82599()
435 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_get_link_capabilities_82599()
436 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_get_link_capabilities_82599()
437 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_get_link_capabilities_82599()
438 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1) { in ixgbe_get_link_capabilities_82599()
444 if (hw->phy.sfp_type == ixgbe_sfp_type_da_cu_core0 || in ixgbe_get_link_capabilities_82599()
445 hw->phy.sfp_type == ixgbe_sfp_type_da_cu_core1) { in ixgbe_get_link_capabilities_82599()
449 if (hw->phy.multispeed_fiber) in ixgbe_get_link_capabilities_82599()
460 if (hw->mac.orig_link_settings_stored) in ixgbe_get_link_capabilities_82599()
461 autoc = hw->mac.orig_autoc; in ixgbe_get_link_capabilities_82599()
520 if (hw->phy.multispeed_fiber) { in ixgbe_get_link_capabilities_82599()
524 /* QSFP must not enable full auto-negotiation in ixgbe_get_link_capabilities_82599()
527 if (hw->phy.media_type == ixgbe_media_type_fiber_qsfp) in ixgbe_get_link_capabilities_82599()
538 * ixgbe_get_media_type_82599 - Get media type
550 switch (hw->phy.type) { in ixgbe_get_media_type_82599()
559 switch (hw->device_id) { in ixgbe_get_media_type_82599()
591 hw->phy.multispeed_fiber = true; in ixgbe_get_media_type_82599()
602 * ixgbe_stop_mac_link_on_d3_82599 - Disables link on D3
616 if (!ixgbe_mng_present(hw) && !hw->wol_enabled && in ixgbe_stop_mac_link_on_d3_82599()
625 * ixgbe_start_mac_link_82599 - Setup MAC link settings
644 /* reset_pipeline requires us to hold this lock as it writes to in ixgbe_start_mac_link_82599()
648 status = hw->mac.ops.acquire_swfw_sync(hw, in ixgbe_start_mac_link_82599()
660 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); in ixgbe_start_mac_link_82599()
693 * ixgbe_disable_tx_laser_multispeed_fiber - Disable Tx laser
716 * ixgbe_enable_tx_laser_multispeed_fiber - Enable Tx laser
727 /* Enable Tx laser; allow 100ms to light up */ in ixgbe_enable_tx_laser_multispeed_fiber()
735 * ixgbe_flap_tx_laser_multispeed_fiber - Flap Tx laser
741 * so, we set the speed then disable and re-enable the Tx laser, to
754 if (hw->mac.autotry_restart) { in ixgbe_flap_tx_laser_multispeed_fiber()
757 hw->mac.autotry_restart = false; in ixgbe_flap_tx_laser_multispeed_fiber()
762 * ixgbe_set_hard_rate_select_speed - Set module link speed
791 * ixgbe_setup_mac_link_smartspeed - Set MAC link speed using SmartSpeed
811 hw->phy.autoneg_advertised = 0; in ixgbe_setup_mac_link_smartspeed()
814 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_mac_link_smartspeed()
817 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_mac_link_smartspeed()
820 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_mac_link_smartspeed()
830 hw->phy.smart_speed_active = false; in ixgbe_setup_mac_link_smartspeed()
839 * Section 73.10.2, we may have to wait up to 500ms if KR is in ixgbe_setup_mac_link_smartspeed()
840 * attempted, or 200ms if KX/KX4/BX/BX4 is attempted, per in ixgbe_setup_mac_link_smartspeed()
866 hw->phy.smart_speed_active = true; in ixgbe_setup_mac_link_smartspeed()
873 * Wait for the controller to acquire link. 600ms will allow for in ixgbe_setup_mac_link_smartspeed()
876 * connect attempts as defined in the AN MAS table 73-7. in ixgbe_setup_mac_link_smartspeed()
891 hw->phy.smart_speed_active = false; in ixgbe_setup_mac_link_smartspeed()
903 * ixgbe_setup_mac_link_82599 - Set MAC link speed
941 if (hw->mac.orig_link_settings_stored) in ixgbe_setup_mac_link_82599()
942 orig_autoc = hw->mac.orig_autoc; in ixgbe_setup_mac_link_82599()
958 (hw->phy.smart_speed_active == false)) in ixgbe_setup_mac_link_82599()
978 if (autoneg || hw->phy.type == ixgbe_phy_qsfp_intel) in ixgbe_setup_mac_link_82599()
987 status = hw->mac.ops.prot_autoc_write(hw, autoc, false); in ixgbe_setup_mac_link_82599()
1021 * ixgbe_setup_copper_link_82599 - Set the PHY autoneg advertised field
1037 status = hw->phy.ops.setup_link_speed(hw, speed, in ixgbe_setup_copper_link_82599()
1046 * ixgbe_reset_hw_82599 - Perform hardware reset
1065 status = hw->mac.ops.stop_adapter(hw); in ixgbe_reset_hw_82599()
1075 status = hw->phy.ops.init(hw); in ixgbe_reset_hw_82599()
1081 if (hw->phy.sfp_setup_needed) { in ixgbe_reset_hw_82599()
1082 status = hw->mac.ops.setup_sfp(hw); in ixgbe_reset_hw_82599()
1083 hw->phy.sfp_setup_needed = false; in ixgbe_reset_hw_82599()
1090 if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL) in ixgbe_reset_hw_82599()
1091 hw->phy.ops.reset(hw); in ixgbe_reset_hw_82599()
1104 if (!hw->force_full_reset) { in ixgbe_reset_hw_82599()
1105 hw->mac.ops.check_link(hw, &link_speed, &link_up, false); in ixgbe_reset_hw_82599()
1114 /* Poll for reset bit to self-clear meaning reset is complete */ in ixgbe_reset_hw_82599()
1134 if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { in ixgbe_reset_hw_82599()
1135 hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_reset_hw_82599()
1154 if (hw->mac.orig_link_settings_stored == false) { in ixgbe_reset_hw_82599()
1155 hw->mac.orig_autoc = autoc; in ixgbe_reset_hw_82599()
1156 hw->mac.orig_autoc2 = autoc2; in ixgbe_reset_hw_82599()
1157 hw->mac.orig_link_settings_stored = true; in ixgbe_reset_hw_82599()
1160 /* If MNG FW is running on a multi-speed device that in ixgbe_reset_hw_82599()
1166 if ((hw->phy.multispeed_fiber && ixgbe_mng_enabled(hw)) || in ixgbe_reset_hw_82599()
1167 hw->wol_enabled) in ixgbe_reset_hw_82599()
1168 hw->mac.orig_autoc = in ixgbe_reset_hw_82599()
1169 (hw->mac.orig_autoc & ~IXGBE_AUTOC_LMS_MASK) | in ixgbe_reset_hw_82599()
1172 if (autoc != hw->mac.orig_autoc) { in ixgbe_reset_hw_82599()
1173 status = hw->mac.ops.prot_autoc_write(hw, in ixgbe_reset_hw_82599()
1174 hw->mac.orig_autoc, in ixgbe_reset_hw_82599()
1181 (hw->mac.orig_autoc2 & IXGBE_AUTOC2_UPPER_MASK)) { in ixgbe_reset_hw_82599()
1183 autoc2 |= (hw->mac.orig_autoc2 & in ixgbe_reset_hw_82599()
1190 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_82599()
1197 hw->mac.num_rar_entries = 128; in ixgbe_reset_hw_82599()
1198 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_82599()
1201 hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr); in ixgbe_reset_hw_82599()
1204 if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) { in ixgbe_reset_hw_82599()
1206 hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1; in ixgbe_reset_hw_82599()
1208 hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index, in ixgbe_reset_hw_82599()
1209 hw->mac.san_addr, 0, IXGBE_RAH_AV); in ixgbe_reset_hw_82599()
1212 hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index, in ixgbe_reset_hw_82599()
1216 hw->mac.num_rar_entries--; in ixgbe_reset_hw_82599()
1220 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, in ixgbe_reset_hw_82599()
1221 &hw->mac.wwpn_prefix); in ixgbe_reset_hw_82599()
1228 * ixgbe_fdir_check_cmd_complete - poll to check whether FDIRCMD is complete
1247 * ixgbe_reinit_fdir_tables_82599 - Reinitialize Flow Director tables.
1266 DEBUGOUT("Flow Director previous command did not complete, aborting table re-initialization.\n"); in ixgbe_reinit_fdir_tables_82599()
1275 * before re-writing the FDIRCTRL control register with the same value. in ixgbe_reinit_fdir_tables_82599()
1276 * - write 1 to bit 8 of FDIRCMD register & in ixgbe_reinit_fdir_tables_82599()
1277 * - write 0 to bit 8 of FDIRCMD register in ixgbe_reinit_fdir_tables_82599()
1297 /* Poll init-done after we write FDIRCTRL register */ in ixgbe_reinit_fdir_tables_82599()
1320 * ixgbe_fdir_enable_82599 - Initialize Flow Director control registers
1335 * Poll init-done after we write the register. Estimated times: in ixgbe_fdir_enable_82599()
1338 * 100M: PBALLOC = 11b, timing is 6ms in ixgbe_fdir_enable_82599()
1361 * ixgbe_init_fdir_signature_82599 - Initialize Flow Director signature filters
1372 * Move the flexible bytes to use the ethertype - shift 6 words in ixgbe_init_fdir_signature_82599()
1387 * ixgbe_init_fdir_perfect_82599 - Initialize Flow Director perfect filters
1391 * @cloud_mode: true - cloud mode, false - other mode
1404 * Move the flexible bytes to use the ethertype - shift 6 words in ixgbe_init_fdir_perfect_82599()
1426 * ixgbe_set_fdir_drop_queue_82599 - Set Flow Director drop queue
1441 if ((hw->mac.type == ixgbe_mac_X550) || in ixgbe_set_fdir_drop_queue_82599()
1442 (hw->mac.type == ixgbe_mac_X550EM_x) || in ixgbe_set_fdir_drop_queue_82599()
1443 (hw->mac.type == ixgbe_mac_X550EM_a)) in ixgbe_set_fdir_drop_queue_82599()
1474 sig_hash ^= lo_hash_dword << (16 - n); \
1480 sig_hash ^= hi_hash_dword << (16 - n); \
1484 * ixgbe_atr_compute_sig_hash_82599 - Compute the signature hash
1551 * ixgbe_fdir_add_signature_filter_82599 - Adds a signature hash filter
1579 (IXGBE_ATR_L4TYPE_TUNNEL_MASK - 1); in ixgbe_fdir_add_signature_filter_82599()
1602 * The lower 32-bits of fdirhashcmd is for FDIRHASH, the upper 32-bits in ixgbe_fdir_add_signature_filter_82599()
1603 * is for FDIRCMD. Then do a 64-bit register write from FDIRHASH. in ixgbe_fdir_add_signature_filter_82599()
1624 * ixgbe_atr_compute_perfect_hash_82599 - Compute the perfect filter hash
1645 input->dword_stream[i] &= input_mask->dword_stream[i]; in ixgbe_atr_compute_perfect_hash_82599()
1648 flow_vm_vlan = IXGBE_NTOHL(input->dword_stream[0]); in ixgbe_atr_compute_perfect_hash_82599()
1652 hi_dword ^= input->dword_stream[i]; in ixgbe_atr_compute_perfect_hash_82599()
1679 input->formatted.bkt_hash = bucket_hash & 0x1FFF; in ixgbe_atr_compute_perfect_hash_82599()
1683 * ixgbe_get_fdirtcpm_82599 - generate a TCP port from atr_input_masks
1693 u32 mask = IXGBE_NTOHS(input_mask->formatted.dst_port); in ixgbe_get_fdirtcpm_82599()
1695 mask |= (u32)IXGBE_NTOHS(input_mask->formatted.src_port); in ixgbe_get_fdirtcpm_82599()
1704 * that are either all or in part big-endian. As a result on big-endian
1705 * systems we will end up byte swapping the value to little-endian before
1707 * big-endian format.
1740 if (input_mask->formatted.bkt_hash) in ixgbe_fdir_set_input_mask_82599()
1744 switch (input_mask->formatted.vm_pool & 0x7F) { in ixgbe_fdir_set_input_mask_82599()
1754 switch (input_mask->formatted.flow_type & IXGBE_ATR_L4TYPE_MASK) { in ixgbe_fdir_set_input_mask_82599()
1757 if (input_mask->formatted.dst_port || in ixgbe_fdir_set_input_mask_82599()
1758 input_mask->formatted.src_port) { in ixgbe_fdir_set_input_mask_82599()
1769 switch (IXGBE_NTOHS(input_mask->formatted.vlan_id) & 0xEFFF) { in ixgbe_fdir_set_input_mask_82599()
1792 switch (input_mask->formatted.flex_bytes & 0xFFFF) { in ixgbe_fdir_set_input_mask_82599()
1809 switch (input_mask->formatted.inner_mac[0] & 0xFF) { in ixgbe_fdir_set_input_mask_82599()
1820 switch (input_mask->formatted.tni_vni & 0xFFFFFFFF) { in ixgbe_fdir_set_input_mask_82599()
1835 switch (input_mask->formatted.tunnel_type & 0xFFFF) { in ixgbe_fdir_set_input_mask_82599()
1855 switch (hw->mac.type) { in ixgbe_fdir_set_input_mask_82599()
1866 /* Now mask VM pool and destination IPv6 - bits 5 and 2 */ in ixgbe_fdir_set_input_mask_82599()
1878 switch (hw->mac.type) { in ixgbe_fdir_set_input_mask_82599()
1888 /* store source and destination IP masks (big-enian) */ in ixgbe_fdir_set_input_mask_82599()
1890 ~input_mask->formatted.src_ip[0]); in ixgbe_fdir_set_input_mask_82599()
1892 ~input_mask->formatted.dst_ip[0]); in ixgbe_fdir_set_input_mask_82599()
1912 input->formatted.src_ip[0]); in ixgbe_fdir_write_perfect_filter_82599()
1914 input->formatted.src_ip[1]); in ixgbe_fdir_write_perfect_filter_82599()
1916 input->formatted.src_ip[2]); in ixgbe_fdir_write_perfect_filter_82599()
1918 /* record the source address (big-endian) */ in ixgbe_fdir_write_perfect_filter_82599()
1920 input->formatted.src_ip[0]); in ixgbe_fdir_write_perfect_filter_82599()
1923 * (big-endian) */ in ixgbe_fdir_write_perfect_filter_82599()
1925 input->formatted.dst_ip[0]); in ixgbe_fdir_write_perfect_filter_82599()
1927 /* record source and destination port (little-endian)*/ in ixgbe_fdir_write_perfect_filter_82599()
1928 fdirport = IXGBE_NTOHS(input->formatted.dst_port); in ixgbe_fdir_write_perfect_filter_82599()
1930 fdirport |= (u32)IXGBE_NTOHS(input->formatted.src_port); in ixgbe_fdir_write_perfect_filter_82599()
1934 /* record VLAN (little-endian) and flex_bytes(big-endian) */ in ixgbe_fdir_write_perfect_filter_82599()
1935 fdirvlan = IXGBE_STORE_AS_BE16(input->formatted.flex_bytes); in ixgbe_fdir_write_perfect_filter_82599()
1937 fdirvlan |= (u32)IXGBE_NTOHS(input->formatted.vlan_id); in ixgbe_fdir_write_perfect_filter_82599()
1941 if (input->formatted.tunnel_type != 0) in ixgbe_fdir_write_perfect_filter_82599()
1944 addr_low = ((u32)input->formatted.inner_mac[0] | in ixgbe_fdir_write_perfect_filter_82599()
1945 ((u32)input->formatted.inner_mac[1] << 8) | in ixgbe_fdir_write_perfect_filter_82599()
1946 ((u32)input->formatted.inner_mac[2] << 16) | in ixgbe_fdir_write_perfect_filter_82599()
1947 ((u32)input->formatted.inner_mac[3] << 24)); in ixgbe_fdir_write_perfect_filter_82599()
1948 addr_high = ((u32)input->formatted.inner_mac[4] | in ixgbe_fdir_write_perfect_filter_82599()
1949 ((u32)input->formatted.inner_mac[5] << 8)); in ixgbe_fdir_write_perfect_filter_82599()
1953 IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(2), input->formatted.tni_vni); in ixgbe_fdir_write_perfect_filter_82599()
1957 fdirhash = input->formatted.bkt_hash; in ixgbe_fdir_write_perfect_filter_82599()
1972 if (input->formatted.flow_type & IXGBE_ATR_L4TYPE_TUNNEL_MASK) in ixgbe_fdir_write_perfect_filter_82599()
1974 fdircmd |= input->formatted.flow_type << IXGBE_FDIRCMD_FLOW_TYPE_SHIFT; in ixgbe_fdir_write_perfect_filter_82599()
1976 fdircmd |= (u32)input->formatted.vm_pool << IXGBE_FDIRCMD_VT_POOL_SHIFT; in ixgbe_fdir_write_perfect_filter_82599()
1997 fdirhash = input->formatted.bkt_hash; in ixgbe_fdir_erase_perfect_filter_82599()
2025 * ixgbe_fdir_add_perfect_filter_82599 - Adds a perfect filter
2047 * Check flow_type formatting, and bail out before we touch the hardware in ixgbe_fdir_add_perfect_filter_82599()
2050 switch (input->formatted.flow_type) { in ixgbe_fdir_add_perfect_filter_82599()
2053 input_mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK; in ixgbe_fdir_add_perfect_filter_82599()
2054 if (input->formatted.dst_port || input->formatted.src_port) { in ixgbe_fdir_add_perfect_filter_82599()
2061 if (input->formatted.dst_port || input->formatted.src_port) { in ixgbe_fdir_add_perfect_filter_82599()
2065 input_mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | in ixgbe_fdir_add_perfect_filter_82599()
2072 input_mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | in ixgbe_fdir_add_perfect_filter_82599()
2094 * ixgbe_read_analog_reg8_82599 - Reads 8 bit Omer analog register
2118 * ixgbe_write_analog_reg8_82599 - Writes 8 bit Omer analog register
2140 * ixgbe_start_hw_82599 - Prepare hardware for Tx/Rx
2145 * Then performs revision-specific operations, if any.
2160 hw->mac.autotry_restart = true; in ixgbe_start_hw_82599()
2169 * ixgbe_identify_phy_82599 - Get physical layer module
2182 /* Detect PHY if not unknown - returns success if already detected. */ in ixgbe_identify_phy_82599()
2185 /* 82599 10GBASE-T requires an external PHY */ in ixgbe_identify_phy_82599()
2186 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) in ixgbe_identify_phy_82599()
2193 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_identify_phy_82599()
2194 hw->phy.type = ixgbe_phy_none; in ixgbe_identify_phy_82599()
2199 if (hw->phy.type == ixgbe_phy_sfp_unsupported) in ixgbe_identify_phy_82599()
2206 * ixgbe_get_supported_physical_layer_82599 - Returns physical layer type
2223 hw->phy.ops.identify(hw); in ixgbe_get_supported_physical_layer_82599()
2225 switch (hw->phy.type) { in ixgbe_get_supported_physical_layer_82599()
2228 hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, in ixgbe_get_supported_physical_layer_82599()
2285 * test KR mode - we need to id KR mode correctly before SFP module. in ixgbe_get_supported_physical_layer_82599()
2293 * ixgbe_enable_rx_dma_82599 - Enable the Rx DMA unit on 82599
2311 hw->mac.ops.disable_sec_rx_path(hw); in ixgbe_enable_rx_dma_82599()
2318 hw->mac.ops.enable_sec_rx_path(hw); in ixgbe_enable_rx_dma_82599()
2324 * ixgbe_verify_fw_version_82599 - verify FW version for 82599
2342 if (hw->phy.media_type != ixgbe_media_type_fiber) { in ixgbe_verify_fw_version_82599()
2348 if (hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset)) { in ixgbe_verify_fw_version_82599()
2358 if (hw->eeprom.ops.read(hw, (fw_offset + in ixgbe_verify_fw_version_82599()
2372 if (hw->eeprom.ops.read(hw, (fw_ptp_cfg_offset + in ixgbe_verify_fw_version_82599()
2388 * ixgbe_verify_lesm_fw_enabled_82599 - Checks LESM FW module state.
2403 status = hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset); in ixgbe_verify_lesm_fw_enabled_82599()
2410 status = hw->eeprom.ops.read(hw, (fw_offset + in ixgbe_verify_lesm_fw_enabled_82599()
2419 status = hw->eeprom.ops.read(hw, (fw_lesm_param_offset + in ixgbe_verify_lesm_fw_enabled_82599()
2432 * ixgbe_read_eeprom_buffer_82599 - Read EEPROM word(s) using
2445 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_read_eeprom_buffer_82599()
2454 if ((eeprom->type == ixgbe_eeprom_spi) && in ixgbe_read_eeprom_buffer_82599()
2455 (offset + (words - 1) <= IXGBE_EERD_MAX_ADDR)) in ixgbe_read_eeprom_buffer_82599()
2467 * ixgbe_read_eeprom_82599 - Read EEPROM word using
2479 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_read_eeprom_82599()
2488 if ((eeprom->type == ixgbe_eeprom_spi) && in ixgbe_read_eeprom_82599()
2498 * ixgbe_reset_pipeline_82599 - perform pipeline reset
2549 * ixgbe_read_i2c_byte_82599 - Reads 8 bit word over I2C
2567 if (hw->phy.qsfp_shared_i2c_bus == true) { in ixgbe_read_i2c_byte_82599()
2580 timeout--; in ixgbe_read_i2c_byte_82599()
2595 if (hw->phy.qsfp_shared_i2c_bus == true) { in ixgbe_read_i2c_byte_82599()
2607 * ixgbe_write_i2c_byte_82599 - Writes 8 bit word over I2C
2625 if (hw->phy.qsfp_shared_i2c_bus == true) { in ixgbe_write_i2c_byte_82599()
2638 timeout--; in ixgbe_write_i2c_byte_82599()
2653 if (hw->phy.qsfp_shared_i2c_bus == true) { in ixgbe_write_i2c_byte_82599()