Lines Matching refs:sched_base
7651 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid), in iwn4965_ampdu_tx_start()
7663 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid), in iwn4965_ampdu_tx_start()
7666 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4, in iwn4965_ampdu_tx_start()
7712 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid), in iwn5000_ampdu_tx_start()
7727 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4, in iwn5000_ampdu_tx_start()
7930 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR); in iwn4965_post_alive()
7931 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0, in iwn4965_post_alive()
7947 iwn_mem_write(sc, sc->sched_base + in iwn4965_post_alive()
7950 iwn_mem_write(sc, sc->sched_base + in iwn4965_post_alive()
7990 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR); in iwn5000_post_alive()
7991 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0, in iwn5000_post_alive()
8010 iwn_mem_write(sc, sc->sched_base + in iwn5000_post_alive()
8013 iwn_mem_write(sc, sc->sched_base + in iwn5000_post_alive()