Lines Matching +full:sram +full:- +full:others

1 /*-
2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
84 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
85 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
86 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
87 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
88 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
89 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
90 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
91 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
92 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
93 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
94 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
95 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
96 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
97 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
99 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
100 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
101 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
102 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
103 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
104 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
105 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
106 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
107 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
108 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
110 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
111 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
119 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
120 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
378 nitems(iwn_ident_table) - 1);
403 for (ident = iwn_ident_table; ident->name != NULL; ident++) { in iwn_probe()
404 if (pci_get_vendor(dev) == ident->vendor && in iwn_probe()
405 pci_get_device(dev) == ident->device) { in iwn_probe()
406 device_set_desc(dev, ident->name); in iwn_probe()
417 if (sc->hw_type == IWN_HW_REV_TYPE_5300) in iwn_is_3stream_device()
429 sc->sc_dev = dev; in iwn_attach()
432 error = resource_int_value(device_get_name(sc->sc_dev), in iwn_attach()
433 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug)); in iwn_attach()
435 sc->sc_debug = 0; in iwn_attach()
437 sc->sc_debug = 0; in iwn_attach()
440 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__); in iwn_attach()
446 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off); in iwn_attach()
452 /* Clear device-specific "PCI retry timeout" register (41h). */ in iwn_attach()
455 /* Enable bus-mastering. */ in iwn_attach()
459 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in iwn_attach()
461 if (sc->mem == NULL) { in iwn_attach()
466 sc->sc_st = rman_get_bustag(sc->mem); in iwn_attach()
467 sc->sc_sh = rman_get_bushandle(sc->mem); in iwn_attach()
474 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | in iwn_attach()
476 if (sc->irq == NULL) { in iwn_attach()
485 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT) in iwn_attach()
487 sc->subdevice_id = pci_get_subdevice(dev); in iwn_attach()
493 if (sc->hw_type == IWN_HW_REV_TYPE_4965) in iwn_attach()
529 if (sc->hw_type != IWN_HW_REV_TYPE_4965 && in iwn_attach()
544 for (i = 0; i < sc->ntxqs; i++) { in iwn_attach()
545 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) { in iwn_attach()
554 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) { in iwn_attach()
563 ic = &sc->sc_ic; in iwn_attach()
564 ic->ic_softc = sc; in iwn_attach()
565 ic->ic_name = device_get_nameunit(dev); in iwn_attach()
566 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ in iwn_attach()
567 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ in iwn_attach()
570 ic->ic_caps = in iwn_attach()
584 | IEEE80211_C_PMGT /* Station-side power mgmt */ in iwn_attach()
588 if ((error = iwn_read_eeprom(sc, ic->ic_macaddr)) != 0) { in iwn_attach()
595 sc->ntxchains = in iwn_attach()
596 ((sc->txchainmask >> 2) & 1) + in iwn_attach()
597 ((sc->txchainmask >> 1) & 1) + in iwn_attach()
598 ((sc->txchainmask >> 0) & 1); in iwn_attach()
599 sc->nrxchains = in iwn_attach()
600 ((sc->rxchainmask >> 2) & 1) + in iwn_attach()
601 ((sc->rxchainmask >> 1) & 1) + in iwn_attach()
602 ((sc->rxchainmask >> 0) & 1); in iwn_attach()
605 sc->ntxchains, sc->nrxchains, sc->eeprom_domain, in iwn_attach()
606 ic->ic_macaddr, ":"); in iwn_attach()
609 if (sc->sc_flags & IWN_FLAG_HAS_11N) { in iwn_attach()
610 ic->ic_rxstream = sc->nrxchains; in iwn_attach()
611 ic->ic_txstream = sc->ntxchains; in iwn_attach()
616 * it's not a 3-stream device. in iwn_attach()
619 if (ic->ic_rxstream > 2) in iwn_attach()
620 ic->ic_rxstream = 2; in iwn_attach()
621 if (ic->ic_txstream > 2) in iwn_attach()
622 ic->ic_txstream = 2; in iwn_attach()
625 ic->ic_htcaps = in iwn_attach()
633 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */ in iwn_attach()
635 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */ in iwn_attach()
640 | IEEE80211_HTC_AMPDU /* tx A-MPDU */ in iwn_attach()
642 | IEEE80211_HTC_AMSDU /* tx A-MSDU */ in iwn_attach()
648 ic->ic_vap_create = iwn_vap_create; in iwn_attach()
649 ic->ic_ioctl = iwn_ioctl; in iwn_attach()
650 ic->ic_parent = iwn_parent; in iwn_attach()
651 ic->ic_vap_delete = iwn_vap_delete; in iwn_attach()
652 ic->ic_transmit = iwn_transmit; in iwn_attach()
653 ic->ic_raw_xmit = iwn_raw_xmit; in iwn_attach()
654 ic->ic_node_alloc = iwn_node_alloc; in iwn_attach()
655 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start; in iwn_attach()
656 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start; in iwn_attach()
657 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop; in iwn_attach()
658 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop; in iwn_attach()
659 sc->sc_addba_request = ic->ic_addba_request; in iwn_attach()
660 ic->ic_addba_request = iwn_addba_request; in iwn_attach()
661 sc->sc_addba_response = ic->ic_addba_response; in iwn_attach()
662 ic->ic_addba_response = iwn_addba_response; in iwn_attach()
663 sc->sc_addba_stop = ic->ic_addba_stop; in iwn_attach()
664 ic->ic_addba_stop = iwn_ampdu_tx_stop; in iwn_attach()
665 ic->ic_newassoc = iwn_newassoc; in iwn_attach()
666 ic->ic_wme.wme_update = iwn_updateedca; in iwn_attach()
667 ic->ic_update_promisc = iwn_update_promisc; in iwn_attach()
668 ic->ic_update_mcast = iwn_update_mcast; in iwn_attach()
669 ic->ic_scan_start = iwn_scan_start; in iwn_attach()
670 ic->ic_scan_end = iwn_scan_end; in iwn_attach()
671 ic->ic_set_channel = iwn_set_channel; in iwn_attach()
672 ic->ic_scan_curchan = iwn_scan_curchan; in iwn_attach()
673 ic->ic_scan_mindwell = iwn_scan_mindwell; in iwn_attach()
674 ic->ic_getradiocaps = iwn_getradiocaps; in iwn_attach()
675 ic->ic_setregdomain = iwn_setregdomain; in iwn_attach()
679 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0); in iwn_attach()
680 callout_init_mtx(&sc->scan_timeout, &sc->sc_mtx, 0); in iwn_attach()
681 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0); in iwn_attach()
682 TASK_INIT(&sc->sc_rftoggle_task, 0, iwn_rftoggle_task, sc); in iwn_attach()
683 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc); in iwn_attach()
684 TASK_INIT(&sc->sc_xmit_task, 0, iwn_xmit_task, sc); in iwn_attach()
686 mbufq_init(&sc->sc_xmit_queue, 1024); in iwn_attach()
688 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK, in iwn_attach()
689 taskqueue_thread_enqueue, &sc->sc_tq); in iwn_attach()
690 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq"); in iwn_attach()
701 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE, in iwn_attach()
702 NULL, iwn_intr, sc, &sc->sc_ih); in iwn_attach()
710 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n", in iwn_attach()
718 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_attach()
721 sc->sc_cdev = make_dev(&iwn_cdevsw, device_get_unit(dev), in iwn_attach()
723 if (sc->sc_cdev == NULL) { in iwn_attach()
726 sc->sc_cdev->si_drv1 = sc; in iwn_attach()
731 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__); in iwn_attach()
749 sc->base_params = &iwn4965_base_params; in iwn_config_specific()
750 sc->limits = &iwn4965_sensitivity_limits; in iwn_config_specific()
751 sc->fwname = "iwn4965fw"; in iwn_config_specific()
753 sc->txchainmask = IWN_ANT_AB; in iwn_config_specific()
754 sc->rxchainmask = IWN_ANT_ABC; in iwn_config_specific()
756 sc->sc_flags |= IWN_FLAG_BTCOEX; in iwn_config_specific()
761 switch(sc->subdevice_id) { in iwn_config_specific()
774 sc->limits = &iwn1000_sensitivity_limits; in iwn_config_specific()
775 sc->base_params = &iwn1000_base_params; in iwn_config_specific()
776 sc->fwname = "iwn1000fw"; in iwn_config_specific()
779 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
781 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
790 sc->fwname = "iwn6000fw"; in iwn_config_specific()
791 sc->limits = &iwn6000_sensitivity_limits; in iwn_config_specific()
792 switch(sc->subdevice_id) { in iwn_config_specific()
797 sc->base_params = &iwn_6000_base_params; in iwn_config_specific()
809 sc->base_params = &iwn_6000i_base_params; in iwn_config_specific()
810 sc->sc_flags |= IWN_FLAG_INTERNAL_PA; in iwn_config_specific()
811 sc->txchainmask = IWN_ANT_BC; in iwn_config_specific()
812 sc->rxchainmask = IWN_ANT_BC; in iwn_config_specific()
815 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
817 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
824 switch(sc->subdevice_id) { in iwn_config_specific()
844 sc->fwname = "iwn6000g2afw"; in iwn_config_specific()
845 sc->limits = &iwn6000_sensitivity_limits; in iwn_config_specific()
846 sc->base_params = &iwn_6000g2_base_params; in iwn_config_specific()
849 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
851 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
858 switch(sc->subdevice_id) { in iwn_config_specific()
864 sc->fwname = "iwn6000g2bfw"; in iwn_config_specific()
865 sc->limits = &iwn6235_sensitivity_limits; in iwn_config_specific()
866 sc->base_params = &iwn_6235_base_params; in iwn_config_specific()
869 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
871 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
878 switch(sc->subdevice_id) { in iwn_config_specific()
887 sc->fwname = "iwn6050fw"; in iwn_config_specific()
888 sc->txchainmask = IWN_ANT_AB; in iwn_config_specific()
889 sc->rxchainmask = IWN_ANT_AB; in iwn_config_specific()
890 sc->limits = &iwn6000_sensitivity_limits; in iwn_config_specific()
891 sc->base_params = &iwn_6050_base_params; in iwn_config_specific()
894 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
896 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
903 switch(sc->subdevice_id) { in iwn_config_specific()
912 sc->fwname = "iwn6050fw"; in iwn_config_specific()
913 sc->limits = &iwn6000_sensitivity_limits; in iwn_config_specific()
914 sc->base_params = &iwn_6150_base_params; in iwn_config_specific()
917 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
919 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
928 switch(sc->subdevice_id) { in iwn_config_specific()
951 sc->fwname = "iwn6000g2bfw"; in iwn_config_specific()
952 sc->limits = &iwn6000_sensitivity_limits; in iwn_config_specific()
953 sc->base_params = &iwn_6000g2b_base_params; in iwn_config_specific()
956 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
958 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
968 switch(sc->subdevice_id) { in iwn_config_specific()
977 sc->fwname = "iwn6000g2bfw"; in iwn_config_specific()
978 sc->limits = &iwn6000_sensitivity_limits; in iwn_config_specific()
979 sc->base_params = &iwn_6000g2b_base_params; in iwn_config_specific()
982 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
984 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
991 switch(sc->subdevice_id) { in iwn_config_specific()
998 sc->limits = &iwn1000_sensitivity_limits; in iwn_config_specific()
999 sc->base_params = &iwn1000_base_params; in iwn_config_specific()
1000 sc->fwname = "iwn100fw"; in iwn_config_specific()
1003 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
1005 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
1016 switch(sc->subdevice_id) { in iwn_config_specific()
1023 sc->limits = &iwn2030_sensitivity_limits; in iwn_config_specific()
1024 sc->base_params = &iwn2000_base_params; in iwn_config_specific()
1025 sc->fwname = "iwn105fw"; in iwn_config_specific()
1028 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
1030 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
1041 switch(sc->subdevice_id) { in iwn_config_specific()
1045 sc->limits = &iwn2030_sensitivity_limits; in iwn_config_specific()
1046 sc->base_params = &iwn2030_base_params; in iwn_config_specific()
1047 sc->fwname = "iwn135fw"; in iwn_config_specific()
1050 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
1052 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
1060 switch(sc->subdevice_id) { in iwn_config_specific()
1067 sc->limits = &iwn2030_sensitivity_limits; in iwn_config_specific()
1068 sc->base_params = &iwn2000_base_params; in iwn_config_specific()
1069 sc->fwname = "iwn2000fw"; in iwn_config_specific()
1072 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
1074 pid, sc->subdevice_id, sc->hw_type); in iwn_config_specific()
1081 switch(sc->subdevice_id) { in iwn_config_specific()
1090 sc->limits = &iwn2030_sensitivity_limits; in iwn_config_specific()
1091 sc->base_params = &iwn2030_base_params; in iwn_config_specific()
1092 sc->fwname = "iwn2030fw"; in iwn_config_specific()
1095 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
1097 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
1106 sc->limits = &iwn5000_sensitivity_limits; in iwn_config_specific()
1107 sc->base_params = &iwn5000_base_params; in iwn_config_specific()
1108 sc->fwname = "iwn5000fw"; in iwn_config_specific()
1109 switch(sc->subdevice_id) { in iwn_config_specific()
1123 sc->txchainmask = IWN_ANT_B; in iwn_config_specific()
1124 sc->rxchainmask = IWN_ANT_AB; in iwn_config_specific()
1133 sc->txchainmask = IWN_ANT_B; in iwn_config_specific()
1134 sc->rxchainmask = IWN_ANT_AB; in iwn_config_specific()
1143 sc->txchainmask = IWN_ANT_B; in iwn_config_specific()
1144 sc->rxchainmask = IWN_ANT_AB; in iwn_config_specific()
1159 sc->txchainmask = IWN_ANT_ABC; in iwn_config_specific()
1160 sc->rxchainmask = IWN_ANT_ABC; in iwn_config_specific()
1163 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
1165 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
1174 sc->limits = &iwn5000_sensitivity_limits; in iwn_config_specific()
1175 sc->base_params = &iwn5000_base_params; in iwn_config_specific()
1176 sc->fwname = "iwn5000fw"; in iwn_config_specific()
1177 switch(sc->subdevice_id) { in iwn_config_specific()
1182 sc->limits = &iwn5000_sensitivity_limits; in iwn_config_specific()
1183 sc->base_params = &iwn5000_base_params; in iwn_config_specific()
1184 sc->fwname = "iwn5000fw"; in iwn_config_specific()
1198 sc->limits = &iwn5000_sensitivity_limits; in iwn_config_specific()
1199 sc->fwname = "iwn5150fw"; in iwn_config_specific()
1200 sc->base_params = &iwn_5x50_base_params; in iwn_config_specific()
1203 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :" in iwn_config_specific()
1205 sc->subdevice_id,sc->hw_type); in iwn_config_specific()
1210 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x" in iwn_config_specific()
1211 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id, in iwn_config_specific()
1212 sc->hw_type); in iwn_config_specific()
1221 struct iwn_ops *ops = &sc->ops; in iwn4965_attach()
1223 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn4965_attach()
1225 ops->load_firmware = iwn4965_load_firmware; in iwn4965_attach()
1226 ops->read_eeprom = iwn4965_read_eeprom; in iwn4965_attach()
1227 ops->post_alive = iwn4965_post_alive; in iwn4965_attach()
1228 ops->nic_config = iwn4965_nic_config; in iwn4965_attach()
1229 ops->update_sched = iwn4965_update_sched; in iwn4965_attach()
1230 ops->get_temperature = iwn4965_get_temperature; in iwn4965_attach()
1231 ops->get_rssi = iwn4965_get_rssi; in iwn4965_attach()
1232 ops->set_txpower = iwn4965_set_txpower; in iwn4965_attach()
1233 ops->init_gains = iwn4965_init_gains; in iwn4965_attach()
1234 ops->set_gains = iwn4965_set_gains; in iwn4965_attach()
1235 ops->rxon_assoc = iwn4965_rxon_assoc; in iwn4965_attach()
1236 ops->add_node = iwn4965_add_node; in iwn4965_attach()
1237 ops->tx_done = iwn4965_tx_done; in iwn4965_attach()
1238 ops->ampdu_tx_start = iwn4965_ampdu_tx_start; in iwn4965_attach()
1239 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop; in iwn4965_attach()
1240 sc->ntxqs = IWN4965_NTXQUEUES; in iwn4965_attach()
1241 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE; in iwn4965_attach()
1242 sc->ndmachnls = IWN4965_NDMACHNLS; in iwn4965_attach()
1243 sc->broadcast_id = IWN4965_ID_BROADCAST; in iwn4965_attach()
1244 sc->rxonsz = IWN4965_RXONSZ; in iwn4965_attach()
1245 sc->schedsz = IWN4965_SCHEDSZ; in iwn4965_attach()
1246 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ; in iwn4965_attach()
1247 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ; in iwn4965_attach()
1248 sc->fwsz = IWN4965_FWSZ; in iwn4965_attach()
1249 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT; in iwn4965_attach()
1250 sc->limits = &iwn4965_sensitivity_limits; in iwn4965_attach()
1251 sc->fwname = "iwn4965fw"; in iwn4965_attach()
1253 sc->txchainmask = IWN_ANT_AB; in iwn4965_attach()
1254 sc->rxchainmask = IWN_ANT_ABC; in iwn4965_attach()
1256 sc->sc_flags |= IWN_FLAG_BTCOEX; in iwn4965_attach()
1264 struct iwn_ops *ops = &sc->ops; in iwn5000_attach()
1266 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn5000_attach()
1268 ops->load_firmware = iwn5000_load_firmware; in iwn5000_attach()
1269 ops->read_eeprom = iwn5000_read_eeprom; in iwn5000_attach()
1270 ops->post_alive = iwn5000_post_alive; in iwn5000_attach()
1271 ops->nic_config = iwn5000_nic_config; in iwn5000_attach()
1272 ops->update_sched = iwn5000_update_sched; in iwn5000_attach()
1273 ops->get_temperature = iwn5000_get_temperature; in iwn5000_attach()
1274 ops->get_rssi = iwn5000_get_rssi; in iwn5000_attach()
1275 ops->set_txpower = iwn5000_set_txpower; in iwn5000_attach()
1276 ops->init_gains = iwn5000_init_gains; in iwn5000_attach()
1277 ops->set_gains = iwn5000_set_gains; in iwn5000_attach()
1278 ops->rxon_assoc = iwn5000_rxon_assoc; in iwn5000_attach()
1279 ops->add_node = iwn5000_add_node; in iwn5000_attach()
1280 ops->tx_done = iwn5000_tx_done; in iwn5000_attach()
1281 ops->ampdu_tx_start = iwn5000_ampdu_tx_start; in iwn5000_attach()
1282 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop; in iwn5000_attach()
1283 sc->ntxqs = IWN5000_NTXQUEUES; in iwn5000_attach()
1284 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE; in iwn5000_attach()
1285 sc->ndmachnls = IWN5000_NDMACHNLS; in iwn5000_attach()
1286 sc->broadcast_id = IWN5000_ID_BROADCAST; in iwn5000_attach()
1287 sc->rxonsz = IWN5000_RXONSZ; in iwn5000_attach()
1288 sc->schedsz = IWN5000_SCHEDSZ; in iwn5000_attach()
1289 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ; in iwn5000_attach()
1290 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ; in iwn5000_attach()
1291 sc->fwsz = IWN5000_FWSZ; in iwn5000_attach()
1292 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT; in iwn5000_attach()
1293 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN; in iwn5000_attach()
1294 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN; in iwn5000_attach()
1306 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_radiotap_attach()
1307 ieee80211_radiotap_attach(&sc->sc_ic, in iwn_radiotap_attach()
1308 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), in iwn_radiotap_attach()
1310 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), in iwn_radiotap_attach()
1312 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn_radiotap_attach()
1319 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); in iwn_sysctlattach()
1320 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); in iwn_sysctlattach()
1323 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, in iwn_sysctlattach()
1334 struct iwn_softc *sc = ic->ic_softc; in iwn_vap_create()
1338 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ in iwn_vap_create()
1342 vap = &ivp->iv_vap; in iwn_vap_create()
1344 ivp->ctx = IWN_RXON_BSS_CTX; in iwn_vap_create()
1345 vap->iv_bmissthreshold = 10; /* override default */ in iwn_vap_create()
1347 ivp->iv_newstate = vap->iv_newstate; in iwn_vap_create()
1348 vap->iv_newstate = iwn_newstate; in iwn_vap_create()
1349 sc->ivap[IWN_RXON_BSS_CTX] = vap; in iwn_vap_create()
1350 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; in iwn_vap_create()
1351 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_4; /* 4uS */ in iwn_vap_create()
1357 ic->ic_opmode = opmode; in iwn_vap_create()
1378 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) { in iwn_xmit_queue_drain()
1379 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; in iwn_xmit_queue_drain()
1390 return (mbufq_enqueue(&sc->sc_xmit_queue, m)); in iwn_xmit_queue_enqueue()
1399 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_detach()
1401 if (sc->sc_ic.ic_softc != NULL) { in iwn_detach()
1409 taskqueue_drain_all(sc->sc_tq); in iwn_detach()
1410 taskqueue_free(sc->sc_tq); in iwn_detach()
1412 callout_drain(&sc->watchdog_to); in iwn_detach()
1413 callout_drain(&sc->scan_timeout); in iwn_detach()
1414 callout_drain(&sc->calib_to); in iwn_detach()
1415 ieee80211_ifdetach(&sc->sc_ic); in iwn_detach()
1419 if (sc->irq != NULL) { in iwn_detach()
1420 bus_teardown_intr(dev, sc->irq, sc->sc_ih); in iwn_detach()
1421 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq), in iwn_detach()
1422 sc->irq); in iwn_detach()
1427 iwn_free_rx_ring(sc, &sc->rxq); in iwn_detach()
1428 for (qid = 0; qid < sc->ntxqs; qid++) in iwn_detach()
1429 iwn_free_tx_ring(sc, &sc->txq[qid]); in iwn_detach()
1432 if (sc->ict != NULL) in iwn_detach()
1436 if (sc->mem != NULL) in iwn_detach()
1438 rman_get_rid(sc->mem), sc->mem); in iwn_detach()
1440 if (sc->sc_cdev) { in iwn_detach()
1441 destroy_dev(sc->sc_cdev); in iwn_detach()
1442 sc->sc_cdev = NULL; in iwn_detach()
1445 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__); in iwn_detach()
1464 ieee80211_suspend_all(&sc->sc_ic); in iwn_suspend()
1473 /* Clear device-specific "PCI retry timeout" register (41h). */ in iwn_resume()
1476 ieee80211_resume_all(&sc->sc_ic); in iwn_resume()
1537 for (; count > 0; count--, data++, addr += 4) in iwn_prph_write_region_4()
1574 for (; count > 0; count--, addr += 4) in iwn_mem_read_region_4()
1582 for (; count > 0; count--, addr += 4) in iwn_mem_set_region_4()
1604 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__); in iwn_eeprom_lock()
1624 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_init_otprom()
1638 if (sc->base_params->shadow_ram_support) { in iwn_init_otprom()
1651 if (! sc->base_params->shadow_ram_support) { in iwn_init_otprom()
1655 for (count = 0; count < sc->base_params->max_ll_items; in iwn_init_otprom()
1660 if (next == 0) /* End of linked-list. */ in iwn_init_otprom()
1665 if (count == 0 || count == sc->base_params->max_ll_items) in iwn_init_otprom()
1668 sc->prom_base = prev + 1; in iwn_init_otprom()
1671 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn_init_otprom()
1683 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_read_prom_data()
1685 addr += sc->prom_base; in iwn_read_prom_data()
1686 for (; count > 0; count -= 2, addr++) { in iwn_read_prom_data()
1695 device_printf(sc->sc_dev, in iwn_read_prom_data()
1699 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) { in iwn_read_prom_data()
1703 device_printf(sc->sc_dev, in iwn_read_prom_data()
1718 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn_read_prom_data()
1738 dma->tag = NULL; in iwn_dma_contig_alloc()
1739 dma->size = size; in iwn_dma_contig_alloc()
1741 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment, in iwn_dma_contig_alloc()
1743 1, size, 0, NULL, NULL, &dma->tag); in iwn_dma_contig_alloc()
1747 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, in iwn_dma_contig_alloc()
1748 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map); in iwn_dma_contig_alloc()
1752 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size, in iwn_dma_contig_alloc()
1753 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT); in iwn_dma_contig_alloc()
1757 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); in iwn_dma_contig_alloc()
1760 *kvap = dma->vaddr; in iwn_dma_contig_alloc()
1771 if (dma->vaddr != NULL) { in iwn_dma_contig_free()
1772 bus_dmamap_sync(dma->tag, dma->map, in iwn_dma_contig_free()
1774 bus_dmamap_unload(dma->tag, dma->map); in iwn_dma_contig_free()
1775 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); in iwn_dma_contig_free()
1776 dma->vaddr = NULL; in iwn_dma_contig_free()
1778 if (dma->tag != NULL) { in iwn_dma_contig_free()
1779 bus_dma_tag_destroy(dma->tag); in iwn_dma_contig_free()
1780 dma->tag = NULL; in iwn_dma_contig_free()
1788 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched, in iwn_alloc_sched()
1789 sc->schedsz, 1024); in iwn_alloc_sched()
1795 iwn_dma_contig_free(&sc->sched_dma); in iwn_free_sched()
1802 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096); in iwn_alloc_kw()
1808 iwn_dma_contig_free(&sc->kw_dma); in iwn_free_kw()
1815 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict, in iwn_alloc_ict()
1822 iwn_dma_contig_free(&sc->ict_dma); in iwn_free_ict()
1828 /* Must be aligned on a 16-byte boundary. */ in iwn_alloc_fwmem()
1829 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16); in iwn_alloc_fwmem()
1835 iwn_dma_contig_free(&sc->fw_dma); in iwn_free_fwmem()
1844 ring->cur = 0; in iwn_alloc_rx_ring()
1846 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_alloc_rx_ring()
1848 /* Allocate RX descriptors (256-byte aligned). */ in iwn_alloc_rx_ring()
1850 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc, in iwn_alloc_rx_ring()
1853 device_printf(sc->sc_dev, in iwn_alloc_rx_ring()
1859 /* Allocate RX status area (16-byte aligned). */ in iwn_alloc_rx_ring()
1860 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat, in iwn_alloc_rx_ring()
1863 device_printf(sc->sc_dev, in iwn_alloc_rx_ring()
1870 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, in iwn_alloc_rx_ring()
1872 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, 0, NULL, NULL, &ring->data_dmat); in iwn_alloc_rx_ring()
1874 device_printf(sc->sc_dev, in iwn_alloc_rx_ring()
1884 struct iwn_rx_data *data = &ring->data[i]; in iwn_alloc_rx_ring()
1887 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); in iwn_alloc_rx_ring()
1889 device_printf(sc->sc_dev, in iwn_alloc_rx_ring()
1895 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, in iwn_alloc_rx_ring()
1897 if (data->m == NULL) { in iwn_alloc_rx_ring()
1898 device_printf(sc->sc_dev, in iwn_alloc_rx_ring()
1904 error = bus_dmamap_load(ring->data_dmat, data->map, in iwn_alloc_rx_ring()
1905 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr, in iwn_alloc_rx_ring()
1908 device_printf(sc->sc_dev, in iwn_alloc_rx_ring()
1914 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_alloc_rx_ring()
1917 /* Set physical address of RX buffer (256-byte aligned). */ in iwn_alloc_rx_ring()
1918 ring->desc[i] = htole32(paddr >> 8); in iwn_alloc_rx_ring()
1921 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwn_alloc_rx_ring()
1924 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_alloc_rx_ring()
1930 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__); in iwn_alloc_rx_ring()
1940 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_reset_rx_ring()
1952 ring->cur = 0; in iwn_reset_rx_ring()
1953 sc->last_rx_valid = 0; in iwn_reset_rx_ring()
1961 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__); in iwn_free_rx_ring()
1963 iwn_dma_contig_free(&ring->desc_dma); in iwn_free_rx_ring()
1964 iwn_dma_contig_free(&ring->stat_dma); in iwn_free_rx_ring()
1967 struct iwn_rx_data *data = &ring->data[i]; in iwn_free_rx_ring()
1969 if (data->m != NULL) { in iwn_free_rx_ring()
1970 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_free_rx_ring()
1972 bus_dmamap_unload(ring->data_dmat, data->map); in iwn_free_rx_ring()
1973 m_freem(data->m); in iwn_free_rx_ring()
1974 data->m = NULL; in iwn_free_rx_ring()
1976 if (data->map != NULL) in iwn_free_rx_ring()
1977 bus_dmamap_destroy(ring->data_dmat, data->map); in iwn_free_rx_ring()
1979 if (ring->data_dmat != NULL) { in iwn_free_rx_ring()
1980 bus_dma_tag_destroy(ring->data_dmat); in iwn_free_rx_ring()
1981 ring->data_dmat = NULL; in iwn_free_rx_ring()
1992 ring->qid = qid; in iwn_alloc_tx_ring()
1993 ring->queued = 0; in iwn_alloc_tx_ring()
1994 ring->cur = 0; in iwn_alloc_tx_ring()
1996 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_alloc_tx_ring()
1998 /* Allocate TX descriptors (256-byte aligned). */ in iwn_alloc_tx_ring()
2000 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc, in iwn_alloc_tx_ring()
2003 device_printf(sc->sc_dev, in iwn_alloc_tx_ring()
2010 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd, in iwn_alloc_tx_ring()
2013 device_printf(sc->sc_dev, in iwn_alloc_tx_ring()
2019 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, in iwn_alloc_tx_ring()
2021 IWN_MAX_SCATTER - 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); in iwn_alloc_tx_ring()
2023 device_printf(sc->sc_dev, in iwn_alloc_tx_ring()
2029 paddr = ring->cmd_dma.paddr; in iwn_alloc_tx_ring()
2031 struct iwn_tx_data *data = &ring->data[i]; in iwn_alloc_tx_ring()
2033 data->cmd_paddr = paddr; in iwn_alloc_tx_ring()
2034 data->scratch_paddr = paddr + 12; in iwn_alloc_tx_ring()
2037 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); in iwn_alloc_tx_ring()
2039 device_printf(sc->sc_dev, in iwn_alloc_tx_ring()
2046 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn_alloc_tx_ring()
2051 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__); in iwn_alloc_tx_ring()
2060 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__); in iwn_reset_tx_ring()
2063 struct iwn_tx_data *data = &ring->data[i]; in iwn_reset_tx_ring()
2065 if (data->m != NULL) { in iwn_reset_tx_ring()
2066 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_reset_tx_ring()
2068 bus_dmamap_unload(ring->data_dmat, data->map); in iwn_reset_tx_ring()
2069 m_freem(data->m); in iwn_reset_tx_ring()
2070 data->m = NULL; in iwn_reset_tx_ring()
2072 if (data->ni != NULL) { in iwn_reset_tx_ring()
2073 ieee80211_free_node(data->ni); in iwn_reset_tx_ring()
2074 data->ni = NULL; in iwn_reset_tx_ring()
2076 data->remapped = 0; in iwn_reset_tx_ring()
2077 data->long_retries = 0; in iwn_reset_tx_ring()
2080 memset(ring->desc, 0, ring->desc_dma.size); in iwn_reset_tx_ring()
2081 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwn_reset_tx_ring()
2083 sc->qfullmsk &= ~(1 << ring->qid); in iwn_reset_tx_ring()
2084 ring->queued = 0; in iwn_reset_tx_ring()
2085 ring->cur = 0; in iwn_reset_tx_ring()
2093 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__); in iwn_free_tx_ring()
2095 iwn_dma_contig_free(&ring->desc_dma); in iwn_free_tx_ring()
2096 iwn_dma_contig_free(&ring->cmd_dma); in iwn_free_tx_ring()
2099 struct iwn_tx_data *data = &ring->data[i]; in iwn_free_tx_ring()
2101 if (data->m != NULL) { in iwn_free_tx_ring()
2102 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_free_tx_ring()
2104 bus_dmamap_unload(ring->data_dmat, data->map); in iwn_free_tx_ring()
2105 m_freem(data->m); in iwn_free_tx_ring()
2107 if (data->map != NULL) in iwn_free_tx_ring()
2108 bus_dmamap_destroy(ring->data_dmat, data->map); in iwn_free_tx_ring()
2110 if (ring->data_dmat != NULL) { in iwn_free_tx_ring()
2111 bus_dma_tag_destroy(ring->data_dmat); in iwn_free_tx_ring()
2112 ring->data_dmat = NULL; in iwn_free_tx_ring()
2119 struct iwn_tx_ring *ring = &sc->txq[qid]; in iwn_check_tx_ring()
2121 KASSERT(ring->queued >= 0, ("%s: ring->queued (%d) for queue %d < 0!", in iwn_check_tx_ring()
2122 __func__, ring->queued, qid)); in iwn_check_tx_ring()
2124 if (qid >= sc->firstaggqueue) { in iwn_check_tx_ring()
2125 struct iwn_ops *ops = &sc->ops; in iwn_check_tx_ring()
2126 struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid]; in iwn_check_tx_ring()
2128 if (ring->queued == 0 && !IEEE80211_AMPDU_RUNNING(tap)) { in iwn_check_tx_ring()
2129 uint16_t ssn = tap->txa_start & 0xfff; in iwn_check_tx_ring()
2130 uint8_t tid = tap->txa_tid; in iwn_check_tx_ring()
2131 int *res = tap->txa_private; in iwn_check_tx_ring()
2134 ops->ampdu_tx_stop(sc, qid, tid, ssn); in iwn_check_tx_ring()
2137 sc->qid2tap[qid] = NULL; in iwn_check_tx_ring()
2142 if (ring->queued < IWN_TX_RING_LOMARK) { in iwn_check_tx_ring()
2143 sc->qfullmsk &= ~(1 << qid); in iwn_check_tx_ring()
2145 if (ring->queued == 0) in iwn_check_tx_ring()
2146 sc->sc_tx_timer = 0; in iwn_check_tx_ring()
2148 sc->sc_tx_timer = 5; in iwn_check_tx_ring()
2159 memset(sc->ict, 0, IWN_ICT_SIZE); in iwn5000_ict_reset()
2160 sc->ict_cur = 0; in iwn5000_ict_reset()
2162 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map, in iwn5000_ict_reset()
2168 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12); in iwn5000_ict_reset()
2171 sc->int_mask |= IWN_INT_RX_PERIODIC; in iwn5000_ict_reset()
2173 sc->sc_flags |= IWN_FLAG_USE_ICT; in iwn5000_ict_reset()
2175 /* Re-enable interrupts. */ in iwn5000_ict_reset()
2177 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); in iwn5000_ict_reset()
2183 struct iwn_ops *ops = &sc->ops; in iwn_read_eeprom()
2187 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_read_eeprom()
2190 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 && in iwn_read_eeprom()
2192 sc->sc_flags |= IWN_FLAG_HAS_OTPROM; in iwn_read_eeprom()
2194 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM"); in iwn_read_eeprom()
2198 device_printf(sc->sc_dev, in iwn_read_eeprom()
2205 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__); in iwn_read_eeprom()
2209 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n", in iwn_read_eeprom()
2213 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) { in iwn_read_eeprom()
2215 device_printf(sc->sc_dev, in iwn_read_eeprom()
2226 sc->sc_flags |= IWN_FLAG_HAS_11N; in iwn_read_eeprom()
2229 sc->rfcfg = le16toh(val); in iwn_read_eeprom()
2230 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg); in iwn_read_eeprom()
2232 if (sc->txchainmask == 0) in iwn_read_eeprom()
2233 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg); in iwn_read_eeprom()
2234 if (sc->rxchainmask == 0) in iwn_read_eeprom()
2235 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg); in iwn_read_eeprom()
2240 /* Read adapter-specific information from EEPROM. */ in iwn_read_eeprom()
2241 ops->read_eeprom(sc); in iwn_read_eeprom()
2247 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn_read_eeprom()
2259 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn4965_read_eeprom()
2262 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4); in iwn4965_read_eeprom()
2265 for (i = 0; i < IWN_NBANDS - 1; i++) { in iwn4965_read_eeprom()
2272 sc->maxpwr2GHz = val & 0xff; in iwn4965_read_eeprom()
2273 sc->maxpwr5GHz = val >> 8; in iwn4965_read_eeprom()
2275 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50) in iwn4965_read_eeprom()
2276 sc->maxpwr5GHz = 38; in iwn4965_read_eeprom()
2277 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50) in iwn4965_read_eeprom()
2278 sc->maxpwr2GHz = 38; in iwn4965_read_eeprom()
2280 sc->maxpwr2GHz, sc->maxpwr5GHz); in iwn4965_read_eeprom()
2283 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands, in iwn4965_read_eeprom()
2284 sizeof sc->bands); in iwn4965_read_eeprom()
2288 sc->eeprom_voltage = (int16_t)le16toh(val); in iwn4965_read_eeprom()
2290 sc->eeprom_voltage); in iwn4965_read_eeprom()
2294 if (sc->sc_debug & IWN_DEBUG_ANY) { in iwn4965_read_eeprom()
2295 for (i = 0; i < IWN_NBANDS - 1; i++) in iwn4965_read_eeprom()
2300 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn4965_read_eeprom()
2307 struct iwn4965_eeprom_band *band = &sc->bands[i]; in iwn4965_print_power_group()
2308 struct iwn4965_eeprom_chan_samples *chans = band->chans; in iwn4965_print_power_group()
2312 printf("chan lo=%d, chan hi=%d\n", band->lo, band->hi); in iwn4965_print_power_group()
2347 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn5000_read_eeprom()
2353 sc->eeprom_domain, 4); in iwn5000_read_eeprom()
2356 for (i = 0; i < IWN_NBANDS - 1; i++) { in iwn5000_read_eeprom()
2357 addr = base + sc->base_params->regulatory_bands[i]; in iwn5000_read_eeprom()
2362 if (sc->base_params->enhanced_TX_power) in iwn5000_read_eeprom()
2371 sc->calib_ver = hdr.version; in iwn5000_read_eeprom()
2373 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) { in iwn5000_read_eeprom()
2374 sc->eeprom_voltage = le16toh(hdr.volt); in iwn5000_read_eeprom()
2376 sc->eeprom_temp_high=le16toh(val); in iwn5000_read_eeprom()
2378 sc->eeprom_temp = le16toh(val); in iwn5000_read_eeprom()
2381 if (sc->hw_type == IWN_HW_REV_TYPE_5150) { in iwn5000_read_eeprom()
2384 sc->eeprom_temp = le16toh(val); in iwn5000_read_eeprom()
2387 sc->temp_off = sc->eeprom_temp - (volt / -5); in iwn5000_read_eeprom()
2389 sc->eeprom_temp, volt, sc->temp_off); in iwn5000_read_eeprom()
2393 &sc->eeprom_crystal, sizeof (uint32_t)); in iwn5000_read_eeprom()
2395 le32toh(sc->eeprom_crystal)); in iwn5000_read_eeprom()
2398 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn5000_read_eeprom()
2411 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0) in iwn_eeprom_channel_flags()
2413 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0) in iwn_eeprom_channel_flags()
2415 if (channel->flags & IWN_EEPROM_CHAN_RADAR) { in iwn_eeprom_channel_flags()
2428 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n]; in iwn_read_eeprom_band()
2434 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_read_eeprom_band()
2440 if (sc->sc_flags & IWN_FLAG_HAS_11N) in iwn_read_eeprom_band()
2444 if (sc->sc_flags & IWN_FLAG_HAS_11N) in iwn_read_eeprom_band()
2448 for (i = 0; i < band->nchan; i++) { in iwn_read_eeprom_band()
2452 band->chan[i], channels[i].flags, in iwn_read_eeprom_band()
2457 chan = band->chan[i]; in iwn_read_eeprom_band()
2466 sc->maxpwr[chan] = channels[i].maxpwr; in iwn_read_eeprom_band()
2473 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn_read_eeprom_band()
2481 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n]; in iwn_read_eeprom_ht40()
2486 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__); in iwn_read_eeprom_ht40()
2488 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) { in iwn_read_eeprom_ht40()
2489 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__); in iwn_read_eeprom_ht40()
2493 for (i = 0; i < band->nchan; i++) { in iwn_read_eeprom_ht40()
2497 band->chan[i], channels[i].flags, in iwn_read_eeprom_ht40()
2502 chan = band->chan[i]; in iwn_read_eeprom_ht40()
2509 device_printf(sc->sc_dev, in iwn_read_eeprom_ht40()
2518 device_printf(sc->sc_dev, in iwn_read_eeprom_ht40()
2531 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn_read_eeprom_ht40()
2538 struct ieee80211com *ic = &sc->sc_ic; in iwn_read_eeprom_channels()
2540 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n], in iwn_read_eeprom_channels()
2544 iwn_read_eeprom_band(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans, in iwn_read_eeprom_channels()
2545 ic->ic_channels); in iwn_read_eeprom_channels()
2547 iwn_read_eeprom_ht40(sc, n, IEEE80211_CHAN_MAX, &ic->ic_nchans, in iwn_read_eeprom_channels()
2548 ic->ic_channels); in iwn_read_eeprom_channels()
2550 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans); in iwn_read_eeprom_channels()
2561 chan = c->ic_extieee; in iwn_find_eeprom_channel()
2563 chan = c->ic_ieee; in iwn_find_eeprom_channel()
2566 return &sc->eeprom_channels[band][i]; in iwn_find_eeprom_channel()
2571 if (iwn_bands[j].chan[i] == c->ic_ieee && in iwn_find_eeprom_channel()
2573 return &sc->eeprom_channels[j][i]; in iwn_find_eeprom_channel()
2584 struct iwn_softc *sc = ic->ic_softc; in iwn_getradiocaps()
2590 for (i = 5; i < IWN_NBANDS - 1 && *nchans < maxchans; i++) in iwn_getradiocaps()
2601 struct iwn_softc *sc = ic->ic_softc; in iwn_setregdomain()
2611 __func__, c->ic_ieee, c->ic_freq, c->ic_flags); in iwn_setregdomain()
2614 c->ic_flags |= iwn_eeprom_channel_flags(channel); in iwn_setregdomain()
2624 struct ieee80211com *ic = &sc->sc_ic; in iwn_read_eeprom_enhinfo()
2631 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_read_eeprom_enhinfo()
2644 if (sc->txchainmask & IWN_ANT_A) in iwn_read_eeprom_enhinfo()
2646 if (sc->txchainmask & IWN_ANT_B) in iwn_read_eeprom_enhinfo()
2648 if (sc->txchainmask & IWN_ANT_C) in iwn_read_eeprom_enhinfo()
2650 if (sc->ntxchains == 2) in iwn_read_eeprom_enhinfo()
2652 else if (sc->ntxchains == 3) in iwn_read_eeprom_enhinfo()
2655 for (j = 0; j < ic->ic_nchans; j++) { in iwn_read_eeprom_enhinfo()
2656 c = &ic->ic_channels[j]; in iwn_read_eeprom_enhinfo()
2673 enhinfo[i].chan != c->ic_ieee) in iwn_read_eeprom_enhinfo()
2677 "channel %d(%x), maxpwr %d\n", c->ic_ieee, in iwn_read_eeprom_enhinfo()
2678 c->ic_flags, maxpwr / 2); in iwn_read_eeprom_enhinfo()
2679 c->ic_maxregpower = maxpwr / 2; in iwn_read_eeprom_enhinfo()
2680 c->ic_maxpower = maxpwr; in iwn_read_eeprom_enhinfo()
2684 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__); in iwn_read_eeprom_enhinfo()
2697 wn->id = IWN_ID_UNDEFINED; in iwn_node_alloc()
2699 return (&wn->ni); in iwn_node_alloc()
2746 return IWN_LSB(sc->txchainmask); in iwn_get_1stream_tx_antmask()
2769 /* Default - transmit on the other antennas */ in iwn_get_2stream_tx_antmask()
2770 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask)); in iwn_get_2stream_tx_antmask()
2777 * If the NIC is a two-stream TX NIC, configure the TX mask to in iwn_get_2stream_tx_antmask()
2780 else if (sc->ntxchains == 2) in iwn_get_2stream_tx_antmask()
2781 tx = sc->txchainmask; in iwn_get_2stream_tx_antmask()
2799 struct ieee80211com *ic = ni->ni_ic; in iwn_rate_to_plcp()
2809 * Set the initial PLCP value to be between 0->31 for in iwn_rate_to_plcp()
2810 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!" in iwn_rate_to_plcp()
2821 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) { in iwn_rate_to_plcp()
2833 plcp |= IWN_RFLAG_ANT(sc->txchainmask); in iwn_rate_to_plcp()
2840 * Set the initial PLCP - fine for both in iwn_rate_to_plcp()
2848 * to map the ridx -> phy table entry in iwn_rate_to_plcp()
2852 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt, in iwn_rate_to_plcp()
2855 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) in iwn_rate_to_plcp()
2881 struct ieee80211com *ic = vap->iv_ic; in iwn_newstate()
2882 struct iwn_softc *sc = ic->ic_softc; in iwn_newstate()
2885 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_newstate()
2887 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__, in iwn_newstate()
2888 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]); in iwn_newstate()
2892 callout_stop(&sc->calib_to); in iwn_newstate()
2894 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; in iwn_newstate()
2898 if (vap->iv_state != IEEE80211_S_RUN) in iwn_newstate()
2902 if (vap->iv_state == IEEE80211_S_AUTH) in iwn_newstate()
2906 * !AUTH -> AUTH transition requires state reset to handle in iwn_newstate()
2909 sc->rxon->associd = 0; in iwn_newstate()
2910 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS); in iwn_newstate()
2911 sc->calib.state = IWN_CALIB_STATE_INIT; in iwn_newstate()
2914 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan)) in iwn_newstate()
2915 sc->sc_beacon_wait = 1; in iwn_newstate()
2918 device_printf(sc->sc_dev, in iwn_newstate()
2925 * RUN -> RUN transition; Just restart the timers. in iwn_newstate()
2927 if (vap->iv_state == IEEE80211_S_RUN) { in iwn_newstate()
2928 sc->calib_cnt = 0; in iwn_newstate()
2933 if (IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan)) in iwn_newstate()
2934 sc->sc_beacon_wait = 1; in iwn_newstate()
2937 * !RUN -> RUN requires setting the association id in iwn_newstate()
2942 device_printf(sc->sc_dev, in iwn_newstate()
2948 sc->calib.state = IWN_CALIB_STATE_INIT; in iwn_newstate()
2953 sc->sc_beacon_wait = 0; in iwn_newstate()
2963 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__); in iwn_newstate()
2967 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_newstate()
2969 return ivp->iv_newstate(vap, nstate, arg); in iwn_newstate()
2980 if (++sc->calib_cnt >= 120) { in iwn_calib_timeout()
2987 sc->calib_cnt = 0; in iwn_calib_timeout()
2989 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout, in iwn_calib_timeout()
3005 memcpy(&sc->last_rx_stat, stat, sizeof (*stat)); in iwn_rx_phy()
3006 sc->last_rx_valid = 1; in iwn_rx_phy()
3017 struct iwn_ops *ops = &sc->ops; in iwn_rx_done()
3018 struct ieee80211com *ic = &sc->sc_ic; in iwn_rx_done()
3019 struct iwn_rx_ring *ring = &sc->rxq; in iwn_rx_done()
3029 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_rx_done()
3031 if (desc->type == IWN_MPDU_RX_DONE) { in iwn_rx_done()
3033 if (!sc->last_rx_valid) { in iwn_rx_done()
3038 stat = &sc->last_rx_stat; in iwn_rx_done()
3042 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) { in iwn_rx_done()
3043 device_printf(sc->sc_dev, in iwn_rx_done()
3045 stat->cfg_phy_len); in iwn_rx_done()
3048 if (desc->type == IWN_MPDU_RX_DONE) { in iwn_rx_done()
3051 len = le16toh(mpdu->len); in iwn_rx_done()
3053 head = (caddr_t)(stat + 1) + stat->cfg_phy_len; in iwn_rx_done()
3054 len = le16toh(stat->len); in iwn_rx_done()
3063 counter_u64_add(ic->ic_ierrors, 1); in iwn_rx_done()
3070 counter_u64_add(ic->ic_ierrors, 1); in iwn_rx_done()
3078 counter_u64_add(ic->ic_ierrors, 1); in iwn_rx_done()
3081 bus_dmamap_unload(ring->data_dmat, data->map); in iwn_rx_done()
3083 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *), in iwn_rx_done()
3086 device_printf(sc->sc_dev, in iwn_rx_done()
3091 error = bus_dmamap_load(ring->data_dmat, data->map, in iwn_rx_done()
3092 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr, in iwn_rx_done()
3097 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_rx_done()
3100 ring->desc[ring->cur] = htole32(paddr >> 8); in iwn_rx_done()
3101 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwn_rx_done()
3103 counter_u64_add(ic->ic_ierrors, 1); in iwn_rx_done()
3107 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_rx_done()
3110 m = data->m; in iwn_rx_done()
3111 data->m = m1; in iwn_rx_done()
3113 ring->desc[ring->cur] = htole32(paddr >> 8); in iwn_rx_done()
3114 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwn_rx_done()
3118 m->m_data = head; in iwn_rx_done()
3119 m->m_pkthdr.len = m->m_len = len; in iwn_rx_done()
3127 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN && in iwn_rx_done()
3128 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95; in iwn_rx_done()
3130 rssi = ops->get_rssi(sc, stat); in iwn_rx_done()
3133 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap; in iwn_rx_done()
3134 uint32_t rate = le32toh(stat->rate); in iwn_rx_done()
3136 tap->wr_flags = 0; in iwn_rx_done()
3137 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE)) in iwn_rx_done()
3138 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; in iwn_rx_done()
3139 tap->wr_dbm_antsignal = (int8_t)rssi; in iwn_rx_done()
3140 tap->wr_dbm_antnoise = (int8_t)nf; in iwn_rx_done()
3141 tap->wr_tsft = stat->tstamp; in iwn_rx_done()
3143 tap->wr_rate = rate & IWN_RFLAG_RATE_MCS; in iwn_rx_done()
3144 tap->wr_rate |= IEEE80211_RATE_MCS; in iwn_rx_done()
3146 tap->wr_rate = plcp2rate(rate & IWN_RFLAG_RATE); in iwn_rx_done()
3153 if (sc->sc_beacon_wait) { in iwn_rx_done()
3155 /* NB: Re-assign wh */ in iwn_rx_done()
3157 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; in iwn_rx_done()
3158 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; in iwn_rx_done()
3171 taskqueue_enqueue(sc->sc_tq, &sc->sc_xmit_task); in iwn_rx_done()
3179 if (ni->ni_flags & IEEE80211_NODE_HT) in iwn_rx_done()
3180 m->m_flags |= M_AMPDU; in iwn_rx_done()
3181 (void)ieee80211_input(ni, m, rssi - nf, nf); in iwn_rx_done()
3185 (void)ieee80211_input_all(ic, m, rssi - nf, nf); in iwn_rx_done()
3189 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_rx_done()
3197 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs; in iwn_agg_tx_complete()
3198 struct iwn_tx_data *data = &ring->data[idx]; in iwn_agg_tx_complete()
3203 KASSERT(data->ni != NULL, ("idx %d: no node", idx)); in iwn_agg_tx_complete()
3204 KASSERT(data->m != NULL, ("idx %d: no mbuf", idx)); in iwn_agg_tx_complete()
3207 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_agg_tx_complete()
3209 bus_dmamap_unload(ring->data_dmat, data->map); in iwn_agg_tx_complete()
3210 m = data->m, data->m = NULL; in iwn_agg_tx_complete()
3211 ni = data->ni, data->ni = NULL; in iwn_agg_tx_complete()
3216 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY | in iwn_agg_tx_complete()
3218 txs->long_retries = data->long_retries - 1; in iwn_agg_tx_complete()
3220 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY; in iwn_agg_tx_complete()
3222 txs->short_retries = wn->agg[tid].short_retries; in iwn_agg_tx_complete()
3224 txs->status = IEEE80211_RATECTL_TX_SUCCESS; in iwn_agg_tx_complete()
3226 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED; in iwn_agg_tx_complete()
3228 wn->agg[tid].short_retries = 0; in iwn_agg_tx_complete()
3229 data->long_retries = 0; in iwn_agg_tx_complete()
3232 __func__, m, ni, idx, ring->qid); in iwn_agg_tx_complete()
3251 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_rx_compressed_ba()
3253 qid = le16toh(ba->qid); in iwn_rx_compressed_ba()
3254 tap = sc->qid2tap[qid]; in iwn_rx_compressed_ba()
3255 ring = &sc->txq[qid]; in iwn_rx_compressed_ba()
3256 tid = tap->txa_tid; in iwn_rx_compressed_ba()
3257 wn = (void *)tap->txa_ni; in iwn_rx_compressed_ba()
3261 __func__, qid, tid, le16toh(ba->seq), le16toh(ba->ssn), in iwn_rx_compressed_ba()
3262 (uintmax_t)le64toh(ba->bitmap), (uintmax_t)wn->agg[tid].bitmap, in iwn_rx_compressed_ba()
3263 wn->agg[tid].startidx); in iwn_rx_compressed_ba()
3265 if (wn->agg[tid].bitmap == 0) in iwn_rx_compressed_ba()
3268 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff); in iwn_rx_compressed_ba()
3269 if (shift <= -64) in iwn_rx_compressed_ba()
3276 * Yes, the rate control code doesn't know these are A-MPDU in iwn_rx_compressed_ba()
3279 bitmap = le64toh(ba->bitmap); in iwn_rx_compressed_ba()
3283 bitmap <<= -shift; in iwn_rx_compressed_ba()
3284 bitmap &= wn->agg[tid].bitmap; in iwn_rx_compressed_ba()
3285 wn->agg[tid].bitmap = 0; in iwn_rx_compressed_ba()
3287 for (i = wn->agg[tid].startidx; in iwn_rx_compressed_ba()
3293 data = &ring->data[i]; in iwn_rx_compressed_ba()
3294 if (__predict_false(data->m == NULL)) { in iwn_rx_compressed_ba()
3311 ring->queued -= tx_ok; in iwn_rx_compressed_ba()
3315 "->%s: end; %d ok\n",__func__, tx_ok); in iwn_rx_compressed_ba()
3326 int len, idx = -1; in iwn5000_rx_calib_results()
3328 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn5000_rx_calib_results()
3331 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){ in iwn5000_rx_calib_results()
3333 "->%s received after calib done\n", __func__); in iwn5000_rx_calib_results()
3336 len = (le32toh(desc->len) & 0x3fff) - 4; in iwn5000_rx_calib_results()
3338 switch (calib->code) { in iwn5000_rx_calib_results()
3340 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC) in iwn5000_rx_calib_results()
3344 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO) in iwn5000_rx_calib_results()
3348 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ) in iwn5000_rx_calib_results()
3352 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC) in iwn5000_rx_calib_results()
3356 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND) in iwn5000_rx_calib_results()
3360 if (idx == -1) /* Ignore other results. */ in iwn5000_rx_calib_results()
3364 if (sc->calibcmd[idx].buf != NULL) in iwn5000_rx_calib_results()
3365 free(sc->calibcmd[idx].buf, M_DEVBUF); in iwn5000_rx_calib_results()
3366 sc->calibcmd[idx].buf = malloc(len, M_DEVBUF, M_NOWAIT); in iwn5000_rx_calib_results()
3367 if (sc->calibcmd[idx].buf == NULL) { in iwn5000_rx_calib_results()
3370 calib->code); in iwn5000_rx_calib_results()
3374 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len); in iwn5000_rx_calib_results()
3375 sc->calibcmd[idx].len = len; in iwn5000_rx_calib_results()
3376 memcpy(sc->calibcmd[idx].buf, calib, len); in iwn5000_rx_calib_results()
3387 * First - check whether the length is the bluetooth or normal. in iwn_stats_update()
3389 * If it's normal - just copy it and bump out. in iwn_stats_update()
3394 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats)); in iwn_stats_update()
3395 sc->last_stat_valid = 1; in iwn_stats_update()
3400 * If it's not the bluetooth size - log, then just copy. in iwn_stats_update()
3407 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats)); in iwn_stats_update()
3408 sc->last_stat_valid = 1; in iwn_stats_update()
3416 lstats = &sc->last_stat; in iwn_stats_update()
3419 lstats->flags = stats_bt->flags; in iwn_stats_update()
3421 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm, in iwn_stats_update()
3423 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck, in iwn_stats_update()
3425 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common, in iwn_stats_update()
3427 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht, in iwn_stats_update()
3430 memcpy(&lstats->tx, &stats_bt->tx, in iwn_stats_update()
3433 memcpy(&lstats->general, &stats_bt->general, in iwn_stats_update()
3437 sc->last_stat_valid = 1; in iwn_stats_update()
3447 struct iwn_ops *ops = &sc->ops; in iwn_rx_statistics()
3448 struct ieee80211com *ic = &sc->sc_ic; in iwn_rx_statistics()
3449 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwn_rx_statistics()
3450 struct iwn_calib_state *calib = &sc->calib; in iwn_rx_statistics()
3455 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_rx_statistics()
3458 if (vap->iv_state != IEEE80211_S_RUN || in iwn_rx_statistics()
3459 (ic->ic_flags & IEEE80211_F_SCAN)){ in iwn_rx_statistics()
3460 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n", in iwn_rx_statistics()
3467 __func__, desc->type, le16toh(desc->len)); in iwn_rx_statistics()
3468 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */ in iwn_rx_statistics()
3476 iwn_stats_update(sc, calib, stats, le16toh(desc->len)); in iwn_rx_statistics()
3481 lstats = &sc->last_stat; in iwn_rx_statistics()
3484 if (lstats->general.temp != sc->rawtemp) { in iwn_rx_statistics()
3486 sc->rawtemp = stats->general.temp; in iwn_rx_statistics()
3487 temp = ops->get_temperature(sc); in iwn_rx_statistics()
3492 if (sc->hw_type == IWN_HW_REV_TYPE_4965) in iwn_rx_statistics()
3496 if (desc->type != IWN_BEACON_STATISTICS) in iwn_rx_statistics()
3499 sc->noise = iwn_get_noise(&lstats->rx.general); in iwn_rx_statistics()
3500 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise); in iwn_rx_statistics()
3503 if (le32toh(lstats->rx.general.flags) != 1) { in iwn_rx_statistics()
3509 if (calib->state == IWN_CALIB_STATE_ASSOC) in iwn_rx_statistics()
3510 iwn_collect_noise(sc, &lstats->rx.general); in iwn_rx_statistics()
3511 else if (calib->state == IWN_CALIB_STATE_RUN) { in iwn_rx_statistics()
3512 iwn_tune_sensitivity(sc, &lstats->rx); in iwn_rx_statistics()
3520 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_rx_statistics()
3530 struct iwn_calib_state *calib = &sc->calib; in iwn_save_stats_counters()
3533 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp); in iwn_save_stats_counters()
3534 calib->fa_cck = le32toh(rs->rx.cck.fa); in iwn_save_stats_counters()
3535 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp); in iwn_save_stats_counters()
3536 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp); in iwn_save_stats_counters()
3537 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa); in iwn_save_stats_counters()
3540 sc->last_calib_ticks = ticks; in iwn_save_stats_counters()
3552 int qid = desc->qid & IWN_RX_DESC_QID_MSK; in iwn4965_tx_done()
3556 __func__, desc->qid, desc->idx, in iwn4965_tx_done()
3557 stat->rtsfailcnt, in iwn4965_tx_done()
3558 stat->ackfailcnt, in iwn4965_tx_done()
3559 stat->btkillcnt, in iwn4965_tx_done()
3560 stat->rate, le16toh(stat->duration), in iwn4965_tx_done()
3561 le32toh(stat->status)); in iwn4965_tx_done()
3563 if (qid >= sc->firstaggqueue && stat->nframes != 1) { in iwn4965_tx_done()
3564 iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt, in iwn4965_tx_done()
3565 &stat->status); in iwn4965_tx_done()
3567 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt, in iwn4965_tx_done()
3568 le32toh(stat->status) & 0xff); in iwn4965_tx_done()
3577 int qid = desc->qid & IWN_RX_DESC_QID_MSK; in iwn5000_tx_done()
3581 __func__, desc->qid, desc->idx, in iwn5000_tx_done()
3582 stat->rtsfailcnt, in iwn5000_tx_done()
3583 stat->ackfailcnt, in iwn5000_tx_done()
3584 stat->btkillcnt, in iwn5000_tx_done()
3585 stat->rate, le16toh(stat->duration), in iwn5000_tx_done()
3586 le32toh(stat->status)); in iwn5000_tx_done()
3590 iwn5000_reset_sched(sc, qid, desc->idx); in iwn5000_tx_done()
3593 if (qid >= sc->firstaggqueue && stat->nframes != 1) { in iwn5000_tx_done()
3594 iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt, in iwn5000_tx_done()
3595 &stat->status); in iwn5000_tx_done()
3597 iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt, in iwn5000_tx_done()
3598 le16toh(stat->status) & 0xff); in iwn5000_tx_done()
3607 for (i = ring->read; i != ring->cur; i = (i + 1) % IWN_TX_RING_COUNT) { in iwn_adj_ampdu_ptr()
3608 struct iwn_tx_data *data = &ring->data[i]; in iwn_adj_ampdu_ptr()
3610 if (data->m != NULL) in iwn_adj_ampdu_ptr()
3613 data->remapped = 0; in iwn_adj_ampdu_ptr()
3616 ring->read = i; in iwn_adj_ampdu_ptr()
3620 * Adapter-independent backend for TX_DONE firmware notifications.
3626 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs; in iwn_tx_done()
3627 struct iwn_tx_ring *ring = &sc->txq[desc->qid & IWN_RX_DESC_QID_MSK]; in iwn_tx_done()
3628 struct iwn_tx_data *data = &ring->data[desc->idx]; in iwn_tx_done()
3632 if (__predict_false(data->m == NULL && in iwn_tx_done()
3633 ring->qid >= sc->firstaggqueue)) { in iwn_tx_done()
3638 __func__, ring->qid, desc->idx); in iwn_tx_done()
3642 KASSERT(data->ni != NULL, ("no node")); in iwn_tx_done()
3643 KASSERT(data->m != NULL, ("no mbuf")); in iwn_tx_done()
3645 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_tx_done()
3648 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE); in iwn_tx_done()
3649 bus_dmamap_unload(ring->data_dmat, data->map); in iwn_tx_done()
3650 m = data->m, data->m = NULL; in iwn_tx_done()
3651 ni = data->ni, data->ni = NULL; in iwn_tx_done()
3653 data->long_retries = 0; in iwn_tx_done()
3655 if (ring->qid >= sc->firstaggqueue) in iwn_tx_done()
3659 * XXX f/w may hang (device timeout) when desc->idx - ring->read == 64 in iwn_tx_done()
3663 ring->queued--; in iwn_tx_done()
3664 iwn_check_tx_ring(sc, ring->qid); in iwn_tx_done()
3669 txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY | in iwn_tx_done()
3671 txs->short_retries = rtsfailcnt; in iwn_tx_done()
3672 txs->long_retries = ackfailcnt; in iwn_tx_done()
3674 txs->status = IEEE80211_RATECTL_TX_SUCCESS; in iwn_tx_done()
3678 txs->status = IEEE80211_RATECTL_TX_FAIL_SHORT; in iwn_tx_done()
3681 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG; in iwn_tx_done()
3684 txs->status = IEEE80211_RATECTL_TX_FAIL_EXPIRED; in iwn_tx_done()
3687 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED; in iwn_tx_done()
3708 ni->ni_vap->iv_state == IEEE80211_S_AUTH) in iwn_tx_done()
3714 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_tx_done()
3728 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) in iwn_cmd_done()
3733 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num) in iwn_cmd_done()
3736 ring = &sc->txq[cmd_queue_num]; in iwn_cmd_done()
3737 data = &ring->data[desc->idx]; in iwn_cmd_done()
3740 if (data->m != NULL) { in iwn_cmd_done()
3741 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_cmd_done()
3743 bus_dmamap_unload(ring->data_dmat, data->map); in iwn_cmd_done()
3744 m_freem(data->m); in iwn_cmd_done()
3745 data->m = NULL; in iwn_cmd_done()
3747 wakeup(&ring->desc[desc->idx]); in iwn_cmd_done()
3755 bit = idx - start; in iwn_ampdu_check_bitmap()
3758 shift = 0x100 - bit; in iwn_ampdu_check_bitmap()
3760 } else if (bit <= -64) in iwn_ampdu_check_bitmap()
3763 shift = -bit; in iwn_ampdu_check_bitmap()
3767 if (bit - shift >= 64) in iwn_ampdu_check_bitmap()
3770 return ((bitmap & (1ULL << (bit - shift))) != 0); in iwn_ampdu_check_bitmap()
3794 * For even 'seqno' % 4 != 0 overflow is cyclic (0 -> +1 -> 0).
3802 struct ieee80211com *ic = &sc->sc_ic; in iwn_ampdu_index_check()
3806 new_idx = idx - IWN_LONG_RETRY_LIMIT_LOG; in iwn_ampdu_index_check()
3815 data = &ring->data[new_idx]; in iwn_ampdu_index_check()
3816 if (data->long_retries > IWN_LONG_RETRY_LIMIT) { in iwn_ampdu_index_check()
3817 device_printf(sc->sc_dev, in iwn_ampdu_index_check()
3819 "resetting...\n", __func__, data->long_retries, in iwn_ampdu_index_check()
3820 ring->qid, new_idx); in iwn_ampdu_index_check()
3822 return (-1); in iwn_ampdu_index_check()
3829 data = &ring->data[new_idx]; in iwn_ampdu_index_check()
3830 diff = idx - new_idx; in iwn_ampdu_index_check()
3841 ((data->long_retries >= min_retries && in iwn_ampdu_index_check()
3842 data->long_retries < max_retries) || in iwn_ampdu_index_check()
3845 data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW))) { in iwn_ampdu_index_check()
3847 "%s: correcting index %d -> %d in queue %d" in iwn_ampdu_index_check()
3849 ring->qid, data->long_retries); in iwn_ampdu_index_check()
3863 struct iwn_tx_ring *ring = &sc->txq[qid]; in iwn_ampdu_tx_done()
3864 struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid]; in iwn_ampdu_tx_done()
3865 struct iwn_node *wn = (void *)tap->txa_ni; in iwn_ampdu_tx_done()
3869 uint8_t tid = tap->txa_tid; in iwn_ampdu_tx_done()
3872 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_ampdu_tx_done()
3883 data = &ring->data[idx]; in iwn_ampdu_tx_done()
3884 if (data->remapped) { in iwn_ampdu_tx_done()
3886 if (idx == -1) { in iwn_ampdu_tx_done()
3892 data = &ring->data[idx]; in iwn_ampdu_tx_done()
3899 data->long_retries &= ~0x0f; in iwn_ampdu_tx_done()
3900 data->long_retries += IWN_AGG_TX_TRY_COUNT(status) + 1; in iwn_ampdu_tx_done()
3902 if (data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW) { in iwn_ampdu_tx_done()
3905 diff = data->long_retries / IWN_LONG_RETRY_FW_OVERFLOW; in iwn_ampdu_tx_done()
3912 ring->data[wrong_idx].remapped = 1; in iwn_ampdu_tx_done()
3917 * NB: count retries but postpone - it was not in iwn_ampdu_tx_done()
3923 bit = idx - start; in iwn_ampdu_tx_done()
3926 shift = 0x100 - bit; in iwn_ampdu_tx_done()
3928 } else if (bit <= -64) in iwn_ampdu_tx_done()
3931 shift = -bit; in iwn_ampdu_tx_done()
3937 wn->agg[tid].startidx = start; in iwn_ampdu_tx_done()
3938 wn->agg[tid].bitmap = bitmap; in iwn_ampdu_tx_done()
3939 wn->agg[tid].short_retries = rtsfailcnt; in iwn_ampdu_tx_done()
3944 i = ring->read; in iwn_ampdu_tx_done()
3947 i != wn->agg[tid].startidx; in iwn_ampdu_tx_done()
3949 data = &ring->data[i]; in iwn_ampdu_tx_done()
3950 data->remapped = 0; in iwn_ampdu_tx_done()
3951 if (data->m == NULL) in iwn_ampdu_tx_done()
3958 ring->read = wn->agg[tid].startidx; in iwn_ampdu_tx_done()
3959 ring->queued -= tx_err; in iwn_ampdu_tx_done()
3963 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_ampdu_tx_done()
3972 struct iwn_ops *ops = &sc->ops; in iwn_notif_intr()
3973 struct ieee80211com *ic = &sc->sc_ic; in iwn_notif_intr()
3974 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwn_notif_intr()
3978 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map, in iwn_notif_intr()
3981 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff; in iwn_notif_intr()
3982 while (sc->rxq.cur != hw) { in iwn_notif_intr()
3983 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur]; in iwn_notif_intr()
3986 bus_dmamap_sync(sc->rxq.data_dmat, data->map, in iwn_notif_intr()
3988 desc = mtod(data->m, struct iwn_rx_desc *); in iwn_notif_intr()
3992 __func__, sc->rxq.cur, desc->qid & IWN_RX_DESC_QID_MSK, in iwn_notif_intr()
3993 desc->idx, desc->flags, desc->type, in iwn_notif_intr()
3994 iwn_intr_str(desc->type), le16toh(desc->len)); in iwn_notif_intr()
3996 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */ in iwn_notif_intr()
3999 switch (desc->type) { in iwn_notif_intr()
4009 is_stopped = (sc->sc_flags & IWN_FLAG_RUNNING) == 0; in iwn_notif_intr()
4022 ops->tx_done(sc, desc, data); in iwn_notif_intr()
4036 misses = le32toh(miss->consecutive); in iwn_notif_intr()
4040 misses, le32toh(miss->total)); in iwn_notif_intr()
4045 if (vap->iv_state == IEEE80211_S_RUN && in iwn_notif_intr()
4046 (ic->ic_flags & IEEE80211_F_SCAN) == 0) { in iwn_notif_intr()
4049 if (misses >= vap->iv_bmissthreshold) { in iwn_notif_intr()
4054 is_stopped = (sc->sc_flags & in iwn_notif_intr()
4070 "subtype=%x alive=%x\n", uc->major, uc->minor, in iwn_notif_intr()
4071 uc->subtype, le32toh(uc->valid)); in iwn_notif_intr()
4073 if (le32toh(uc->valid) != 1) { in iwn_notif_intr()
4074 device_printf(sc->sc_dev, in iwn_notif_intr()
4078 if (uc->subtype == IWN_UCODE_INIT) { in iwn_notif_intr()
4080 memcpy(&sc->ucode_info, uc, sizeof (*uc)); in iwn_notif_intr()
4082 /* Save the address of the error log in SRAM. */ in iwn_notif_intr()
4083 sc->errptr = le32toh(uc->errptr); in iwn_notif_intr()
4106 __func__, scan->chan, le32toh(scan->status)); in iwn_notif_intr()
4117 scan->nchan, scan->status, scan->chan); in iwn_notif_intr()
4119 sc->sc_is_scanning = 0; in iwn_notif_intr()
4120 callout_stop(&sc->scan_timeout); in iwn_notif_intr()
4125 is_stopped = (sc->sc_flags & IWN_FLAG_RUNNING) == 0; in iwn_notif_intr()
4136 sc->sc_flags |= IWN_FLAG_CALIB_DONE; in iwn_notif_intr()
4141 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT; in iwn_notif_intr()
4145 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1; in iwn_notif_intr()
4151 * from power-down sleep mode.
4158 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n", in iwn_wakeup_intr()
4162 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7); in iwn_wakeup_intr()
4163 for (qid = 0; qid < sc->ntxqs; qid++) { in iwn_wakeup_intr()
4164 struct iwn_tx_ring *ring = &sc->txq[qid]; in iwn_wakeup_intr()
4165 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur); in iwn_wakeup_intr()
4173 struct ieee80211com *ic = &sc->sc_ic; in iwn_rftoggle_task()
4180 device_printf(sc->sc_dev, "RF switch: radio %s\n", in iwn_rftoggle_task()
4188 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); in iwn_rftoggle_task()
4208 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE; in iwn_fatal_intr()
4211 if (sc->errptr < IWN_FW_DATA_BASE || in iwn_fatal_intr()
4212 sc->errptr + sizeof (dump) > in iwn_fatal_intr()
4213 IWN_FW_DATA_BASE + sc->fw_data_maxsz) { in iwn_fatal_intr()
4215 sc->errptr); in iwn_fatal_intr()
4222 /* Read firmware error log from SRAM. */ in iwn_fatal_intr()
4223 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump, in iwn_fatal_intr()
4248 for (i = 0; i < sc->ntxqs; i++) { in iwn_fatal_intr()
4249 struct iwn_tx_ring *ring = &sc->txq[i]; in iwn_fatal_intr()
4250 printf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n", in iwn_fatal_intr()
4251 i, ring->qid, ring->cur, ring->queued); in iwn_fatal_intr()
4253 printf(" rx ring: cur=%d\n", sc->rxq.cur); in iwn_fatal_intr()
4268 if (sc->sc_flags & IWN_FLAG_USE_ICT) { in iwn_intr()
4269 bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map, in iwn_intr()
4272 while (sc->ict[sc->ict_cur] != 0) { in iwn_intr()
4273 tmp |= sc->ict[sc->ict_cur]; in iwn_intr()
4274 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */ in iwn_intr()
4275 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT; in iwn_intr()
4301 if (!(sc->sc_flags & IWN_FLAG_USE_ICT)) in iwn_intr()
4305 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task); in iwn_intr()
4309 device_printf(sc->sc_dev, "%s: critical temperature reached!\n", in iwn_intr()
4313 device_printf(sc->sc_dev, "%s: fatal firmware error\n", in iwn_intr()
4321 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task); in iwn_intr()
4326 if (sc->sc_flags & IWN_FLAG_USE_ICT) { in iwn_intr()
4341 if (sc->sc_flags & IWN_FLAG_USE_ICT) in iwn_intr()
4353 /* Re-enable interrupts. */ in iwn_intr()
4354 if (sc->sc_flags & IWN_FLAG_RUNNING) in iwn_intr()
4355 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); in iwn_intr()
4368 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx]; in iwn4965_update_sched()
4370 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_update_sched()
4373 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, in iwn4965_update_sched()
4377 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, in iwn4965_update_sched()
4386 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx]; in iwn5000_update_sched()
4388 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_update_sched()
4391 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, in iwn5000_update_sched()
4395 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, in iwn5000_update_sched()
4404 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx]; in iwn5000_reset_sched()
4406 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_reset_sched()
4409 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, in iwn5000_reset_sched()
4413 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map, in iwn5000_reset_sched()
4429 struct ieee80211com *ic = vap->iv_ic; in iwn_check_rate_needs_protection()
4435 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) { in iwn_check_rate_needs_protection()
4442 if ((vap->iv_flags & IEEE80211_F_USEPROT) == 0) in iwn_check_rate_needs_protection()
4446 * If it's an 11n rate - no protection. in iwn_check_rate_needs_protection()
4457 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK) in iwn_check_rate_needs_protection()
4467 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4492 rs = (struct ieee80211_rateset *) &ni->ni_htrates; in iwn_tx_rate_to_linkq_offset()
4493 nr = ni->ni_htrates.rs_nrates; in iwn_tx_rate_to_linkq_offset()
4495 rs = &ni->ni_rates; in iwn_tx_rate_to_linkq_offset()
4496 nr = rs->rs_nrates; in iwn_tx_rate_to_linkq_offset()
4502 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) { in iwn_tx_rate_to_linkq_offset()
4507 cmp_rate = rs->rs_rates[(nr - 1) - i]; in iwn_tx_rate_to_linkq_offset()
4525 return (IWN_MAX_TX_RETRIES - 1); in iwn_tx_rate_to_linkq_offset()
4531 const struct ieee80211_txparam *tp = ni->ni_txparms; in iwn_tx_data()
4532 struct ieee80211vap *vap = ni->ni_vap; in iwn_tx_data()
4533 struct ieee80211com *ic = ni->ni_ic; in iwn_tx_data()
4545 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_tx_data()
4550 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; in iwn_tx_data()
4554 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; in iwn_tx_data()
4564 (m->m_flags & M_EAPOL) != 0) in iwn_tx_data()
4565 rate = tp->mgmtrate; in iwn_tx_data()
4566 else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) in iwn_tx_data()
4567 rate = tp->mcastrate; in iwn_tx_data()
4568 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) in iwn_tx_data()
4569 rate = tp->ucastrate; in iwn_tx_data()
4573 rate = ni->ni_txrate; in iwn_tx_data()
4578 * go to the normal non-aggregation queue, and have a NONQOS TID in iwn_tx_data()
4583 if (m->m_flags & M_AMPDU_MPDU) { in iwn_tx_data()
4584 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac]; in iwn_tx_data()
4589 ac = *(int *)tap->txa_private; in iwn_tx_data()
4593 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { in iwn_tx_data()
4602 totlen = m->m_pkthdr.len; in iwn_tx_data()
4605 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap; in iwn_tx_data()
4607 tap->wt_flags = 0; in iwn_tx_data()
4608 tap->wt_rate = rate; in iwn_tx_data()
4610 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; in iwn_tx_data()
4616 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { in iwn_tx_data()
4625 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) in iwn_tx_data()
4628 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */ in iwn_tx_data()
4629 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { in iwn_tx_data()
4631 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) { in iwn_tx_data()
4634 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) in iwn_tx_data()
4636 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) in iwn_tx_data()
4639 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) { in iwn_tx_data()
4646 if (sc->hw_type != IWN_HW_REV_TYPE_4965) { in iwn_tx_data()
4647 /* 5000 autoselects RTS/CTS or CTS-to-self. */ in iwn_tx_data()
4655 ring = &sc->txq[ac]; in iwn_tx_data()
4656 if (m->m_flags & M_AMPDU_MPDU) { in iwn_tx_data()
4657 uint16_t seqno = ni->ni_txseqs[tid]; in iwn_tx_data()
4659 if (ring->queued > IWN_TX_RING_COUNT / 2 && in iwn_tx_data()
4660 (ring->cur + 1) % IWN_TX_RING_COUNT == ring->read) { in iwn_tx_data()
4663 __func__, ring->queued, ac); in iwn_tx_data()
4674 if ((seqno % 256) != ring->cur) { in iwn_tx_data()
4675 device_printf(sc->sc_dev, in iwn_tx_data()
4681 ring->cur); in iwn_tx_data()
4684 ni->ni_txseqs[tid] &= ~0xff; in iwn_tx_data()
4685 ni->ni_txseqs[tid] += ring->cur; in iwn_tx_data()
4686 seqno = ni->ni_txseqs[tid]; in iwn_tx_data()
4689 *(uint16_t *)wh->i_seq = in iwn_tx_data()
4691 ni->ni_txseqs[tid]++; in iwn_tx_data()
4695 cmd = &ring->cmd[ring->cur]; in iwn_tx_data()
4696 tx = (struct iwn_cmd_data *)cmd->data; in iwn_tx_data()
4699 tx->scratch = 0; /* clear "scratch" area */ in iwn_tx_data()
4701 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || in iwn_tx_data()
4703 tx->id = sc->broadcast_id; in iwn_tx_data()
4705 tx->id = wn->id; in iwn_tx_data()
4708 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; in iwn_tx_data()
4715 tx->timeout = htole16(3); in iwn_tx_data()
4717 tx->timeout = htole16(2); in iwn_tx_data()
4719 tx->timeout = htole16(0); in iwn_tx_data()
4721 if (tx->id == sc->broadcast_id) { in iwn_tx_data()
4723 tx->linkq = 0; in iwn_tx_data()
4725 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate); in iwn_tx_data()
4729 tx->tid = tid; in iwn_tx_data()
4730 tx->rts_ntries = 60; in iwn_tx_data()
4731 tx->data_ntries = 15; in iwn_tx_data()
4732 tx->lifetime = htole32(IWN_LIFETIME_INFINITE); in iwn_tx_data()
4733 tx->rate = iwn_rate_to_plcp(sc, ni, rate); in iwn_tx_data()
4734 tx->security = 0; in iwn_tx_data()
4735 tx->flags = htole32(flags); in iwn_tx_data()
4744 struct ieee80211vap *vap = ni->ni_vap; in iwn_tx_data_raw()
4753 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_tx_data_raw()
4758 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; in iwn_tx_data_raw()
4760 ac = params->ibp_pri & 3; in iwn_tx_data_raw()
4763 rate = params->ibp_rate0; in iwn_tx_data_raw()
4766 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) in iwn_tx_data_raw()
4768 if (params->ibp_flags & IEEE80211_BPF_RTS) { in iwn_tx_data_raw()
4769 if (sc->hw_type != IWN_HW_REV_TYPE_4965) { in iwn_tx_data_raw()
4770 /* 5000 autoselects RTS/CTS or CTS-to-self. */ in iwn_tx_data_raw()
4776 if (params->ibp_flags & IEEE80211_BPF_CTS) { in iwn_tx_data_raw()
4777 if (sc->hw_type != IWN_HW_REV_TYPE_4965) { in iwn_tx_data_raw()
4778 /* 5000 autoselects RTS/CTS or CTS-to-self. */ in iwn_tx_data_raw()
4786 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap; in iwn_tx_data_raw()
4788 tap->wt_flags = 0; in iwn_tx_data_raw()
4789 tap->wt_rate = rate; in iwn_tx_data_raw()
4794 ring = &sc->txq[ac]; in iwn_tx_data_raw()
4795 cmd = &ring->cmd[ring->cur]; in iwn_tx_data_raw()
4797 tx = (struct iwn_cmd_data *)cmd->data; in iwn_tx_data_raw()
4799 tx->scratch = 0; /* clear "scratch" area */ in iwn_tx_data_raw()
4802 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; in iwn_tx_data_raw()
4810 tx->timeout = htole16(3); in iwn_tx_data_raw()
4812 tx->timeout = htole16(2); in iwn_tx_data_raw()
4814 tx->timeout = htole16(0); in iwn_tx_data_raw()
4816 tx->tid = 0; in iwn_tx_data_raw()
4817 tx->id = sc->broadcast_id; in iwn_tx_data_raw()
4818 tx->rts_ntries = params->ibp_try1; in iwn_tx_data_raw()
4819 tx->data_ntries = params->ibp_try0; in iwn_tx_data_raw()
4820 tx->lifetime = htole32(IWN_LIFETIME_INFINITE); in iwn_tx_data_raw()
4821 tx->rate = iwn_rate_to_plcp(sc, ni, rate); in iwn_tx_data_raw()
4822 tx->security = 0; in iwn_tx_data_raw()
4823 tx->flags = htole32(flags); in iwn_tx_data_raw()
4826 tx->linkq = 0; in iwn_tx_data_raw()
4835 struct iwn_ops *ops = &sc->ops; in iwn_tx_cmd()
4848 totlen = m->m_pkthdr.len; in iwn_tx_cmd()
4850 desc = &ring->desc[ring->cur]; in iwn_tx_cmd()
4851 data = &ring->data[ring->cur]; in iwn_tx_cmd()
4853 if (__predict_false(data->m != NULL || data->ni != NULL)) { in iwn_tx_cmd()
4854 device_printf(sc->sc_dev, "%s: ni (%p) or m (%p) for idx %d " in iwn_tx_cmd()
4855 "in queue %d is not NULL!\n", __func__, data->ni, data->m, in iwn_tx_cmd()
4856 ring->cur, ring->qid); in iwn_tx_cmd()
4861 cmd = &ring->cmd[ring->cur]; in iwn_tx_cmd()
4862 cmd->code = IWN_CMD_TX_DATA; in iwn_tx_cmd()
4863 cmd->flags = 0; in iwn_tx_cmd()
4864 cmd->qid = ring->qid; in iwn_tx_cmd()
4865 cmd->idx = ring->cur; in iwn_tx_cmd()
4867 tx = (struct iwn_cmd_data *)cmd->data; in iwn_tx_cmd()
4868 tx->len = htole16(totlen); in iwn_tx_cmd()
4871 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr)); in iwn_tx_cmd()
4872 tx->hiaddr = IWN_HIADDR(data->scratch_paddr); in iwn_tx_cmd()
4875 tx->flags |= htole32(IWN_TX_NEED_PADDING); in iwn_tx_cmd()
4876 pad = 4 - (hdrlen & 3); in iwn_tx_cmd()
4886 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs, in iwn_tx_cmd()
4890 device_printf(sc->sc_dev, in iwn_tx_cmd()
4895 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1); in iwn_tx_cmd()
4897 device_printf(sc->sc_dev, in iwn_tx_cmd()
4903 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, in iwn_tx_cmd()
4911 device_printf(sc->sc_dev, in iwn_tx_cmd()
4914 if_inc_counter(ni->ni_vap->iv_ifp, in iwn_tx_cmd()
4922 data->m = m; in iwn_tx_cmd()
4923 data->ni = ni; in iwn_tx_cmd()
4927 __func__, ring->qid, ring->cur, totlen, nsegs, tx->rate); in iwn_tx_cmd()
4930 desc->nsegs = 1; in iwn_tx_cmd()
4931 if (m->m_len != 0) in iwn_tx_cmd()
4932 desc->nsegs += nsegs; in iwn_tx_cmd()
4934 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr)); in iwn_tx_cmd()
4935 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) | in iwn_tx_cmd()
4940 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr)); in iwn_tx_cmd()
4941 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) | in iwn_tx_cmd()
4942 seg->ds_len << 4); in iwn_tx_cmd()
4946 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE); in iwn_tx_cmd()
4947 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, in iwn_tx_cmd()
4949 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwn_tx_cmd()
4953 if (ring->qid >= sc->firstaggqueue) in iwn_tx_cmd()
4954 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen); in iwn_tx_cmd()
4957 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT; in iwn_tx_cmd()
4958 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); in iwn_tx_cmd()
4961 if (++ring->queued > IWN_TX_RING_HIMARK) in iwn_tx_cmd()
4962 sc->qfullmsk |= 1 << ring->qid; in iwn_tx_cmd()
4964 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_tx_cmd()
4986 while ((m = mbufq_dequeue(&sc->sc_xmit_queue)) != NULL) { in iwn_xmit_task()
4988 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; in iwn_xmit_task()
5004 if_inc_counter(ni->ni_vap->iv_ifp, in iwn_xmit_task()
5011 sc->sc_beacon_wait = 0; in iwn_xmit_task()
5016 * raw frame xmit - free node/reference if failed.
5022 struct ieee80211com *ic = ni->ni_ic; in iwn_raw_xmit()
5023 struct iwn_softc *sc = ic->ic_softc; in iwn_raw_xmit()
5026 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_raw_xmit()
5029 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0) { in iwn_raw_xmit()
5036 if (sc->sc_beacon_wait) { in iwn_raw_xmit()
5061 sc->sc_tx_timer = 5; in iwn_raw_xmit()
5067 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__); in iwn_raw_xmit()
5073 * transmit - don't free mbuf if failed; don't free node ref if failed.
5078 struct iwn_softc *sc = ic->ic_softc; in iwn_transmit()
5082 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; in iwn_transmit()
5085 if ((sc->sc_flags & IWN_FLAG_RUNNING) == 0 || sc->sc_beacon_wait) { in iwn_transmit()
5090 if (sc->qfullmsk) { in iwn_transmit()
5097 sc->sc_tx_timer = 5; in iwn_transmit()
5106 struct ieee80211com *ic = &sc->sc_ic; in iwn_scan_timeout()
5116 struct ieee80211com *ic = &sc->sc_ic; in iwn_watchdog()
5120 KASSERT(sc->sc_flags & IWN_FLAG_RUNNING, ("not running")); in iwn_watchdog()
5122 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_watchdog()
5124 if (sc->sc_tx_timer > 0) { in iwn_watchdog()
5125 if (--sc->sc_tx_timer == 0) { in iwn_watchdog()
5131 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc); in iwn_watchdog()
5153 struct iwn_softc *sc = dev->si_drv1; in iwn_cdev_ioctl()
5165 rc = copyout(&sc->last_stat, d->dst_addr, sizeof(struct iwn_stats)); in iwn_cdev_ioctl()
5170 memset(&sc->last_stat, 0, sizeof(struct iwn_stats)); in iwn_cdev_ioctl()
5190 struct iwn_softc *sc = ic->ic_softc; in iwn_parent()
5194 if (ic->ic_nrunning > 0) { in iwn_parent()
5203 taskqueue_enqueue(sc->sc_tq, &sc->sc_rftoggle_task); in iwn_parent()
5206 vap = TAILQ_FIRST(&ic->ic_vaps); in iwn_parent()
5230 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_cmd()
5235 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) in iwn_cmd()
5240 ring = &sc->txq[cmd_queue_num]; in iwn_cmd()
5241 desc = &ring->desc[ring->cur]; in iwn_cmd()
5242 data = &ring->data[ring->cur]; in iwn_cmd()
5245 if (size > sizeof cmd->data) { in iwn_cmd()
5253 error = bus_dmamap_load(ring->data_dmat, data->map, cmd, in iwn_cmd()
5259 data->m = m; in iwn_cmd()
5261 cmd = &ring->cmd[ring->cur]; in iwn_cmd()
5262 paddr = data->cmd_paddr; in iwn_cmd()
5265 cmd->code = code; in iwn_cmd()
5266 cmd->flags = 0; in iwn_cmd()
5267 cmd->qid = ring->qid; in iwn_cmd()
5268 cmd->idx = ring->cur; in iwn_cmd()
5269 memcpy(cmd->data, buf, size); in iwn_cmd()
5271 desc->nsegs = 1; in iwn_cmd()
5272 desc->segs[0].addr = htole32(IWN_LOADDR(paddr)); in iwn_cmd()
5273 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4); in iwn_cmd()
5276 __func__, iwn_intr_str(cmd->code), cmd->code, in iwn_cmd()
5277 cmd->flags, cmd->qid, cmd->idx); in iwn_cmd()
5279 if (size > sizeof cmd->data) { in iwn_cmd()
5280 bus_dmamap_sync(ring->data_dmat, data->map, in iwn_cmd()
5283 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, in iwn_cmd()
5286 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwn_cmd()
5290 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT; in iwn_cmd()
5291 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur); in iwn_cmd()
5293 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_cmd()
5295 return async ? 0 : msleep(desc, &sc->sc_mtx, PCATCH, "iwncmd", hz); in iwn_cmd()
5304 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_add_node()
5323 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_add_node()
5338 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_set_link_quality()
5341 linkq.id = wn->id; in iwn_set_link_quality()
5354 sc->ntxchains); in iwn_set_link_quality()
5362 rs = (struct ieee80211_rateset *) &ni->ni_htrates; in iwn_set_link_quality()
5365 rs = &ni->ni_rates; in iwn_set_link_quality()
5369 /* Start at highest available bit-rate. */ in iwn_set_link_quality()
5374 txrate = ni->ni_htrates.rs_nrates - 1; in iwn_set_link_quality()
5376 txrate = rs->rs_nrates - 1; in iwn_set_link_quality()
5388 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate]; in iwn_set_link_quality()
5390 rate = IEEE80211_RV(rs->rs_rates[txrate]); in iwn_set_link_quality()
5392 /* Do rate -> PLCP config mapping */ in iwn_set_link_quality()
5410 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie, in iwn_set_link_quality()
5411 * the next entry.) That way if the next entry is a non-MIMO in iwn_set_link_quality()
5418 /* Next retry at immediate lower bit-rate. */ in iwn_set_link_quality()
5420 txrate--; in iwn_set_link_quality()
5424 * all MIMO rates (eg 5300 doing MCS23-15) then yes, in iwn_set_link_quality()
5432 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_set_link_quality()
5438 * Broadcast node is used to send group-addressed and management frames.
5443 struct iwn_ops *ops = &sc->ops; in iwn_add_broadcast_node()
5444 struct ieee80211com *ic = &sc->sc_ic; in iwn_add_broadcast_node()
5450 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_add_broadcast_node()
5452 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; in iwn_add_broadcast_node()
5456 node.id = sc->broadcast_id; in iwn_add_broadcast_node()
5458 if ((error = ops->add_node(sc, &node, async)) != 0) in iwn_add_broadcast_node()
5462 txant = IWN_LSB(sc->txchainmask); in iwn_add_broadcast_node()
5465 linkq.id = sc->broadcast_id; in iwn_add_broadcast_node()
5472 /* Use lowest mandatory bit-rate. */ in iwn_add_broadcast_node()
5474 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan)) in iwn_add_broadcast_node()
5479 /* Use same bit-rate for all TX retries. */ in iwn_add_broadcast_node()
5484 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_add_broadcast_node()
5492 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */ in iwn_updateedca()
5493 struct iwn_softc *sc = ic->ic_softc; in iwn_updateedca()
5498 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_updateedca()
5508 cmd.ac[aci].aifsn = ac->wmep_aifsn; in iwn_updateedca()
5509 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin)); in iwn_updateedca()
5510 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax)); in iwn_updateedca()
5512 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit)); in iwn_updateedca()
5520 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_updateedca()
5529 struct ieee80211com *ic = &sc->sc_ic; in iwn_set_promisc()
5533 if (ic->ic_promisc > 0 || ic->ic_opmode == IEEE80211_M_MONITOR) in iwn_set_promisc()
5534 sc->rxon->filter |= htole32(promisc_filter); in iwn_set_promisc()
5536 sc->rxon->filter &= ~htole32(promisc_filter); in iwn_set_promisc()
5542 struct iwn_softc *sc = ic->ic_softc; in iwn_update_promisc()
5545 if (ic->ic_opmode == IEEE80211_M_MONITOR) in iwn_update_promisc()
5549 if (!(sc->sc_flags & IWN_FLAG_RUNNING)) { in iwn_update_promisc()
5556 device_printf(sc->sc_dev, in iwn_update_promisc()
5574 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_set_led()
5578 if (sc->sc_is_scanning) in iwn_set_led()
5602 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_set_critical_temp()
5606 if (sc->hw_type == IWN_HW_REV_TYPE_5150) in iwn_set_critical_temp()
5607 temp = (IWN_CTOK(110) - sc->temp_off) * -5; in iwn_set_critical_temp()
5608 else if (sc->hw_type == IWN_HW_REV_TYPE_4965) in iwn_set_critical_temp()
5624 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_set_timing()
5627 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t)); in iwn_set_timing()
5628 cmd.bintval = htole16(ni->ni_intval); in iwn_set_timing()
5632 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU; in iwn_set_timing()
5634 cmd.binitval = htole32((uint32_t)(val - mod)); in iwn_set_timing()
5637 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod)); in iwn_set_timing()
5646 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_power_calibration()
5649 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n", in iwn4965_power_calibration()
5650 __func__, sc->temp, temp); in iwn4965_power_calibration()
5651 if (abs(temp - sc->temp) >= 3) { in iwn4965_power_calibration()
5653 sc->temp = temp; in iwn4965_power_calibration()
5666 /* Fixed-point arithmetic division using a n-bit fractional part. */ in iwn4965_set_txpower()
5671 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n)) in iwn4965_set_txpower()
5674 struct iwn_ucode_info *uc = &sc->ucode_info; in iwn4965_set_txpower()
5682 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; in iwn4965_set_txpower()
5684 chan = sc->rxon->chan; in iwn4965_set_txpower()
5685 is_chan_5ghz = (sc->rxon->flags & htole32(IWN_RXON_24GHZ)) == 0; in iwn4965_set_txpower()
5694 maxpwr = sc->maxpwr5GHz; in iwn4965_set_txpower()
5698 maxpwr = sc->maxpwr2GHz; in iwn4965_set_txpower()
5704 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7; in iwn4965_set_txpower()
5711 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage); in iwn4965_set_txpower()
5714 if (chan <= 20) /* 1-20 */ in iwn4965_set_txpower()
5716 else if (chan <= 43) /* 34-43 */ in iwn4965_set_txpower()
5718 else if (chan <= 70) /* 44-70 */ in iwn4965_set_txpower()
5720 else if (chan <= 124) /* 71-124 */ in iwn4965_set_txpower()
5722 else /* 125-200 */ in iwn4965_set_txpower()
5727 /* Get channel sub-band. */ in iwn4965_set_txpower()
5729 if (sc->bands[i].lo != 0 && in iwn4965_set_txpower()
5730 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi) in iwn4965_set_txpower()
5732 if (i == IWN_NBANDS) /* Can't happen in real-life. */ in iwn4965_set_txpower()
5734 chans = sc->bands[i].chans; in iwn4965_set_txpower()
5736 "%s: chan %d sub-band=%d\n", __func__, chan, i); in iwn4965_set_txpower()
5756 tdiff = ((sc->temp - temp) * 2) / tdiv[grp]; in iwn4965_set_txpower()
5759 __func__, tdiff, sc->temp, temp); in iwn4965_set_txpower()
5762 /* Convert dBm to half-dBm. */ in iwn4965_set_txpower()
5763 maxchpwr = sc->maxpwr[chan] * 2; in iwn4965_set_txpower()
5765 maxchpwr -= 6; /* MIMO 2T: -3dB */ in iwn4965_set_txpower()
5771 pwr -= 15; /* OFDM48: -7.5dB */ in iwn4965_set_txpower()
5773 pwr -= 17; /* OFDM54: -8.5dB */ in iwn4965_set_txpower()
5775 pwr -= 20; /* OFDM60: -10dB */ in iwn4965_set_txpower()
5777 pwr -= 10; /* Others: -5dB */ in iwn4965_set_txpower()
5783 idx = gain - (pwr - power) - tdiff - vdiff; in iwn4965_set_txpower()
5785 idx += (int32_t)le32toh(uc->atten[grp][c]); in iwn4965_set_txpower()
5820 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_set_txpower()
5833 IWN_UCODE_API(sc->ucode_rev)); in iwn5000_set_txpower()
5834 if (IWN_UCODE_API(sc->ucode_rev) == 1) in iwn5000_set_txpower()
5847 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf; in iwn4965_get_rssi()
5851 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_get_rssi()
5853 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC; in iwn4965_get_rssi()
5854 agc = (le16toh(phy->agc) >> 7) & 0x7f; in iwn4965_get_rssi()
5858 rssi = MAX(rssi, phy->rssi[0]); in iwn4965_get_rssi()
5860 rssi = MAX(rssi, phy->rssi[2]); in iwn4965_get_rssi()
5862 rssi = MAX(rssi, phy->rssi[4]); in iwn4965_get_rssi()
5866 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4], in iwn4965_get_rssi()
5867 rssi - agc - IWN_RSSI_TO_DBM); in iwn4965_get_rssi()
5868 return rssi - agc - IWN_RSSI_TO_DBM; in iwn4965_get_rssi()
5874 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf; in iwn5000_get_rssi()
5878 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_get_rssi()
5880 agc = (le32toh(phy->agc) >> 9) & 0x7f; in iwn5000_get_rssi()
5882 rssi = MAX(le16toh(phy->rssi[0]) & 0xff, in iwn5000_get_rssi()
5883 le16toh(phy->rssi[1]) & 0xff); in iwn5000_get_rssi()
5884 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi); in iwn5000_get_rssi()
5888 phy->rssi[0], phy->rssi[1], phy->rssi[2], in iwn5000_get_rssi()
5889 rssi - agc - IWN_RSSI_TO_DBM); in iwn5000_get_rssi()
5890 return rssi - agc - IWN_RSSI_TO_DBM; in iwn5000_get_rssi()
5903 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0) in iwn_get_noise()
5909 return (nbant == 0) ? -127 : (total / nbant) - 107; in iwn_get_noise()
5918 struct iwn_ucode_info *uc = &sc->ucode_info; in iwn4965_get_temperature()
5921 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_get_temperature()
5923 r1 = le32toh(uc->temp[0].chan20MHz); in iwn4965_get_temperature()
5924 r2 = le32toh(uc->temp[1].chan20MHz); in iwn4965_get_temperature()
5925 r3 = le32toh(uc->temp[2].chan20MHz); in iwn4965_get_temperature()
5926 r4 = le32toh(sc->rawtemp); in iwn4965_get_temperature()
5931 /* Sign-extend 23-bit R4 value to 32-bit. */ in iwn4965_get_temperature()
5932 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000; in iwn4965_get_temperature()
5934 temp = (259 * (r4 - r2)) / (r3 - r1); in iwn4965_get_temperature()
5947 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_get_temperature()
5953 temp = le32toh(sc->rawtemp); in iwn5000_get_temperature()
5954 if (sc->hw_type == IWN_HW_REV_TYPE_5150) { in iwn5000_get_temperature()
5955 temp = (temp / -5) + sc->temp_off; in iwn5000_get_temperature()
5967 struct iwn_ops *ops = &sc->ops; in iwn_init_sensitivity()
5968 struct iwn_calib_state *calib = &sc->calib; in iwn_init_sensitivity()
5972 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_init_sensitivity()
5976 calib->state = IWN_CALIB_STATE_INIT; in iwn_init_sensitivity()
5977 calib->cck_state = IWN_CCK_STATE_HIFA; in iwn_init_sensitivity()
5979 calib->ofdm_x1 = sc->limits->min_ofdm_x1; in iwn_init_sensitivity()
5980 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1; in iwn_init_sensitivity()
5981 calib->ofdm_x4 = sc->limits->min_ofdm_x4; in iwn_init_sensitivity()
5982 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4; in iwn_init_sensitivity()
5983 calib->cck_x4 = 125; in iwn_init_sensitivity()
5984 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4; in iwn_init_sensitivity()
5985 calib->energy_cck = sc->limits->energy_cck; in iwn_init_sensitivity()
5992 if ((error = ops->init_gains(sc)) != 0) in iwn_init_sensitivity()
6011 struct iwn_ops *ops = &sc->ops; in iwn_collect_noise()
6012 struct iwn_calib_state *calib = &sc->calib; in iwn_collect_noise()
6013 struct ieee80211com *ic = &sc->sc_ic; in iwn_collect_noise()
6017 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_collect_noise()
6021 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff; in iwn_collect_noise()
6022 calib->noise[i] += le32toh(stats->noise[i]) & 0xff; in iwn_collect_noise()
6025 if (++calib->nbeacons < 20) in iwn_collect_noise()
6029 val = MAX(calib->rssi[0], calib->rssi[1]); in iwn_collect_noise()
6030 val = MAX(calib->rssi[2], val); in iwn_collect_noise()
6033 sc->chainmask = sc->rxchainmask; in iwn_collect_noise()
6035 if (val - calib->rssi[i] > 15 * 20) in iwn_collect_noise()
6036 sc->chainmask &= ~(1 << i); in iwn_collect_noise()
6039 __func__, sc->rxchainmask, sc->chainmask); in iwn_collect_noise()
6042 if ((sc->chainmask & sc->txchainmask) == 0) in iwn_collect_noise()
6043 sc->chainmask |= IWN_LSB(sc->txchainmask); in iwn_collect_noise()
6045 (void)ops->set_gains(sc); in iwn_collect_noise()
6046 calib->state = IWN_CALIB_STATE_RUN; in iwn_collect_noise()
6050 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask)); in iwn_collect_noise()
6051 if (sc->sc_is_scanning) in iwn_collect_noise()
6052 device_printf(sc->sc_dev, in iwn_collect_noise()
6055 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1); in iwn_collect_noise()
6058 /* Enable power-saving mode if requested by user. */ in iwn_collect_noise()
6059 if (ic->ic_flags & IEEE80211_F_PMGTON) in iwn_collect_noise()
6062 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_collect_noise()
6071 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_init_gains()
6086 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_init_gains()
6089 cmd.code = sc->reset_noise_gain; in iwn5000_init_gains()
6100 struct iwn_calib_state *calib = &sc->calib; in iwn4965_set_gains()
6104 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_set_gains()
6109 if (sc->chainmask & (1 << i)) in iwn4965_set_gains()
6110 noise = MIN(calib->noise[i], noise); in iwn4965_set_gains()
6116 if (sc->chainmask & (1 << i)) { in iwn4965_set_gains()
6118 delta = (noise - (int32_t)calib->noise[i]) / 30; in iwn4965_set_gains()
6120 /* Limit to [-4.5dB,0]. */ in iwn4965_set_gains()
6128 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask); in iwn4965_set_gains()
6135 struct iwn_calib_state *calib = &sc->calib; in iwn5000_set_gains()
6139 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_set_gains()
6142 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30; in iwn5000_set_gains()
6145 cmd.code = sc->noise_gain; in iwn5000_set_gains()
6149 ant = IWN_LSB(sc->rxchainmask); in iwn5000_set_gains()
6152 if (sc->chainmask & (1 << i)) { in iwn5000_set_gains()
6154 delta = ((int32_t)calib->noise[ant] - in iwn5000_set_gains()
6155 (int32_t)calib->noise[i]) / div; in iwn5000_set_gains()
6156 /* Limit to [-4.5dB,+4.5dB]. */ in iwn5000_set_gains()
6157 cmd.gain[i - 1] = MIN(abs(delta), 3); in iwn5000_set_gains()
6159 cmd.gain[i - 1] |= 1 << 2; /* sign bit */ in iwn5000_set_gains()
6164 cmd.gain[0], cmd.gain[1], sc->chainmask); in iwn5000_set_gains()
6177 if ((val) < (max) - (inc)) \ in iwn_tune_sensitivity()
6186 (val) -= (dec); \ in iwn_tune_sensitivity()
6192 const struct iwn_sensitivity_limits *limits = sc->limits; in iwn_tune_sensitivity()
6193 struct iwn_calib_state *calib = &sc->calib; in iwn_tune_sensitivity()
6199 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_tune_sensitivity()
6202 if ((rxena = le32toh(stats->general.load)) == 0){ in iwn_tune_sensitivity()
6203 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__); in iwn_tune_sensitivity()
6208 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm; in iwn_tune_sensitivity()
6209 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm; in iwn_tune_sensitivity()
6216 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1); in iwn_tune_sensitivity()
6217 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1); in iwn_tune_sensitivity()
6218 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4); in iwn_tune_sensitivity()
6219 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4); in iwn_tune_sensitivity()
6225 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1); in iwn_tune_sensitivity()
6226 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1); in iwn_tune_sensitivity()
6227 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4); in iwn_tune_sensitivity()
6228 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4); in iwn_tune_sensitivity()
6233 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff; in iwn_tune_sensitivity()
6237 calib->noise_samples[calib->cur_noise_sample] = val; in iwn_tune_sensitivity()
6238 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20; in iwn_tune_sensitivity()
6241 noise_ref = calib->noise_samples[0]; in iwn_tune_sensitivity()
6243 noise_ref = MAX(noise_ref, calib->noise_samples[i]); in iwn_tune_sensitivity()
6247 energy[i] = le32toh(stats->general.energy[i]); in iwn_tune_sensitivity()
6251 calib->energy_samples[calib->cur_energy_sample] = val; in iwn_tune_sensitivity()
6252 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10; in iwn_tune_sensitivity()
6255 energy_min = calib->energy_samples[0]; in iwn_tune_sensitivity()
6257 energy_min = MAX(energy_min, calib->energy_samples[i]); in iwn_tune_sensitivity()
6261 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck; in iwn_tune_sensitivity()
6262 fa += le32toh(stats->cck.fa) - calib->fa_cck; in iwn_tune_sensitivity()
6269 calib->cck_state = IWN_CCK_STATE_HIFA; in iwn_tune_sensitivity()
6270 calib->low_fa = 0; in iwn_tune_sensitivity()
6272 if (calib->cck_x4 > 160) { in iwn_tune_sensitivity()
6273 calib->noise_ref = noise_ref; in iwn_tune_sensitivity()
6274 if (calib->energy_cck > 2) in iwn_tune_sensitivity()
6275 dec(calib->energy_cck, 2, energy_min); in iwn_tune_sensitivity()
6277 if (calib->cck_x4 < 160) { in iwn_tune_sensitivity()
6278 calib->cck_x4 = 161; in iwn_tune_sensitivity()
6281 inc(calib->cck_x4, 3, limits->max_cck_x4); in iwn_tune_sensitivity()
6283 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4); in iwn_tune_sensitivity()
6289 calib->cck_state = IWN_CCK_STATE_LOFA; in iwn_tune_sensitivity()
6290 calib->low_fa++; in iwn_tune_sensitivity()
6292 if (calib->cck_state != IWN_CCK_STATE_INIT && in iwn_tune_sensitivity()
6293 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 || in iwn_tune_sensitivity()
6294 calib->low_fa > 100)) { in iwn_tune_sensitivity()
6295 inc(calib->energy_cck, 2, limits->min_energy_cck); in iwn_tune_sensitivity()
6296 dec(calib->cck_x4, 3, limits->min_cck_x4); in iwn_tune_sensitivity()
6297 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4); in iwn_tune_sensitivity()
6303 calib->low_fa = 0; in iwn_tune_sensitivity()
6304 calib->noise_ref = noise_ref; in iwn_tune_sensitivity()
6306 if (calib->cck_state == IWN_CCK_STATE_HIFA) { in iwn_tune_sensitivity()
6308 dec(calib->energy_cck, 8, energy_min); in iwn_tune_sensitivity()
6310 calib->cck_state = IWN_CCK_STATE_INIT; in iwn_tune_sensitivity()
6316 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_tune_sensitivity()
6325 struct iwn_calib_state *calib = &sc->calib; in iwn_send_sensitivity()
6333 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1); in iwn_send_sensitivity()
6334 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1); in iwn_send_sensitivity()
6335 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4); in iwn_send_sensitivity()
6336 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4); in iwn_send_sensitivity()
6337 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm); in iwn_send_sensitivity()
6340 cmd.corr_cck_x4 = htole16(calib->cck_x4); in iwn_send_sensitivity()
6341 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4); in iwn_send_sensitivity()
6342 cmd.energy_cck = htole16(calib->energy_cck); in iwn_send_sensitivity()
6345 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc); in iwn_send_sensitivity()
6349 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4, in iwn_send_sensitivity()
6350 calib->ofdm_mrc_x4, calib->cck_x4, in iwn_send_sensitivity()
6351 calib->cck_mrc_x4, calib->energy_cck); in iwn_send_sensitivity()
6353 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS)) in iwn_send_sensitivity()
6377 struct iwn_calib_state *calib = &sc->calib; in iwn_check_rx_recovery()
6386 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck; in iwn_check_rx_recovery()
6387 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm; in iwn_check_rx_recovery()
6388 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht; in iwn_check_rx_recovery()
6396 * XXX go figure out what to do if ticks rolls over to -ve instead! in iwn_check_rx_recovery()
6397 * XXX go stab signed integer overflow undefined-ness in the face. in iwn_check_rx_recovery()
6400 delta_ticks = cur_ticks - sc->last_calib_ticks; in iwn_check_rx_recovery()
6418 thresh = sc->base_params->plcp_err_threshold * delta_msec; in iwn_check_rx_recovery()
6483 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4); in iwn_set_pslevel()
6486 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024); in iwn_set_pslevel()
6487 cmd.txtimeout = htole32(pmgt->txtimeout * 1024); in iwn_set_pslevel()
6493 skip_dtim = pmgt->skip_dtim; in iwn_set_pslevel()
6496 max = pmgt->intval[4]; in iwn_set_pslevel()
6497 if (max == (uint32_t)-1) in iwn_set_pslevel()
6504 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i])); in iwn_set_pslevel()
6546 if (sc->base_params->bt_sco_disable) in iwn_send_advanced_btcoex()
6559 if (sc->base_params->bt_session_2) { in iwn_send_advanced_btcoex()
6652 htflags |= IWN_RXON_HT_PROTMODE(vap->iv_curhtprotmode); in iwn_get_rxon_ht_flags()
6655 switch (vap->iv_curhtprotmode) { in iwn_get_rxon_ht_flags()
6673 return ((sc->rxon->filter & htole32(IWN_FILTER_BSS)) != 0); in iwn_check_bss_filter()
6680 struct iwn_rxon *rxon = sc->rxon; in iwn4965_rxon_assoc()
6682 cmd.flags = rxon->flags; in iwn4965_rxon_assoc()
6683 cmd.filter = rxon->filter; in iwn4965_rxon_assoc()
6684 cmd.ofdm_mask = rxon->ofdm_mask; in iwn4965_rxon_assoc()
6685 cmd.cck_mask = rxon->cck_mask; in iwn4965_rxon_assoc()
6686 cmd.ht_single_mask = rxon->ht_single_mask; in iwn4965_rxon_assoc()
6687 cmd.ht_dual_mask = rxon->ht_dual_mask; in iwn4965_rxon_assoc()
6688 cmd.rxchain = rxon->rxchain; in iwn4965_rxon_assoc()
6698 struct iwn_rxon *rxon = sc->rxon; in iwn5000_rxon_assoc()
6700 cmd.flags = rxon->flags; in iwn5000_rxon_assoc()
6701 cmd.filter = rxon->filter; in iwn5000_rxon_assoc()
6702 cmd.ofdm_mask = rxon->ofdm_mask; in iwn5000_rxon_assoc()
6703 cmd.cck_mask = rxon->cck_mask; in iwn5000_rxon_assoc()
6705 cmd.ht_single_mask = rxon->ht_single_mask; in iwn5000_rxon_assoc()
6706 cmd.ht_dual_mask = rxon->ht_dual_mask; in iwn5000_rxon_assoc()
6707 cmd.ht_triple_mask = rxon->ht_triple_mask; in iwn5000_rxon_assoc()
6709 cmd.rxchain = rxon->rxchain; in iwn5000_rxon_assoc()
6710 cmd.acquisition = rxon->acquisition; in iwn5000_rxon_assoc()
6719 struct iwn_ops *ops = &sc->ops; in iwn_send_rxon()
6725 error = ops->rxon_assoc(sc, async); in iwn_send_rxon()
6727 device_printf(sc->sc_dev, in iwn_send_rxon()
6733 if (sc->sc_is_scanning) in iwn_send_rxon()
6734 device_printf(sc->sc_dev, in iwn_send_rxon()
6738 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, async); in iwn_send_rxon()
6740 device_printf(sc->sc_dev, in iwn_send_rxon()
6752 device_printf(sc->sc_dev, in iwn_send_rxon()
6760 if ((error = ops->set_txpower(sc, async)) != 0) { in iwn_send_rxon()
6761 device_printf(sc->sc_dev, in iwn_send_rxon()
6773 struct ieee80211com *ic = &sc->sc_ic; in iwn_config()
6774 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwn_config()
6780 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_config()
6782 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) in iwn_config()
6783 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) { in iwn_config()
6784 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are" in iwn_config()
6787 sc->base_params->calib_need, in iwn_config()
6794 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) { in iwn_config()
6797 device_printf(sc->sc_dev, in iwn_config()
6801 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) { in iwn_config()
6804 device_printf(sc->sc_dev, in iwn_config()
6811 if (sc->hw_type == IWN_HW_REV_TYPE_6050) { in iwn_config()
6815 device_printf(sc->sc_dev, in iwn_config()
6823 if (sc->hw_type != IWN_HW_REV_TYPE_4965 && in iwn_config()
6824 IWN_UCODE_API(sc->ucode_rev) > 1) { in iwn_config()
6825 txmask = htole32(sc->txchainmask); in iwn_config()
6831 device_printf(sc->sc_dev, in iwn_config()
6842 if (sc->base_params->bt_mode == IWN_BT_ADVANCED) in iwn_config()
6844 if (sc->base_params->bt_mode == IWN_BT_SIMPLE) in iwn_config()
6848 device_printf(sc->sc_dev, in iwn_config()
6855 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; in iwn_config()
6856 memset(sc->rxon, 0, sizeof (struct iwn_rxon)); in iwn_config()
6857 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr; in iwn_config()
6858 IEEE80211_ADDR_COPY(sc->rxon->myaddr, macaddr); in iwn_config()
6859 IEEE80211_ADDR_COPY(sc->rxon->wlap, macaddr); in iwn_config()
6860 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan); in iwn_config()
6861 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF); in iwn_config()
6862 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) in iwn_config()
6863 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ); in iwn_config()
6865 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST); in iwn_config()
6866 switch (ic->ic_opmode) { in iwn_config()
6868 sc->rxon->mode = IWN_MODE_STA; in iwn_config()
6871 sc->rxon->mode = IWN_MODE_MONITOR; in iwn_config()
6878 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */ in iwn_config()
6879 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */ in iwn_config()
6880 sc->rxon->ht_single_mask = 0xff; in iwn_config()
6881 sc->rxon->ht_dual_mask = 0xff; in iwn_config()
6882 sc->rxon->ht_triple_mask = 0xff; in iwn_config()
6892 IWN_RXCHAIN_VALID(sc->rxchainmask) | in iwn_config()
6893 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) | in iwn_config()
6894 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains); in iwn_config()
6895 sc->rxon->rxchain = htole16(rxchain); in iwn_config()
6899 sc->rxchainmask, in iwn_config()
6900 sc->nrxchains); in iwn_config()
6902 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, vap, ic->ic_curchan)); in iwn_config()
6906 __func__, le32toh(sc->rxon->flags)); in iwn_config()
6908 device_printf(sc->sc_dev, "%s: could not send RXON\n", in iwn_config()
6914 device_printf(sc->sc_dev, in iwn_config()
6921 device_printf(sc->sc_dev, in iwn_config()
6926 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_config()
6954 struct ieee80211com *ic = &sc->sc_ic; in iwn_limit_dwell()
6959 if (! TAILQ_EMPTY(&ic->ic_vaps)) { in iwn_limit_dwell()
6960 vap = TAILQ_FIRST(&ic->ic_vaps); in iwn_limit_dwell()
6961 bintval = vap->iv_bss->ni_intval; in iwn_limit_dwell()
6965 * If it's non-zero, we should calculate the minimum of in iwn_limit_dwell()
7002 struct ieee80211com *ic = &sc->sc_ic; in iwn_scan()
7003 struct ieee80211_node *ni = vap->iv_bss; in iwn_scan()
7018 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_scan()
7024 if (sc->sc_is_scanning) { in iwn_scan()
7025 device_printf(sc->sc_dev, "%s: called whilst scanning!\n", in iwn_scan()
7031 c = ic->ic_curchan; in iwn_scan()
7033 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; in iwn_scan()
7036 device_printf(sc->sc_dev, in iwn_scan()
7046 hdr->quiet_time = htole16(10); /* timeout in milliseconds */ in iwn_scan()
7047 hdr->quiet_threshold = htole16(1); /* min # of packets */ in iwn_scan()
7052 hdr->max_svc = htole32(250 * 1024); in iwn_scan()
7066 hdr->pause_svc = htole32(scan_service_time); in iwn_scan()
7070 IWN_RXCHAIN_VALID(sc->rxchainmask) | in iwn_scan()
7071 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) | in iwn_scan()
7074 sc->hw_type == IWN_HW_REV_TYPE_4965) { in iwn_scan()
7078 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask); in iwn_scan()
7079 hdr->rxchain = htole16(rxchain); in iwn_scan()
7080 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON); in iwn_scan()
7083 tx->flags = htole32(IWN_TX_AUTO_SEQ); in iwn_scan()
7084 tx->id = sc->broadcast_id; in iwn_scan()
7085 tx->lifetime = htole32(IWN_LIFETIME_INFINITE); in iwn_scan()
7089 tx->rate = htole32(0xd); in iwn_scan()
7090 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A]; in iwn_scan()
7092 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO); in iwn_scan()
7093 if (sc->hw_type == IWN_HW_REV_TYPE_4965 && in iwn_scan()
7094 sc->rxon->associd && sc->rxon->chan > 14) in iwn_scan()
7095 tx->rate = htole32(0xd); in iwn_scan()
7098 tx->rate = htole32(10 | IWN_RFLAG_CCK); in iwn_scan()
7100 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G]; in iwn_scan()
7103 txant = IWN_LSB(sc->txchainmask); in iwn_scan()
7104 tx->rate |= htole32(IWN_RFLAG_ANT(txant)); in iwn_scan()
7119 if (ss->ss_ssid[0].len != 0) { in iwn_scan()
7121 essid[0].len = ss->ss_ssid[0].len; in iwn_scan()
7122 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len); in iwn_scan()
7127 ss->ss_ssid[0].len, in iwn_scan()
7128 ss->ss_ssid[0].len, in iwn_scan()
7129 ss->ss_ssid[0].ssid); in iwn_scan()
7131 if (ss->ss_nssid > 0) in iwn_scan()
7140 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | in iwn_scan()
7142 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; in iwn_scan()
7143 IEEE80211_ADDR_COPY(wh->i_addr1, if_getbroadcastaddr(vap->iv_ifp)); in iwn_scan()
7144 IEEE80211_ADDR_COPY(wh->i_addr2, if_getlladdr(vap->iv_ifp)); in iwn_scan()
7145 IEEE80211_ADDR_COPY(wh->i_addr3, if_getbroadcastaddr(vap->iv_ifp)); in iwn_scan()
7146 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */ in iwn_scan()
7147 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */ in iwn_scan()
7152 if (rs->rs_nrates > IEEE80211_RATE_SIZE) in iwn_scan()
7154 if (ic->ic_htcaps & IEEE80211_HTC_HT) in iwn_scan()
7158 tx->len = htole16(frm - (uint8_t *)wh); in iwn_scan()
7172 * sending out probes -- setting this to a huge value will in iwn_scan()
7188 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN) in iwn_scan()
7189 hdr->crc_threshold = is_active ? in iwn_scan()
7192 hdr->crc_threshold = is_active ? in iwn_scan()
7196 chan->chan = htole16(ieee80211_chan2ieee(ic, c)); in iwn_scan()
7197 chan->flags = 0; in iwn_scan()
7198 if (ss->ss_nssid > 0) in iwn_scan()
7199 chan->flags |= htole32(IWN_CHAN_NPBREQS(1)); in iwn_scan()
7200 chan->dsp_gain = 0x6e; in iwn_scan()
7206 if (c->ic_flags & IEEE80211_CHAN_PASSIVE) in iwn_scan()
7207 chan->flags |= htole32(IWN_CHAN_PASSIVE); in iwn_scan()
7209 chan->flags |= htole32(IWN_CHAN_ACTIVE); in iwn_scan()
7215 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid); in iwn_scan()
7222 chan->active = htole16(dwell_active); in iwn_scan()
7223 chan->passive = htole16(dwell_passive); in iwn_scan()
7226 chan->rf_gain = 0x3b; in iwn_scan()
7228 chan->rf_gain = 0x28; in iwn_scan()
7234 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain, in iwn_scan()
7236 hdr->crc_threshold, is_active, ss->ss_nssid); in iwn_scan()
7238 hdr->nchan++; in iwn_scan()
7240 buflen = (uint8_t *)chan - buf; in iwn_scan()
7241 hdr->len = htole16(buflen); in iwn_scan()
7243 if (sc->sc_is_scanning) { in iwn_scan()
7244 device_printf(sc->sc_dev, in iwn_scan()
7248 sc->sc_is_scanning = 1; in iwn_scan()
7251 hdr->nchan); in iwn_scan()
7255 callout_reset(&sc->scan_timeout, 5*hz, iwn_scan_timeout, sc); in iwn_scan()
7257 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_scan()
7265 struct ieee80211com *ic = &sc->sc_ic; in iwn_auth()
7266 struct ieee80211_node *ni = vap->iv_bss; in iwn_auth()
7269 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_auth()
7271 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; in iwn_auth()
7273 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid); in iwn_auth()
7274 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan); in iwn_auth()
7275 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF); in iwn_auth()
7276 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) in iwn_auth()
7277 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ); in iwn_auth()
7283 if (IEEE80211_IS_CHAN_5GHZ(ni->ni_chan)) in iwn_auth()
7284 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT); in iwn_auth()
7285 else if (vap->iv_flags & IEEE80211_F_SHSLOT) in iwn_auth()
7286 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT); in iwn_auth()
7288 if (vap->iv_flags & IEEE80211_F_SHPREAMBLE) in iwn_auth()
7289 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE); in iwn_auth()
7290 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) { in iwn_auth()
7291 sc->rxon->cck_mask = 0; in iwn_auth()
7292 sc->rxon->ofdm_mask = 0x15; in iwn_auth()
7293 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) { in iwn_auth()
7294 sc->rxon->cck_mask = 0x03; in iwn_auth()
7295 sc->rxon->ofdm_mask = 0; in iwn_auth()
7298 sc->rxon->cck_mask = 0x03; in iwn_auth()
7299 sc->rxon->ofdm_mask = 0x15; in iwn_auth()
7303 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, vap, ic->ic_curchan)); in iwn_auth()
7306 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask, in iwn_auth()
7307 sc->rxon->ofdm_mask); in iwn_auth()
7310 device_printf(sc->sc_dev, "%s: could not send RXON\n", in iwn_auth()
7315 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_auth()
7323 struct iwn_ops *ops = &sc->ops; in iwn_run()
7324 struct ieee80211com *ic = &sc->sc_ic; in iwn_run()
7325 struct ieee80211_node *ni = vap->iv_bss; in iwn_run()
7329 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_run()
7331 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX]; in iwn_run()
7332 if (ic->ic_opmode == IEEE80211_M_MONITOR) { in iwn_run()
7338 device_printf(sc->sc_dev, in iwn_run()
7344 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid); in iwn_run()
7345 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd)); in iwn_run()
7346 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan); in iwn_run()
7347 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF); in iwn_run()
7348 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) in iwn_run()
7349 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ); in iwn_run()
7351 /* As previously - short slot only on 5GHz */ in iwn_run()
7352 if (IEEE80211_IS_CHAN_5GHZ(ni->ni_chan)) in iwn_run()
7353 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT); in iwn_run()
7354 else if (vap->iv_flags & IEEE80211_F_SHSLOT) in iwn_run()
7355 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT); in iwn_run()
7357 if (vap->iv_flags & IEEE80211_F_SHPREAMBLE) in iwn_run()
7358 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE); in iwn_run()
7359 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) { in iwn_run()
7360 sc->rxon->cck_mask = 0; in iwn_run()
7361 sc->rxon->ofdm_mask = 0x15; in iwn_run()
7362 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) { in iwn_run()
7363 sc->rxon->cck_mask = 0x03; in iwn_run()
7364 sc->rxon->ofdm_mask = 0; in iwn_run()
7367 sc->rxon->cck_mask = 0x0f; in iwn_run()
7368 sc->rxon->ofdm_mask = 0x15; in iwn_run()
7371 sc->rxon->flags |= htole32(iwn_get_rxon_ht_flags(sc, vap, ni->ni_chan)); in iwn_run()
7372 sc->rxon->filter |= htole32(IWN_FILTER_BSS); in iwn_run()
7374 sc->rxon->chan, le32toh(sc->rxon->flags), vap->iv_curhtprotmode); in iwn_run()
7377 device_printf(sc->sc_dev, "%s: could not send RXON\n", in iwn_run()
7383 ((struct iwn_node *)ni)->id = IWN_ID_BSS; in iwn_run()
7388 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr); in iwn_run()
7390 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) { in iwn_run()
7391 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) { in iwn_run()
7401 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) in iwn_run()
7405 error = ops->add_node(sc, &node, 1); in iwn_run()
7407 device_printf(sc->sc_dev, in iwn_run()
7414 device_printf(sc->sc_dev, in iwn_run()
7421 device_printf(sc->sc_dev, in iwn_run()
7427 sc->calib.state = IWN_CALIB_STATE_ASSOC; in iwn_run()
7428 sc->calib_cnt = 0; in iwn_run()
7429 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout, in iwn_run()
7435 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_run()
7448 struct iwn_softc *sc = ni->ni_ic->ic_softc; in iwn_ampdu_rx_start()
7449 struct iwn_ops *ops = &sc->ops; in iwn_ampdu_rx_start()
7456 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_ampdu_rx_start()
7461 if (wn->id == IWN_ID_UNDEFINED) in iwn_ampdu_rx_start()
7465 node.id = wn->id; in iwn_ampdu_rx_start()
7471 wn->id, tid, ssn); in iwn_ampdu_rx_start()
7472 error = ops->add_node(sc, &node, 1); in iwn_ampdu_rx_start()
7475 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl); in iwn_ampdu_rx_start()
7479 * This function is called by upper layer on teardown of an HT-immediate
7485 struct ieee80211com *ic = ni->ni_ic; in iwn_ampdu_rx_stop()
7486 struct iwn_softc *sc = ic->ic_softc; in iwn_ampdu_rx_stop()
7487 struct iwn_ops *ops = &sc->ops; in iwn_ampdu_rx_stop()
7492 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_ampdu_rx_stop()
7494 if (wn->id == IWN_ID_UNDEFINED) in iwn_ampdu_rx_stop()
7499 if (&ni->ni_rx_ampdu[tid] == rap) in iwn_ampdu_rx_stop()
7504 node.id = wn->id; in iwn_ampdu_rx_stop()
7508 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid); in iwn_ampdu_rx_stop()
7509 (void)ops->add_node(sc, &node, 1); in iwn_ampdu_rx_stop()
7511 sc->sc_ampdu_rx_stop(ni, rap); in iwn_ampdu_rx_stop()
7518 struct iwn_softc *sc = ni->ni_ic->ic_softc; in iwn_addba_request()
7521 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_addba_request()
7523 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) { in iwn_addba_request()
7524 if (sc->qid2tap[qid] == NULL) in iwn_addba_request()
7527 if (qid == sc->ntxqs) { in iwn_addba_request()
7532 tap->txa_private = malloc(sizeof(int), M_DEVBUF, M_NOWAIT); in iwn_addba_request()
7533 if (tap->txa_private == NULL) { in iwn_addba_request()
7534 device_printf(sc->sc_dev, in iwn_addba_request()
7538 sc->qid2tap[qid] = tap; in iwn_addba_request()
7539 *(int *)tap->txa_private = qid; in iwn_addba_request()
7540 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, in iwn_addba_request()
7548 struct iwn_softc *sc = ni->ni_ic->ic_softc; in iwn_addba_response()
7549 int qid = *(int *)tap->txa_private; in iwn_addba_response()
7550 uint8_t tid = tap->txa_tid; in iwn_addba_response()
7553 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_addba_response()
7556 ni->ni_txseqs[tid] = tap->txa_start & 0xfff; in iwn_addba_response()
7557 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid); in iwn_addba_response()
7561 sc->qid2tap[qid] = NULL; in iwn_addba_response()
7562 free(tap->txa_private, M_DEVBUF); in iwn_addba_response()
7563 tap->txa_private = NULL; in iwn_addba_response()
7565 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout); in iwn_addba_response()
7576 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid]; in iwn_ampdu_tx_start()
7577 struct iwn_softc *sc = ni->ni_ic->ic_softc; in iwn_ampdu_tx_start()
7578 struct iwn_ops *ops = &sc->ops; in iwn_ampdu_tx_start()
7583 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_ampdu_tx_start()
7585 if (wn->id == IWN_ID_UNDEFINED) in iwn_ampdu_tx_start()
7589 wn->disable_tid &= ~(1 << tid); in iwn_ampdu_tx_start()
7591 node.id = wn->id; in iwn_ampdu_tx_start()
7594 node.disable_tid = htole16(wn->disable_tid); in iwn_ampdu_tx_start()
7595 error = ops->add_node(sc, &node, 1); in iwn_ampdu_tx_start()
7601 qid = *(int *)tap->txa_private; in iwn_ampdu_tx_start()
7603 __func__, wn->id, tid, tap->txa_start, qid); in iwn_ampdu_tx_start()
7604 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff); in iwn_ampdu_tx_start()
7614 struct iwn_softc *sc = ni->ni_ic->ic_softc; in iwn_ampdu_tx_stop()
7615 struct iwn_ops *ops = &sc->ops; in iwn_ampdu_tx_stop()
7616 uint8_t tid = tap->txa_tid; in iwn_ampdu_tx_stop()
7619 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_ampdu_tx_stop()
7621 sc->sc_addba_stop(ni, tap); in iwn_ampdu_tx_stop()
7623 if (tap->txa_private == NULL) in iwn_ampdu_tx_stop()
7626 qid = *(int *)tap->txa_private; in iwn_ampdu_tx_stop()
7627 if (sc->txq[qid].queued != 0) in iwn_ampdu_tx_stop()
7631 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff); in iwn_ampdu_tx_stop()
7633 sc->qid2tap[qid] = NULL; in iwn_ampdu_tx_stop()
7634 free(tap->txa_private, M_DEVBUF); in iwn_ampdu_tx_stop()
7635 tap->txa_private = NULL; in iwn_ampdu_tx_stop()
7644 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_ampdu_tx_start()
7651 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid), in iwn4965_ampdu_tx_start()
7652 wn->id << 4 | tid); in iwn4965_ampdu_tx_start()
7654 /* Enable chain-building mode for the queue. */ in iwn4965_ampdu_tx_start()
7658 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff); in iwn4965_ampdu_tx_start()
7663 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid), in iwn4965_ampdu_tx_start()
7666 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4, in iwn4965_ampdu_tx_start()
7681 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_ampdu_tx_stop()
7703 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_ampdu_tx_start()
7712 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid), in iwn5000_ampdu_tx_start()
7713 wn->id << 4 | tid); in iwn5000_ampdu_tx_start()
7715 /* Enable chain-building mode for the queue. */ in iwn5000_ampdu_tx_start()
7722 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff); in iwn5000_ampdu_tx_start()
7727 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4, in iwn5000_ampdu_tx_start()
7741 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_ampdu_tx_stop()
7784 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) in iwn5000_query_calibration()
7785 error = msleep(sc, &sc->sc_mtx, PCATCH, "iwncal", 2 * hz); in iwn5000_query_calibration()
7799 if (!(sc->base_params->calib_need & (1<<idx))) { in iwn5000_send_calibration()
7805 if (sc->calibcmd[idx].buf == NULL) { in iwn5000_send_calibration()
7814 sc->calibcmd[idx].len); in iwn5000_send_calibration()
7815 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf, in iwn5000_send_calibration()
7816 sc->calibcmd[idx].len, 0); in iwn5000_send_calibration()
7818 device_printf(sc->sc_dev, in iwn5000_send_calibration()
7833 if (sc->hw_type == IWN_HW_REV_TYPE_6050) { in iwn5000_send_wimax_coex()
7863 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff; in iwn5000_crystal_calib()
7864 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff; in iwn5000_crystal_calib()
7879 if (sc->eeprom_temp != 0) in iwn5000_temp_offset_calib()
7880 cmd.offset = htole16(sc->eeprom_temp); in iwn5000_temp_offset_calib()
7897 if (sc->eeprom_temp != 0) { in iwn5000_temp_offset_calibv2()
7898 cmd.offset_low = htole16(sc->eeprom_temp); in iwn5000_temp_offset_calibv2()
7899 cmd.offset_high = htole16(sc->eeprom_temp_high); in iwn5000_temp_offset_calibv2()
7904 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage); in iwn5000_temp_offset_calibv2()
7927 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_post_alive()
7929 /* Clear TX scheduler state in SRAM. */ in iwn4965_post_alive()
7930 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR); in iwn4965_post_alive()
7931 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0, in iwn4965_post_alive()
7935 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10); in iwn4965_post_alive()
7947 iwn_mem_write(sc, sc->sched_base + in iwn4965_post_alive()
7950 iwn_mem_write(sc, sc->sched_base + in iwn4965_post_alive()
7957 /* Identify TX FIFO rings (0-7). */ in iwn4965_post_alive()
7979 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn5000_post_alive()
7985 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__); in iwn5000_post_alive()
7989 /* Clear TX scheduler state in SRAM. */ in iwn5000_post_alive()
7990 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR); in iwn5000_post_alive()
7991 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0, in iwn5000_post_alive()
7995 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10); in iwn5000_post_alive()
8000 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) in iwn5000_post_alive()
8010 iwn_mem_write(sc, sc->sched_base + in iwn5000_post_alive()
8013 iwn_mem_write(sc, sc->sched_base + in iwn5000_post_alive()
8020 /* Identify TX FIFO rings (0-7). */ in iwn5000_post_alive()
8024 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) { in iwn5000_post_alive()
8044 device_printf(sc->sc_dev, in iwn5000_post_alive()
8049 if (sc->hw_type != IWN_HW_REV_TYPE_5150) { in iwn5000_post_alive()
8053 device_printf(sc->sc_dev, in iwn5000_post_alive()
8059 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) { in iwn5000_post_alive()
8062 device_printf(sc->sc_dev, in iwn5000_post_alive()
8078 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn5000_post_alive()
8116 device_printf(sc->sc_dev, "%s: could not load boot firmware\n", in iwn4965_load_bootcode()
8132 struct iwn_fw_info *fw = &sc->fw; in iwn4965_load_firmware()
8133 struct iwn_dma_info *dma = &sc->fw_dma; in iwn4965_load_firmware()
8136 /* Copy initialization sections into pre-allocated DMA-safe memory. */ in iwn4965_load_firmware()
8137 memcpy(dma->vaddr, fw->init.data, fw->init.datasz); in iwn4965_load_firmware()
8138 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); in iwn4965_load_firmware()
8139 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ, in iwn4965_load_firmware()
8140 fw->init.text, fw->init.textsz); in iwn4965_load_firmware()
8141 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); in iwn4965_load_firmware()
8146 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4); in iwn4965_load_firmware()
8147 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz); in iwn4965_load_firmware()
8149 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4); in iwn4965_load_firmware()
8150 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz); in iwn4965_load_firmware()
8154 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz); in iwn4965_load_firmware()
8156 device_printf(sc->sc_dev, "%s: could not load boot firmware\n", in iwn4965_load_firmware()
8164 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) { in iwn4965_load_firmware()
8165 device_printf(sc->sc_dev, in iwn4965_load_firmware()
8172 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz; in iwn4965_load_firmware()
8173 sc->temp = iwn4965_get_temperature(sc); in iwn4965_load_firmware()
8175 /* Copy runtime sections into pre-allocated DMA-safe memory. */ in iwn4965_load_firmware()
8176 memcpy(dma->vaddr, fw->main.data, fw->main.datasz); in iwn4965_load_firmware()
8177 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); in iwn4965_load_firmware()
8178 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ, in iwn4965_load_firmware()
8179 fw->main.text, fw->main.textsz); in iwn4965_load_firmware()
8180 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); in iwn4965_load_firmware()
8185 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4); in iwn4965_load_firmware()
8186 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz); in iwn4965_load_firmware()
8188 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4); in iwn4965_load_firmware()
8190 IWN_FW_UPDATED | fw->main.textsz); in iwn4965_load_firmware()
8200 struct iwn_dma_info *dma = &sc->fw_dma; in iwn5000_load_firmware_section()
8203 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_load_firmware_section()
8205 /* Copy firmware section into pre-allocated DMA-safe memory. */ in iwn5000_load_firmware_section()
8206 memcpy(dma->vaddr, section, size); in iwn5000_load_firmware_section()
8207 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); in iwn5000_load_firmware_section()
8217 IWN_LOADDR(dma->paddr)); in iwn5000_load_firmware_section()
8219 IWN_HIADDR(dma->paddr) << 28 | size); in iwn5000_load_firmware_section()
8232 return msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", 5 * hz); in iwn5000_load_firmware_section()
8241 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_load_firmware()
8244 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ? in iwn5000_load_firmware()
8245 &sc->fw.main : &sc->fw.init; in iwn5000_load_firmware()
8248 fw->text, fw->textsz); in iwn5000_load_firmware()
8250 device_printf(sc->sc_dev, in iwn5000_load_firmware()
8256 fw->data, fw->datasz); in iwn5000_load_firmware()
8258 device_printf(sc->sc_dev, in iwn5000_load_firmware()
8279 ptr = (const uint32_t *)fw->data; in iwn_read_firmware_leg()
8282 sc->ucode_rev = rev; in iwn_read_firmware_leg()
8286 device_printf(sc->sc_dev, in iwn_read_firmware_leg()
8295 if (fw->size < hdrlen) { in iwn_read_firmware_leg()
8296 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n", in iwn_read_firmware_leg()
8297 __func__, fw->size); in iwn_read_firmware_leg()
8300 fw->main.textsz = le32toh(*ptr++); in iwn_read_firmware_leg()
8301 fw->main.datasz = le32toh(*ptr++); in iwn_read_firmware_leg()
8302 fw->init.textsz = le32toh(*ptr++); in iwn_read_firmware_leg()
8303 fw->init.datasz = le32toh(*ptr++); in iwn_read_firmware_leg()
8304 fw->boot.textsz = le32toh(*ptr++); in iwn_read_firmware_leg()
8307 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz + in iwn_read_firmware_leg()
8308 fw->init.textsz + fw->init.datasz + fw->boot.textsz) { in iwn_read_firmware_leg()
8309 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n", in iwn_read_firmware_leg()
8310 __func__, fw->size); in iwn_read_firmware_leg()
8315 fw->main.text = (const uint8_t *)ptr; in iwn_read_firmware_leg()
8316 fw->main.data = fw->main.text + fw->main.textsz; in iwn_read_firmware_leg()
8317 fw->init.text = fw->main.data + fw->main.datasz; in iwn_read_firmware_leg()
8318 fw->init.data = fw->init.text + fw->init.textsz; in iwn_read_firmware_leg()
8319 fw->boot.text = fw->init.data + fw->init.datasz; in iwn_read_firmware_leg()
8336 if (fw->size < sizeof (*hdr)) { in iwn_read_firmware_tlv()
8337 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n", in iwn_read_firmware_tlv()
8338 __func__, fw->size); in iwn_read_firmware_tlv()
8341 hdr = (const struct iwn_fw_tlv_hdr *)fw->data; in iwn_read_firmware_tlv()
8342 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) { in iwn_read_firmware_tlv()
8343 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n", in iwn_read_firmware_tlv()
8344 __func__, le32toh(hdr->signature)); in iwn_read_firmware_tlv()
8347 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr, in iwn_read_firmware_tlv()
8348 le32toh(hdr->build)); in iwn_read_firmware_tlv()
8349 sc->ucode_rev = le32toh(hdr->rev); in iwn_read_firmware_tlv()
8355 altmask = le64toh(hdr->altmask); in iwn_read_firmware_tlv()
8357 alt--; /* Downgrade. */ in iwn_read_firmware_tlv()
8361 end = (const uint8_t *)(fw->data + fw->size); in iwn_read_firmware_tlv()
8363 /* Parse type-length-value fields. */ in iwn_read_firmware_tlv()
8366 len = le32toh(tlv->len); in iwn_read_firmware_tlv()
8370 device_printf(sc->sc_dev, in iwn_read_firmware_tlv()
8372 fw->size); in iwn_read_firmware_tlv()
8376 if (tlv->alt != 0 && tlv->alt != htole16(alt)) in iwn_read_firmware_tlv()
8379 switch (le16toh(tlv->type)) { in iwn_read_firmware_tlv()
8381 fw->main.text = ptr; in iwn_read_firmware_tlv()
8382 fw->main.textsz = len; in iwn_read_firmware_tlv()
8385 fw->main.data = ptr; in iwn_read_firmware_tlv()
8386 fw->main.datasz = len; in iwn_read_firmware_tlv()
8389 fw->init.text = ptr; in iwn_read_firmware_tlv()
8390 fw->init.textsz = len; in iwn_read_firmware_tlv()
8393 fw->init.data = ptr; in iwn_read_firmware_tlv()
8394 fw->init.datasz = len; in iwn_read_firmware_tlv()
8397 fw->boot.text = ptr; in iwn_read_firmware_tlv()
8398 fw->boot.textsz = len; in iwn_read_firmware_tlv()
8402 sc->sc_flags |= IWN_FLAG_ENH_SENS; in iwn_read_firmware_tlv()
8407 sc->reset_noise_gain = tmp; in iwn_read_firmware_tlv()
8408 sc->noise_gain = tmp + 1; in iwn_read_firmware_tlv()
8412 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT; in iwn_read_firmware_tlv()
8421 sc->tlv_feature_flags = le32toh(*ptr); in iwn_read_firmware_tlv()
8425 sc->tlv_feature_flags); in iwn_read_firmware_tlv()
8438 le16toh(tlv->type)); in iwn_read_firmware_tlv()
8442 "TLV type %d not handled\n", le16toh(tlv->type)); in iwn_read_firmware_tlv()
8445 next: /* TLV fields are 32-bit aligned. */ in iwn_read_firmware_tlv()
8454 struct iwn_fw_info *fw = &sc->fw; in iwn_read_firmware()
8457 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_read_firmware()
8464 sc->fw_fp = firmware_get(sc->fwname); in iwn_read_firmware()
8465 if (sc->fw_fp == NULL) { in iwn_read_firmware()
8466 device_printf(sc->sc_dev, "%s: could not read firmware %s\n", in iwn_read_firmware()
8467 __func__, sc->fwname); in iwn_read_firmware()
8473 fw->size = sc->fw_fp->datasize; in iwn_read_firmware()
8474 fw->data = (const uint8_t *)sc->fw_fp->data; in iwn_read_firmware()
8475 if (fw->size < sizeof (uint32_t)) { in iwn_read_firmware()
8476 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n", in iwn_read_firmware()
8477 __func__, fw->size); in iwn_read_firmware()
8483 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */ in iwn_read_firmware()
8488 device_printf(sc->sc_dev, in iwn_read_firmware()
8494 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev); in iwn_read_firmware()
8497 if (fw->main.textsz > sc->fw_text_maxsz || in iwn_read_firmware()
8498 fw->main.datasz > sc->fw_data_maxsz || in iwn_read_firmware()
8499 fw->init.textsz > sc->fw_text_maxsz || in iwn_read_firmware()
8500 fw->init.datasz > sc->fw_data_maxsz || in iwn_read_firmware()
8501 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ || in iwn_read_firmware()
8502 (fw->boot.textsz & 3) != 0) { in iwn_read_firmware()
8503 device_printf(sc->sc_dev, "%s: firmware sections too large\n", in iwn_read_firmware()
8519 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD); in iwn_unload_firmware()
8520 sc->fw_fp = NULL; in iwn_unload_firmware()
8537 device_printf(sc->sc_dev, in iwn_clock_wait()
8548 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_apm_init()
8562 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + PCIER_LINK_CTL, 4); in iwn_apm_init()
8563 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */ in iwn_apm_init()
8569 if (sc->base_params->pll_cfg_val) in iwn_apm_init()
8570 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val); in iwn_apm_init()
8578 if (sc->hw_type == IWN_HW_REV_TYPE_4965) { in iwn_apm_init()
8589 /* Disable L1-Active. */ in iwn_apm_init()
8608 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__); in iwn_apm_stop_master()
8626 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn4965_nic_config()
8628 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) { in iwn4965_nic_config()
8635 IWN_RFCFG_TYPE(sc->rfcfg) | in iwn4965_nic_config()
8636 IWN_RFCFG_STEP(sc->rfcfg) | in iwn4965_nic_config()
8637 IWN_RFCFG_DASH(sc->rfcfg)); in iwn4965_nic_config()
8650 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn5000_nic_config()
8652 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) { in iwn5000_nic_config()
8654 IWN_RFCFG_TYPE(sc->rfcfg) | in iwn5000_nic_config()
8655 IWN_RFCFG_STEP(sc->rfcfg) | in iwn5000_nic_config()
8656 IWN_RFCFG_DASH(sc->rfcfg)); in iwn5000_nic_config()
8665 if (sc->hw_type == IWN_HW_REV_TYPE_1000) { in iwn5000_nic_config()
8678 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) { in iwn5000_nic_config()
8682 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) { in iwn5000_nic_config()
8686 if (sc->base_params->additional_gp_drv_bit) in iwn5000_nic_config()
8688 sc->base_params->additional_gp_drv_bit); in iwn5000_nic_config()
8700 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_hw_prepare()
8736 struct iwn_ops *ops = &sc->ops; in iwn_hw_init()
8739 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_hw_init()
8745 device_printf(sc->sc_dev, in iwn_hw_init()
8757 /* Perform adapter-specific initialization. */ in iwn_hw_init()
8758 if ((error = ops->nic_config(sc)) != 0) in iwn_hw_init()
8766 /* Set physical address of RX ring (256-byte aligned). */ in iwn_hw_init()
8767 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8); in iwn_hw_init()
8768 /* Set physical address of RX status (16-byte aligned). */ in iwn_hw_init()
8769 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4); in iwn_hw_init()
8779 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7); in iwn_hw_init()
8785 iwn_prph_write(sc, sc->sched_txfact_addr, 0); in iwn_hw_init()
8787 /* Set physical address of "keep warm" page (16-byte aligned). */ in iwn_hw_init()
8788 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4); in iwn_hw_init()
8791 for (qid = 0; qid < sc->ntxqs; qid++) { in iwn_hw_init()
8792 struct iwn_tx_ring *txq = &sc->txq[qid]; in iwn_hw_init()
8794 /* Set physical address of TX ring (256-byte aligned). */ in iwn_hw_init()
8796 txq->desc_dma.paddr >> 8); in iwn_hw_init()
8801 for (chnl = 0; chnl < sc->ndmachnls; chnl++) { in iwn_hw_init()
8816 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask); in iwn_hw_init()
8823 if (sc->base_params->shadow_reg_enable) in iwn_hw_init()
8826 if ((error = ops->load_firmware(sc)) != 0) { in iwn_hw_init()
8827 device_printf(sc->sc_dev, in iwn_hw_init()
8833 if ((error = msleep(sc, &sc->sc_mtx, PCATCH, "iwninit", hz)) != 0) { in iwn_hw_init()
8834 device_printf(sc->sc_dev, in iwn_hw_init()
8839 /* Do post-firmware initialization. */ in iwn_hw_init()
8841 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_hw_init()
8843 return ops->post_alive(sc); in iwn_hw_init()
8851 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_hw_stop()
8859 sc->sc_flags &= ~IWN_FLAG_USE_ICT; in iwn_hw_stop()
8865 iwn_prph_write(sc, sc->sched_txfact_addr, 0); in iwn_hw_stop()
8869 for (chnl = 0; chnl < sc->ndmachnls; chnl++) { in iwn_hw_stop()
8882 iwn_reset_rx_ring(sc, &sc->rxq); in iwn_hw_stop()
8885 for (qid = 0; qid < sc->ntxqs; qid++) in iwn_hw_stop()
8886 iwn_reset_tx_ring(sc, &sc->txq[qid]); in iwn_hw_stop()
8902 struct ieee80211com *ic = &sc->sc_ic; in iwn_panicked()
8903 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwn_panicked()
8913 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; " in iwn_panicked()
8914 "restarting\n", __func__, vap->iv_state); in iwn_panicked()
8930 device_printf(sc->sc_dev, in iwn_panicked()
8934 if (vap->iv_state >= IEEE80211_S_AUTH && in iwn_panicked()
8936 device_printf(sc->sc_dev, in iwn_panicked()
8939 if (vap->iv_state >= IEEE80211_S_RUN && in iwn_panicked()
8941 device_printf(sc->sc_dev, in iwn_panicked()
8955 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); in iwn_init_locked()
8959 if (sc->sc_flags & IWN_FLAG_RUNNING) in iwn_init_locked()
8962 sc->sc_flags |= IWN_FLAG_RUNNING; in iwn_init_locked()
8965 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n", in iwn_init_locked()
8971 sc->int_mask = IWN_INT_MASK_DEF; in iwn_init_locked()
8972 sc->sc_flags &= ~IWN_FLAG_USE_ICT; in iwn_init_locked()
8977 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_init_locked()
8984 device_printf(sc->sc_dev, in iwn_init_locked()
8994 device_printf(sc->sc_dev, in iwn_init_locked()
9002 device_printf(sc->sc_dev, in iwn_init_locked()
9008 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc); in iwn_init_locked()
9011 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__); in iwn_init_locked()
9018 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__); in iwn_init_locked()
9020 return (-1); in iwn_init_locked()
9041 if (!(sc->sc_flags & IWN_FLAG_RUNNING)) in iwn_stop_locked()
9044 sc->sc_is_scanning = 0; in iwn_stop_locked()
9045 sc->sc_tx_timer = 0; in iwn_stop_locked()
9046 callout_stop(&sc->watchdog_to); in iwn_stop_locked()
9047 callout_stop(&sc->scan_timeout); in iwn_stop_locked()
9048 callout_stop(&sc->calib_to); in iwn_stop_locked()
9049 sc->sc_flags &= ~IWN_FLAG_RUNNING; in iwn_stop_locked()
9069 struct iwn_softc *sc = ic->ic_softc; in iwn_scan_start()
9083 struct iwn_softc *sc = ic->ic_softc; in iwn_scan_end()
9084 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwn_scan_end()
9087 if (vap->iv_state == IEEE80211_S_RUN) { in iwn_scan_end()
9100 struct iwn_softc *sc = ic->ic_softc; in iwn_set_channel()
9103 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); in iwn_set_channel()
9110 if (ic->ic_opmode == IEEE80211_M_MONITOR) { in iwn_set_channel()
9113 device_printf(sc->sc_dev, in iwn_set_channel()
9125 struct ieee80211vap *vap = ss->ss_vap; in iwn_scan_curchan()
9126 struct ieee80211com *ic = vap->iv_ic; in iwn_scan_curchan()
9127 struct iwn_softc *sc = ic->ic_softc; in iwn_scan_curchan()
9131 error = iwn_scan(sc, vap, ss, ic->ic_curchan); in iwn_scan_curchan()