Lines Matching +full:smbus +full:- +full:timeout +full:- +full:disable
1 /*-
36 #include <dev/smbus/smbconf.h>
52 device_t smbus;
61 #define INTSMB_LOCK(sc) mtx_lock(&(sc)->lock)
62 #define INTSMB_UNLOCK(sc) mtx_unlock(&(sc)->lock)
63 #define INTSMB_LOCK_ASSERT(sc) mtx_assert(&(sc)->lock, MA_OWNED)
92 { 0x71138086, "Intel PIIX4 SMBUS Interface" },
93 { 0x719b8086, "Intel PIIX4 SMBUS Interface" },
98 { 0x43721002, "ATI IXP400 SMBus Controller" },
99 { AMDSB_SMBUS_DEVID, "AMD SB600/7xx/8xx/9xx SMBus Controller" },
100 { AMDFCH_SMBUS_DEVID, "AMD FCH SMBus Controller" },
101 { AMDCZ_SMBUS_DEVID, "AMD FCH SMBus Controller" },
102 { HYGONCZ_SMBUS_DEVID, "Hygon FCH SMBus Controller" },
115 if (isd->devid == devid) {
116 device_set_desc(dev, isd->description);
179 device_printf(dev, "SB8xx/SB9xx/FCH SMBus not enabled\n");
183 sc->io_rid = 0;
184 rc = bus_set_resource(dev, SYS_RES_IOPORT, sc->io_rid, addr,
187 device_printf(dev, "bus_set_resource for SMBus IO failed\n");
190 sc->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &sc->io_rid,
192 if (sc->io_res == NULL) {
196 sc->poll = 1;
205 if (sc->smbus)
206 device_delete_child(dev, sc->smbus);
207 if (sc->irq_hand)
208 bus_teardown_intr(dev, sc->irq_res, sc->irq_hand);
209 if (sc->irq_res)
210 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
211 if (sc->io_res)
212 bus_release_resource(dev, SYS_RES_IOPORT, sc->io_rid,
213 sc->io_res);
214 mtx_destroy(&sc->lock);
225 sc->dev = dev;
227 mtx_init(&sc->lock, device_get_nameunit(dev), "intsmb", MTX_DEF);
229 sc->cfg_irq9 = 0;
235 sc->cfg_irq9 = 1;
240 sc->sb8xx = 1;
245 sc->sb8xx = 1;
249 if (sc->sb8xx) {
257 sc->io_rid = PCI_BASE_ADDR_SMB;
258 sc->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &sc->io_rid,
260 if (sc->io_res == NULL) {
266 if (sc->cfg_irq9) {
272 sc->poll = (value & PCI_INTR_SMB_ENABLE) == 0;
289 sc->poll == 0 ? "enabled" : "disabled");
292 if (!sc->poll && intr == PCI_INTR_SMB_SMI) {
295 sc->poll = 1;
298 if (sc->poll)
309 if (sc->cfg_irq9)
312 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
314 if (sc->irq_res == NULL) {
320 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
321 NULL, intsmb_rawintr, sc, &sc->irq_hand);
328 sc->isbusy = 0;
329 sc->smbus = device_add_child(dev, "smbus", DEVICE_UNIT_ANY);
330 if (sc->smbus == NULL) {
331 device_printf(dev, "failed to add smbus child\n");
335 error = device_probe_and_attach(sc->smbus);
337 device_printf(dev, "failed to probe+attach smbus child\n");
343 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, PIIX4_SMBSLVCNT_ALTEN);
401 if ((bus_read_1(sc->io_res, PIIX4_SMBHSTSTS) & PIIX4_SMBHSTSTAT_BUSY) ||
403 (bus_read_1(sc->io_res, PIIX4_SMBSLVSTS) & PIIX4_SMBSLVSTS_BUSY) ||
405 sc->isbusy)
408 sc->isbusy = 1;
409 /* Disable Interrupt in slave part. */
411 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, 0);
414 bus_write_1(sc->io_res, PIIX4_SMBHSTSTS,
425 status = bus_read_1(sc->io_res, PIIX4_SMBHSTSTS);
432 tmp = bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);
433 bus_write_1(sc->io_res, PIIX4_SMBHSTCNT,
435 if (sc->isbusy) {
436 sc->isbusy = 0;
449 status = bus_read_1(sc->io_res, PIIX4_SMBSLVSTS);
459 bus_write_1(sc->io_res, PIIX4_SMBSLVSTS,
475 slvcnt = bus_read_1(sc->io_res, PIIX4_SMBSLVCNT);
477 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT,
488 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, SMBALTRESP | LSB);
492 device_printf(sc->dev, "ALART: ERROR\n");
494 addr = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);
495 device_printf(sc->dev, "ALART_RESPONSE: 0x%x\n", addr);
498 /* Re-enable INTR from ALART. */
499 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT,
511 tmp = bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);
517 if (!sc->poll && !cold && !nointr)
519 bus_write_1(sc->io_res, PIIX4_SMBHSTCNT, tmp);
529 * - SMB_ENOACK ("Unclaimed cycle"),
530 * - SMB_ETIMEOUT ("Host device time-out"),
531 * - SMB_EINVAL ("Illegal command field").
564 if (bus_read_1(sc->io_res, PIIX4_SMBHSTSTS) &
570 status = bus_read_1(sc->io_res, PIIX4_SMBHSTSTS);
572 sc->isbusy = 0;
573 error = intsmb_error(sc->dev, status);
579 sc->isbusy = 0;
580 tmp = bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);
581 bus_write_1(sc->io_res, PIIX4_SMBHSTCNT, tmp & ~PIIX4_SMBHSTCNT_INTREN);
595 if (sc->poll || cold)
596 /* So that it can use device during device probe on SMBus. */
599 error = msleep(sc, &sc->lock, PWAIT | PCATCH, "SMBWAI", hz / 8);
601 status = bus_read_1(sc->io_res, PIIX4_SMBHSTSTS);
603 error = intsmb_error(sc->dev, status);
605 device_printf(sc->dev, "unknown cause why?\n");
607 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT,
614 /* Timeout Procedure. */
615 sc->isbusy = 0;
617 /* Re-enable suppressed interrupt from slave part. */
618 bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, PIIX4_SMBSLVCNT_ALTEN);
652 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, data);
671 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave & ~LSB);
672 bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, byte);
691 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave | LSB);
697 * Linux SMBus stuff also troubles
700 *byte = bus_read_1(sc->io_res, PIIX4_SMBHSTCMD);
702 *byte = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);
721 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave & ~LSB);
722 bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);
723 bus_write_1(sc->io_res, PIIX4_SMBHSTDAT0, byte);
742 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave & ~LSB);
743 bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);
744 bus_write_1(sc->io_res, PIIX4_SMBHSTDAT0, word & 0xff);
745 bus_write_1(sc->io_res, PIIX4_SMBHSTDAT1, (word >> 8) & 0xff);
764 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave | LSB);
765 bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);
769 *byte = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);
786 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave | LSB);
787 bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);
791 *word = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);
792 *word |= bus_read_1(sc->io_res, PIIX4_SMBHSTDAT1) << 8;
822 bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);
824 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave & ~LSB);
825 bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);
827 bus_write_1(sc->io_res, PIIX4_SMBBLKDAT, buf[i]);
828 bus_write_1(sc->io_res, PIIX4_SMBHSTDAT0, count);
850 bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);
852 bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave | LSB);
853 bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);
857 nread = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);
861 bus_read_1(sc->io_res, PIIX4_SMBBLKDAT);
875 /* SMBus interface */
898 DRIVER_MODULE(smbus, intsmb, smbus_driver, 0, 0);
899 MODULE_DEPEND(intsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);