112 #define WR2(sc, off, val)	(bus_write_2((sc)->mem_res, (off), (val)))  macro
224 	WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow);  in cdnc_i2c_set_freq()
238 	WR2(sc, CDNC_I2C_CR, CDNC_I2C_CR_CLR_FIFO);  in cdnc_i2c_init_hw()
242 	WR2(sc, CDNC_I2C_ISR, CDNC_I2C_ISR_ALL);  in cdnc_i2c_init_hw()
243 	WR2(sc, CDNC_I2C_IDR, CDNC_I2C_ISR_ALL);  in cdnc_i2c_init_hw()
262 	WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow | CDNC_I2C_CR_CLR_FIFO);  in cdnc_i2c_errs()
313 	WR2(sc, CDNC_I2C_ISR, status);  in cdnc_i2c_intr()
348 	WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow | CDNC_I2C_CR_CLR_FIFO);  in cdnc_i2c_xfer_rd()
359 			WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow);  in cdnc_i2c_xfer_rd()
365 			WR2(sc, CDNC_I2C_ADDR, msg->slave >> 1);  in cdnc_i2c_xfer_rd()
370 			WR2(sc, CDNC_I2C_IER, CDNC_I2C_ISR_XFER_DONE |  in cdnc_i2c_xfer_rd()
373 			WR2(sc, CDNC_I2C_IER, CDNC_I2C_ISR_XFER_DATA |  in cdnc_i2c_xfer_rd()
379 		WR2(sc, CDNC_I2C_IDR, CDNC_I2C_ISR_XFER_DATA |  in cdnc_i2c_xfer_rd()
422 	WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow | CDNC_I2C_CR_CLR_FIFO);  in cdnc_i2c_xfer_wr()
431 			WR2(sc, CDNC_I2C_DATA, msg->buf[idx++]);  in cdnc_i2c_xfer_wr()
437 			WR2(sc, CDNC_I2C_CR, sc->cfg_reg_shadow);  in cdnc_i2c_xfer_wr()
443 			WR2(sc, CDNC_I2C_ADDR, msg->slave >> 1);  in cdnc_i2c_xfer_wr()
447 		WR2(sc, CDNC_I2C_IER, CDNC_I2C_ISR_XFER_DONE |  in cdnc_i2c_xfer_wr()
454 		WR2(sc, CDNC_I2C_IDR, CDNC_I2C_ISR_XFER_DONE |  in cdnc_i2c_xfer_wr()
639 		WR2(sc, CDNC_I2C_CR, CDNC_I2C_CR_CLR_FIFO);  in cdnc_i2c_detach()
642 		WR2(sc, CDNC_I2C_ISR, CDNC_I2C_ISR_ALL);  in cdnc_i2c_detach()
643 		WR2(sc, CDNC_I2C_IDR, CDNC_I2C_ISR_ALL);  in cdnc_i2c_detach()