Lines Matching full:rx
34 #define IGC_RCTL 0x00100 /* Rx Control - RW */
37 #define IGC_RXCW 0x00180 /* Rx Configuration Word - RO */
67 #define IGC_ERT 0x02008 /* Early Rx Threshold - RW */
71 #define IGC_RDFH 0x02410 /* Rx Data FIFO Head - RW */
72 #define IGC_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
73 #define IGC_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
74 #define IGC_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
75 #define IGC_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
76 #define IGC_PBRTH 0x02458 /* PB Rx Arbitration Threshold - RW */
78 /* Split and Replication Rx Control - RW */
79 #define IGC_RXPBS 0x02404 /* Rx Packet Buffer Size - RW */
129 #define IGC_RSRPD 0x02C00 /* Rx Small Packet Detect - RW */
164 #define IGC_XONRXC 0x04048 /* XON Rx Count - R/clr */
166 #define IGC_XOFFRXC 0x04050 /* XOFF Rx Count - R/clr */
168 #define IGC_FCRUC 0x04058 /* Flow Control Rx Unsupported Count- R/clr */
169 #define IGC_PRC64 0x0405C /* Packets Rx (64 bytes) - R/clr */
170 #define IGC_PRC127 0x04060 /* Packets Rx (65-127 bytes) - R/clr */
171 #define IGC_PRC255 0x04064 /* Packets Rx (128-255 bytes) - R/clr */
172 #define IGC_PRC511 0x04068 /* Packets Rx (255-511 bytes) - R/clr */
173 #define IGC_PRC1023 0x0406C /* Packets Rx (512-1023 bytes) - R/clr */
174 #define IGC_PRC1522 0x04070 /* Packets Rx (1024-1522 bytes) - R/clr */
175 #define IGC_GPRC 0x04074 /* Good Packets Rx Count - R/clr */
176 #define IGC_BPRC 0x04078 /* Broadcast Packets Rx Count - R/clr */
177 #define IGC_MPRC 0x0407C /* Multicast Packets Rx Count - R/clr */
179 #define IGC_GORCL 0x04088 /* Good Octets Rx Count Low - R/clr */
180 #define IGC_GORCH 0x0408C /* Good Octets Rx Count High - R/clr */
183 #define IGC_RNBC 0x040A0 /* Rx No Buffers Count - R/clr */
184 #define IGC_RUC 0x040A4 /* Rx Undersize Count - R/clr */
185 #define IGC_RFC 0x040A8 /* Rx Fragment Count - R/clr */
186 #define IGC_ROC 0x040AC /* Rx Oversize Count - R/clr */
187 #define IGC_RJC 0x040B0 /* Rx Jabber Count - R/clr */
188 #define IGC_MGTPRC 0x040B4 /* Management Packets Rx Count - R/clr */
191 #define IGC_TORL 0x040C0 /* Total Octets Rx Low - R/clr */
192 #define IGC_TORH 0x040C4 /* Total Octets Rx High - R/clr */
195 #define IGC_TPR 0x040D0 /* Total Packets Rx - R/clr */
207 #define IGC_RXDMTC 0x04120 /* Rx Descriptor Minimum Threshold Count */
225 #define IGC_RXCSUM 0x05000 /* Rx Checksum Control - RW */
226 #define IGC_RLPML 0x05004 /* Rx Long Packet Max Length */
282 #define IGC_IMIRVP 0x05AC0 /* Immediate INT Rx VLAN Priority -RW */
291 #define IGC_TSYNCRXCTL 0x0B620 /* Rx Time Sync Control register - RW */
293 #define IGC_TSYNCRXCFG 0x05F50 /* Time Sync Rx Configuration - RW */
294 #define IGC_RXSTMPL 0x0B624 /* Rx timestamp Low - RO */
295 #define IGC_RXSTMPH 0x0B628 /* Rx timestamp High - RO */
296 #define IGC_RXSATRL 0x0B62C /* Rx timestamp attribute low - RO */
297 #define IGC_RXSATRH 0x0B630 /* Rx timestamp attribute high - RO */
329 #define IGC_RTRPCS 0x2474 /* Rx packet plane control and status */
330 #define IGC_RTRUP2TC 0x05AC4 /* Rx User Priority to Traffic Class */
336 /* Rx Packet plane TC Rate-Scheduler Config */
346 /* Rx Packet plane TC Rate-Scheduler Status */
348 /* Rx Packet plane TC Rate-Scheduler MMW */
362 #define IGC_RTRBCNCR 0xB20C /* Rx BCN Control Register */
374 #define IGC_DMCCNT 0x05DD4 /* Current Rx Count */
375 #define IGC_FCRTC 0x02170 /* Flow Control Rx high watermark */
397 #define IGC_RLPIC 0x414C /* EEE Rx LPI Count - RLPIC */