1 /*-
4  * SPDX-License-Identifier: BSD-3-Clause
13  *  igc_init_mac_ops_generic - Initialize MAC function pointers
16  *  Setups up the function pointers to no-op functions
20 	struct igc_mac_info *mac = &hw->mac;  in igc_init_mac_ops_generic()  local
24 	mac->ops.init_params = igc_null_ops_generic;  in igc_init_mac_ops_generic()
25 	mac->ops.config_collision_dist = igc_config_collision_dist_generic;  in igc_init_mac_ops_generic()
26 	mac->ops.rar_set = igc_rar_set_generic;  in igc_init_mac_ops_generic()
30  *  igc_null_ops_generic - No-op function, returns 0
40  *  igc_null_mac_generic - No-op function, return void
50  *  igc_null_link_info - No-op function, return 0
63  *  igc_null_mng_mode - No-op function, return false
73  *  igc_null_update_mc - No-op function, return void
86  *  igc_null_write_vfta - No-op function, return void
99  *  igc_null_rar_set - No-op function, return 0
112  *  igc_set_lan_id_single_port - Set LAN id for a single port device
119 	struct igc_bus_info *bus = &hw->bus;  in igc_set_lan_id_single_port()
121 	bus->func = 0;  in igc_set_lan_id_single_port()
125  *  igc_clear_vfta_generic - Clear VLAN filter table
144  *  igc_write_vfta_generic - Write value to VLAN filter table
161  *  igc_init_rx_addrs_generic - Initialize receive address's
163  *  @rar_count: receive address registers
165  *  Setup the receive address registers by setting the base receive address
166  *  register to the devices MAC address and clearing all the other receive
167  *  address registers to 0.
176 	/* Setup the receive address */  in igc_init_rx_addrs_generic()
177 	DEBUGOUT("Programming MAC Address into RAR[0]\n");  in igc_init_rx_addrs_generic()
179 	hw->mac.ops.rar_set(hw, hw->mac.addr, 0);  in igc_init_rx_addrs_generic()
181 	/* Zero out the other (rar_entry_count - 1) receive addresses */  in igc_init_rx_addrs_generic()
182 	DEBUGOUT1("Clearing RAR[1-%u]\n", rar_count-1);  in igc_init_rx_addrs_generic()
184 		hw->mac.ops.rar_set(hw, mac_addr, i);  in igc_init_rx_addrs_generic()
188  *  igc_check_alt_mac_addr_generic - Check for alternate MAC addr
191  *  Checks the nvm for an alternate MAC address.  An alternate MAC address
192  *  can be setup by pre-boot software and must be treated like a permanent
193  *  address and must override the actual permanent MAC address. If an
194  *  alternate MAC address is found it is programmed into RAR0, replacing
195  *  the permanent address that was installed into RAR0 by the Si on reset.
208 	ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data);  in igc_check_alt_mac_addr_generic()
213 	ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,  in igc_check_alt_mac_addr_generic()
222 		/* There is no Alternate MAC Address */  in igc_check_alt_mac_addr_generic()
225 	if (hw->bus.func == IGC_FUNC_1)  in igc_check_alt_mac_addr_generic()
229 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);  in igc_check_alt_mac_addr_generic()
239 	/* if multicast bit is set, the alternate address will not be used */  in igc_check_alt_mac_addr_generic()
241 		DEBUGOUT("Ignoring Alternate Mac Address with MC bit set\n");  in igc_check_alt_mac_addr_generic()
245 	/* We have a valid alternate MAC address, and we want to treat it the  in igc_check_alt_mac_addr_generic()
246 	 * same as the normal permanent MAC address stored by the HW into the  in igc_check_alt_mac_addr_generic()
247 	 * RAR. Do this by mapping this address into RAR0.  in igc_check_alt_mac_addr_generic()
249 	hw->mac.ops.rar_set(hw, alt_mac_addr, 0);  in igc_check_alt_mac_addr_generic()
255  *  igc_rar_set_generic - Set receive address register
257  *  @addr: pointer to the receive address
258  *  @index: receive address array register
260  *  Sets the receive address array register at index to the address passed
277 	/* If MAC address zero, no need to set the AV bit */  in igc_rar_set_generic()
281 	/* Some bridges will combine consecutive 32-bit writes into  in igc_rar_set_generic()
294  *  igc_hash_mc_addr_generic - Generate a multicast hash value
296  *  @mc_addr: pointer to a multicast address
298  *  Generates a multicast address hash value which is used to determine
299  *  the multicast filter table array address and new table value.
309 	hash_mask = (hw->mac.mta_reg_count * 32) - 1;  in igc_hash_mc_addr_generic()
311 	/* For a mc_filter_type of 0, bit_shift is the number of left-shifts  in igc_hash_mc_addr_generic()
317 	/* The portion of the address that is used for the hash table  in igc_hash_mc_addr_generic()
321 	 * left-shifts where the MSB of mc_addr[5] would still fall within  in igc_hash_mc_addr_generic()
324 	 * remaining number of bits. Thus 8 - bit_shift.  The rest of the  in igc_hash_mc_addr_generic()
327 	 * 8-bit shifting total.  in igc_hash_mc_addr_generic()
329 	 * For example, given the following Destination MAC Address and an  in igc_hash_mc_addr_generic()
330 	 * mta register count of 128 (thus a 4096-bit vector and 0xFFF mask),  in igc_hash_mc_addr_generic()
342 	switch (hw->mac.mc_filter_type) {  in igc_hash_mc_addr_generic()
357 	hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |  in igc_hash_mc_addr_generic()
364  *  igc_update_mc_addr_list_generic - Update Multicast addresses
381 	memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));  in igc_update_mc_addr_list_generic()
387 		hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);  in igc_update_mc_addr_list_generic()
390 		hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit);  in igc_update_mc_addr_list_generic()
395 	for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)  in igc_update_mc_addr_list_generic()
396 		IGC_WRITE_REG_ARRAY(hw, IGC_MTA, i, hw->mac.mta_shadow[i]);  in igc_update_mc_addr_list_generic()
401  *  igc_clear_hw_cntrs_base_generic - Clear base hardware counters
452  *  igc_check_for_copper_link_generic - Check for link (Copper)
461 	struct igc_mac_info *mac = &hw->mac;  in igc_check_for_copper_link_generic()  local
467 	/* We only want to go out to the PHY registers to see if Auto-Neg  in igc_check_for_copper_link_generic()
472 	if (!mac->get_link_status)  in igc_check_for_copper_link_generic()
486 	mac->get_link_status = false;  in igc_check_for_copper_link_generic()
489 	 * immediately after link-up  in igc_check_for_copper_link_generic()
496 	if (!mac->autoneg)  in igc_check_for_copper_link_generic()
497 		return -IGC_ERR_CONFIG;  in igc_check_for_copper_link_generic()
499 	/* Auto-Neg is enabled.  Auto Speed Detection takes care  in igc_check_for_copper_link_generic()
500 	 * of MAC speed/duplex configuration.  So we only need to  in igc_check_for_copper_link_generic()
501 	 * configure Collision Distance in the MAC.  in igc_check_for_copper_link_generic()
503 	mac->ops.config_collision_dist(hw);  in igc_check_for_copper_link_generic()
505 	/* Configure Flow Control now that Auto-Neg has completed.  in igc_check_for_copper_link_generic()
507 	 * settings because we may have had to re-autoneg with a  in igc_check_for_copper_link_generic()
518  *  igc_setup_link_generic - Setup flow control and link settings
522  *  control.  Calls the appropriate media-specific link configuration
536 	if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))  in igc_setup_link_generic()
542 	if (hw->fc.requested_mode == igc_fc_default) {  in igc_setup_link_generic()
543 		hw->fc.requested_mode = igc_fc_full;  in igc_setup_link_generic()
546 	/* Save off the requested flow control mode for use later.  Depending  in igc_setup_link_generic()
549 	hw->fc.current_mode = hw->fc.requested_mode;  in igc_setup_link_generic()
551 	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",  in igc_setup_link_generic()
552 		hw->fc.current_mode);  in igc_setup_link_generic()
555 	ret_val = hw->mac.ops.setup_physical_interface(hw);  in igc_setup_link_generic()
559 	/* Initialize the flow control address, type, and PAUSE timer  in igc_setup_link_generic()
564 	DEBUGOUT("Initializing the Flow Control address, type and timer regs\n");  in igc_setup_link_generic()
569 	IGC_WRITE_REG(hw, IGC_FCTTV, hw->fc.pause_time);  in igc_setup_link_generic()
575  *  igc_config_collision_dist_generic - Configure collision distance
597  *  igc_set_fc_watermarks_generic - Set flow control high/low watermarks
616 	if (hw->fc.current_mode & igc_fc_tx_pause) {  in igc_set_fc_watermarks_generic()
621 		fcrtl = hw->fc.low_water;  in igc_set_fc_watermarks_generic()
622 		if (hw->fc.send_xon)  in igc_set_fc_watermarks_generic()
625 		fcrth = hw->fc.high_water;  in igc_set_fc_watermarks_generic()
634  *  igc_force_mac_fc_generic - Force the MAC's flow control settings
637  *  Force the MAC's flow control settings.  Sets the TFCE and RFCE bits in the
640  *  autonegotiation is managed by the PHY rather than the MAC.  Software must
651 	/* Because we didn't get link via the internal auto-negotiation  in igc_force_mac_fc_generic()
653 	 * auto-neg), we have to manually enable/disable transmit an  in igc_force_mac_fc_generic()
657 	 * according to the "hw->fc.current_mode" parameter.  in igc_force_mac_fc_generic()
668 	DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode);  in igc_force_mac_fc_generic()
670 	switch (hw->fc.current_mode) {  in igc_force_mac_fc_generic()
687 		return -IGC_ERR_CONFIG;  in igc_force_mac_fc_generic()
696  *  igc_config_fc_after_link_up_generic - Configures flow control after link
699  *  Checks the status of auto-negotiation after link up to ensure that the
701  *  flow control needs to be forced also.  If auto-negotiation is enabled
707 	struct igc_mac_info *mac = &hw->mac;  in igc_config_fc_after_link_up_generic()  local
719 	/* Check for the case where we have copper media and auto-neg is  in igc_config_fc_after_link_up_generic()
720 	 * enabled.  In this case, we need to check and see if Auto-Neg  in igc_config_fc_after_link_up_generic()
724 	if (mac->autoneg) {  in igc_config_fc_after_link_up_generic()
729 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);  in igc_config_fc_after_link_up_generic()
732 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);  in igc_config_fc_after_link_up_generic()
743 		 * Register (Address 4) and the Auto_Negotiation Base  in igc_config_fc_after_link_up_generic()
744 		 * Page Ability Register (Address 5) to determine how  in igc_config_fc_after_link_up_generic()
747 		ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,  in igc_config_fc_after_link_up_generic()
751 		ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,  in igc_config_fc_after_link_up_generic()
757 		 * (Address 4) and two bits in the Auto Negotiation Base  in igc_config_fc_after_link_up_generic()
758 		 * Page Ability Register (Address 5) determine flow control  in igc_config_fc_after_link_up_generic()
767 		 *-------|---------|-------|---------|--------------------  in igc_config_fc_after_link_up_generic()
785 		 *-------|---------|-------|---------|--------------------  in igc_config_fc_after_link_up_generic()
797 			if (hw->fc.requested_mode == igc_fc_full) {  in igc_config_fc_after_link_up_generic()
798 				hw->fc.current_mode = igc_fc_full;  in igc_config_fc_after_link_up_generic()
801 				hw->fc.current_mode = igc_fc_rx_pause;  in igc_config_fc_after_link_up_generic()
809 		 *-------|---------|-------|---------|--------------------  in igc_config_fc_after_link_up_generic()
816 			hw->fc.current_mode = igc_fc_tx_pause;  in igc_config_fc_after_link_up_generic()
823 		 *-------|---------|-------|---------|--------------------  in igc_config_fc_after_link_up_generic()
830 			hw->fc.current_mode = igc_fc_rx_pause;  in igc_config_fc_after_link_up_generic()
836 			hw->fc.current_mode = igc_fc_none;  in igc_config_fc_after_link_up_generic()
840 		/* Now we need to do one last check...  If we auto-  in igc_config_fc_after_link_up_generic()
844 		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);  in igc_config_fc_after_link_up_generic()
851 			hw->fc.current_mode = igc_fc_none;  in igc_config_fc_after_link_up_generic()
853 		/* Now we call a subroutine to actually force the MAC  in igc_config_fc_after_link_up_generic()
867  *  igc_get_speed_and_duplex_copper_generic - Retrieve current speed/duplex
888 		if ((hw->mac.type == igc_i225) &&  in igc_get_speed_and_duplex_copper_generic()
916  *  igc_get_hw_semaphore_generic - Acquire hardware semaphore
924 	s32 timeout = hw->nvm.word_size + 1;  in igc_get_hw_semaphore_generic()
940 		DEBUGOUT("Driver can't access device - SMBI bit is set.\n");  in igc_get_hw_semaphore_generic()
941 		return -IGC_ERR_NVM;  in igc_get_hw_semaphore_generic()
960 		return -IGC_ERR_NVM;  in igc_get_hw_semaphore_generic()
967  *  igc_put_hw_semaphore_generic - Release hardware semaphore
986  *  igc_get_auto_rd_done_generic - Check for auto read completion
1006 		return -IGC_ERR_RESET;  in igc_get_auto_rd_done_generic()
1013  *  igc_disable_pcie_master_generic - Disables PCI-express master access
1016  *  Returns IGC_SUCCESS if successful, else returns -10
1017  *  (-IGC_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
1020  *  Disables PCI-Express master access and verifies there are no pending
1039 		timeout--;  in igc_disable_pcie_master_generic()
1044 		return -IGC_ERR_MASTER_REQUESTS_PENDING;  in igc_disable_pcie_master_generic()