75 	return IGC_SUCCESS;  in igc_init_nvm_params_i225()
126 	return IGC_SUCCESS;  in igc_init_mac_params_i225()
136 	s32 ret_val = IGC_SUCCESS;  in igc_init_phy_params_i225()
275 	s32 ret_val = IGC_SUCCESS;  in igc_acquire_swfw_sync_i225()
326 	while (igc_get_hw_semaphore_i225(hw) != IGC_SUCCESS)  in igc_release_swfw_sync_i225()
432 	return IGC_SUCCESS;  in igc_get_hw_semaphore_i225()
447 	s32 status = IGC_SUCCESS;  in igc_read_nvm_srrd_i225()
459 		if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {  in igc_read_nvm_srrd_i225()
467 		if (status != IGC_SUCCESS)  in igc_read_nvm_srrd_i225()
492 	s32 status = IGC_SUCCESS;  in igc_write_nvm_srwr_i225()
504 		if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {  in igc_write_nvm_srwr_i225()
512 		if (status != IGC_SUCCESS)  in igc_write_nvm_srwr_i225()
536 	s32 ret_val = IGC_SUCCESS;  in __igc_write_nvm_srwr()
560 				ret_val = IGC_SUCCESS;  in __igc_write_nvm_srwr()
566 		if (ret_val != IGC_SUCCESS) {  in __igc_write_nvm_srwr()
584 	s32 status = IGC_SUCCESS;  in igc_validate_nvm_checksum_i225()
589 	if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {  in igc_validate_nvm_checksum_i225()
630 	if (ret_val != IGC_SUCCESS) {  in igc_update_nvm_checksum_i225()
635 	if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {  in igc_update_nvm_checksum_i225()
654 		if (ret_val != IGC_SUCCESS) {  in igc_update_nvm_checksum_i225()
697 	s32 ret_val = IGC_SUCCESS;  in igc_set_flsw_flash_burst_counter_i225()
724 	s32 ret_val = IGC_SUCCESS;  in igc_write_erase_flash_command_i225()
792 		if (ret_val == IGC_SUCCESS)  in igc_update_flash_i225()
822 			if (ret_val != IGC_SUCCESS)  in igc_update_flash_i225()
829 			if (ret_val != IGC_SUCCESS)  in igc_update_flash_i225()
870 			ret_val = IGC_SUCCESS;  in igc_pool_flash_update_done_i225()
978 	return IGC_SUCCESS;  in igc_set_ltr_i225()
1002 		ret_val = IGC_SUCCESS;  in igc_check_for_link_i225()
1119 	return IGC_SUCCESS;  in igc_set_d0_lplu_state_i225()
1149 	return IGC_SUCCESS;  in igc_set_d3_lplu_state_i225()
1212 	return IGC_SUCCESS;  in igc_set_eee_i225()