1 /*-
4  * SPDX-License-Identifier: BSD-3-Clause
22  *  igc_init_nvm_params_i225 - Init NVM func ptrs.
27 	struct igc_nvm_info *nvm = &hw->nvm;  in igc_init_nvm_params_i225()
36 	 * Added to a constant, "size" becomes the left-shift value  in igc_init_nvm_params_i225()
47 	nvm->word_size = 1 << size;  in igc_init_nvm_params_i225()
48 	nvm->opcode_bits = 8;  in igc_init_nvm_params_i225()
49 	nvm->delay_usec = 1;  in igc_init_nvm_params_i225()
50 	nvm->type = igc_nvm_eeprom_spi;  in igc_init_nvm_params_i225()
53 	nvm->page_size = eecd & IGC_EECD_ADDR_BITS ? 32 : 8;  in igc_init_nvm_params_i225()
54 	nvm->address_bits = eecd & IGC_EECD_ADDR_BITS ?  in igc_init_nvm_params_i225()
57 	if (nvm->word_size == (1 << 15))  in igc_init_nvm_params_i225()
58 		nvm->page_size = 128;  in igc_init_nvm_params_i225()
60 	nvm->ops.acquire = igc_acquire_nvm_i225;  in igc_init_nvm_params_i225()
61 	nvm->ops.release = igc_release_nvm_i225;  in igc_init_nvm_params_i225()
63 		hw->nvm.type = igc_nvm_flash_hw;  in igc_init_nvm_params_i225()
64 		nvm->ops.read    = igc_read_nvm_srrd_i225;  in igc_init_nvm_params_i225()
65 		nvm->ops.write   = igc_write_nvm_srwr_i225;  in igc_init_nvm_params_i225()
66 		nvm->ops.validate = igc_validate_nvm_checksum_i225;  in igc_init_nvm_params_i225()
67 		nvm->ops.update   = igc_update_nvm_checksum_i225;  in igc_init_nvm_params_i225()
69 		hw->nvm.type = igc_nvm_invm;  in igc_init_nvm_params_i225()
70 		nvm->ops.write    = igc_null_write_nvm;  in igc_init_nvm_params_i225()
71 		nvm->ops.validate = igc_null_ops_generic;  in igc_init_nvm_params_i225()
72 		nvm->ops.update   = igc_null_ops_generic;  in igc_init_nvm_params_i225()
79  *  igc_init_mac_params_i225 - Init MAC func ptrs.
84 	struct igc_mac_info *mac = &hw->mac;  in igc_init_mac_params_i225()
85 	struct igc_dev_spec_i225 *dev_spec = &hw->dev_spec._i225;  in igc_init_mac_params_i225()
93 	hw->phy.media_type = igc_media_type_copper;  in igc_init_mac_params_i225()
95 	mac->mta_reg_count = 128;  in igc_init_mac_params_i225()
97 	mac->rar_entry_count = IGC_RAR_ENTRIES_BASE;  in igc_init_mac_params_i225()
100 	mac->ops.reset_hw = igc_reset_hw_i225;  in igc_init_mac_params_i225()
102 	mac->ops.init_hw = igc_init_hw_i225;  in igc_init_mac_params_i225()
104 	mac->ops.setup_link = igc_setup_link_generic;  in igc_init_mac_params_i225()
106 	mac->ops.check_for_link = igc_check_for_link_i225;  in igc_init_mac_params_i225()
108 	mac->ops.get_link_up_info = igc_get_speed_and_duplex_copper_generic;  in igc_init_mac_params_i225()
110 	mac->ops.acquire_swfw_sync = igc_acquire_swfw_sync_i225;  in igc_init_mac_params_i225()
112 	mac->ops.release_swfw_sync = igc_release_swfw_sync_i225;  in igc_init_mac_params_i225()
115 	dev_spec->clear_semaphore_once = true;  in igc_init_mac_params_i225()
116 	mac->ops.setup_physical_interface = igc_setup_copper_link_i225;  in igc_init_mac_params_i225()
119 	mac->asf_firmware_present = true;  in igc_init_mac_params_i225()
122 	mac->ops.update_mc_addr_list = igc_update_mc_addr_list_generic;  in igc_init_mac_params_i225()
124 	mac->ops.write_vfta = igc_write_vfta_generic;  in igc_init_mac_params_i225()
130  *  igc_init_phy_params_i225 - Init PHY func ptrs.
135 	struct igc_phy_info *phy = &hw->phy;  in igc_init_phy_params_i225()
141 	if (hw->phy.media_type != igc_media_type_copper) {  in igc_init_phy_params_i225()
142 		phy->type = igc_phy_none;  in igc_init_phy_params_i225()
146 	phy->ops.power_up   = igc_power_up_phy_copper;  in igc_init_phy_params_i225()
147 	phy->ops.power_down = igc_power_down_phy_copper_base;  in igc_init_phy_params_i225()
149 	phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT_2500;  in igc_init_phy_params_i225()
151 	phy->reset_delay_us	= 100;  in igc_init_phy_params_i225()
153 	phy->ops.acquire	= igc_acquire_phy_base;  in igc_init_phy_params_i225()
154 	phy->ops.check_reset_block = igc_check_reset_block_generic;  in igc_init_phy_params_i225()
155 	phy->ops.release	= igc_release_phy_base;  in igc_init_phy_params_i225()
156 	phy->ops.reset		= igc_phy_hw_reset_generic;  in igc_init_phy_params_i225()
157 	phy->ops.read_reg	= igc_read_phy_reg_gpy;  in igc_init_phy_params_i225()
158 	phy->ops.write_reg	= igc_write_phy_reg_gpy;  in igc_init_phy_params_i225()
162 	 * other than the default of zero, which causes the PHY ID read to  in igc_init_phy_params_i225()
165 	ret_val = hw->phy.ops.reset(hw);  in igc_init_phy_params_i225()
170 	phy->type = igc_phy_i225;  in igc_init_phy_params_i225()
177  *  igc_reset_hw_i225 - Reset hardware
190 	 * Prevent the PCI-E bus from sticking if there is no TLP connection  in igc_reset_hw_i225()
191 	 * on the last TLP read/write transaction when MAC is reset.  in igc_reset_hw_i225()
195 		DEBUGOUT("PCI-E Master disable polling has failed.\n");  in igc_reset_hw_i225()
214 		 * When auto config read does not complete, do not  in igc_reset_hw_i225()
218 		DEBUGOUT("Auto Read Done did not complete\n");  in igc_reset_hw_i225()
231 /* igc_acquire_nvm_i225 - Request for access to EEPROM
237  * EEPROM access and return -IGC_ERR_NVM (-1).
250 /* igc_release_nvm_i225 - Release exclusive access to EEPROM
263 /* igc_acquire_swfw_sync_i225 - Acquire SW/FW semaphore
282 			ret_val = -IGC_ERR_SWFW_SYNC;  in igc_acquire_swfw_sync_i225()
300 		ret_val = -IGC_ERR_SWFW_SYNC;  in igc_acquire_swfw_sync_i225()
313 /* igc_release_swfw_sync_i225 - Release SW/FW semaphore
337  * igc_setup_copper_link_i225 - Configure copper link settings
340  * Configures the link for auto-neg or forced speed and duplex.  Then we check
366 /* igc_get_hw_semaphore_i225 - Acquire hardware semaphore
374 	s32 timeout = hw->nvm.word_size + 1;  in igc_get_hw_semaphore_i225()
393 		if (hw->dev_spec._i225.clear_semaphore_once) {  in igc_get_hw_semaphore_i225()
394 			hw->dev_spec._i225.clear_semaphore_once = false;  in igc_get_hw_semaphore_i225()
407 			DEBUGOUT("Driver can't access device -\n");  in igc_get_hw_semaphore_i225()
409 			return -IGC_ERR_NVM;  in igc_get_hw_semaphore_i225()
429 		return -IGC_ERR_NVM;  in igc_get_hw_semaphore_i225()
435 /* igc_read_nvm_srrd_i225 - Reads Shadow Ram using EERD register
437  * @offset: offset of word in the Shadow Ram to read
438  * @words: number of words to read
439  * @data: word read from the Shadow Ram
454 	 * to read in bursts than synchronizing access for each word.  in igc_read_nvm_srrd_i225()
457 		count = (words - i) / IGC_EERD_EEWR_MAX_COUNT > 0 ?  in igc_read_nvm_srrd_i225()
458 			IGC_EERD_EEWR_MAX_COUNT : (words - i);  in igc_read_nvm_srrd_i225()
459 		if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {  in igc_read_nvm_srrd_i225()
462 			hw->nvm.ops.release(hw);  in igc_read_nvm_srrd_i225()
474 /* igc_write_nvm_srwr_i225 - Write to Shadow RAM using EEWR
486  * If error code is returned, data and Shadow RAM may be inconsistent - buffer
502 		count = (words - i) / IGC_EERD_EEWR_MAX_COUNT > 0 ?  in igc_write_nvm_srwr_i225()
503 			IGC_EERD_EEWR_MAX_COUNT : (words - i);  in igc_write_nvm_srwr_i225()
504 		if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {  in igc_write_nvm_srwr_i225()
507 			hw->nvm.ops.release(hw);  in igc_write_nvm_srwr_i225()
519 /* __igc_write_nvm_srwr - Write to Shadow Ram using EEWR
533 	struct igc_nvm_info *nvm = &hw->nvm;  in __igc_write_nvm_srwr()
543 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in __igc_write_nvm_srwr()
546 		ret_val = -IGC_ERR_NVM;  in __igc_write_nvm_srwr()
576 /* igc_validate_nvm_checksum_i225 - Validate EEPROM checksum
589 	if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {  in igc_validate_nvm_checksum_i225()
590 		/* Replace the read function with semaphore grabbing with  in igc_validate_nvm_checksum_i225()
594 		read_op_ptr = hw->nvm.ops.read;  in igc_validate_nvm_checksum_i225()
595 		hw->nvm.ops.read = igc_read_nvm_eerd;  in igc_validate_nvm_checksum_i225()
599 		/* Revert original read operation. */  in igc_validate_nvm_checksum_i225()
600 		hw->nvm.ops.read = read_op_ptr;  in igc_validate_nvm_checksum_i225()
602 		hw->nvm.ops.release(hw);  in igc_validate_nvm_checksum_i225()
610 /* igc_update_nvm_checksum_i225 - Update EEPROM checksum
625 	/* Read the first word from the EEPROM. If this times out or fails, do  in igc_update_nvm_checksum_i225()
627 	 * EEPROM read fails  in igc_update_nvm_checksum_i225()
631 		DEBUGOUT("EEPROM read failed\n");  in igc_update_nvm_checksum_i225()
635 	if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {  in igc_update_nvm_checksum_i225()
636 		/* Do not use hw->nvm.ops.write, hw->nvm.ops.read  in igc_update_nvm_checksum_i225()
644 				hw->nvm.ops.release(hw);  in igc_update_nvm_checksum_i225()
645 				DEBUGOUT("NVM Read Error while updating\n");  in igc_update_nvm_checksum_i225()
651 		checksum = (u16)NVM_SUM - checksum;  in igc_update_nvm_checksum_i225()
655 			hw->nvm.ops.release(hw);  in igc_update_nvm_checksum_i225()
660 		hw->nvm.ops.release(hw);  in igc_update_nvm_checksum_i225()
670 /* igc_get_flash_presence_i225 - Check if flash device is detected.
688 /* igc_set_flsw_flash_burst_counter_i225 - sets FLSW NVM Burst
692  * @burst_counter: size in bytes of the Flash burst to read or write
703 		/* Write FLSWCNT - burst counter */  in igc_set_flsw_flash_burst_counter_i225()
712 /* igc_write_erase_flash_command_i225 - write/erase to a sector
735 		timeout--;  in igc_write_erase_flash_command_i225()
740 		return -IGC_ERR_NVM;  in igc_write_erase_flash_command_i225()
757 /* igc_update_flash_i225 - Commit EEPROM to the flash
783 		if (ret_val == -IGC_ERR_NVM) {  in igc_update_flash_i225()
819 			/* Set burst write length */  in igc_update_flash_i225()
835 				DEBUGOUT("Failed to read from EEPROM\n");  in igc_update_flash_i225()
857 /* igc_pool_flash_update_done_i225 - Pool FLUDONE status.
862 	s32 ret_val = -IGC_ERR_NVM;  in igc_pool_flash_update_done_i225()
879 /* igc_set_ltr_i225 - Set Latency Tolerance Reporting thresholds.
896 		hw->mac.ops.get_link_up_info(hw, &speed, &duplex);  in igc_set_ltr_i225()
901 		if ((hw->phy.media_type == igc_media_type_copper) &&  in igc_set_ltr_i225()
902 		    !(hw->dev_spec._i225.eee_disable) &&  in igc_set_ltr_i225()
928 			size -= (IGC_READ_REG(hw, IGC_DMACR) &  in igc_set_ltr_i225()
938 			size -= hw->dev_spec._i225.mtu;  in igc_set_ltr_i225()
945 			return -IGC_ERR_CONFIG;  in igc_set_ltr_i225()
981 /* igc_check_for_link_i225 - Check for link
985  * change in link status has been detected, then we read the PHY registers
990 	struct igc_mac_info *mac = &hw->mac;  in igc_check_for_link_i225()
997 	 * Auto-Neg has completed and/or if our link status has  in igc_check_for_link_i225()
1001 	if (!mac->get_link_status) {  in igc_check_for_link_i225()
1028 	mac->get_link_status = false;  in igc_check_for_link_i225()
1031 	 * immediately after link-up  in igc_check_for_link_i225()
1038 	if (!mac->autoneg)  in igc_check_for_link_i225()
1041 	/* Auto-Neg is enabled.  Auto Speed Detection takes care  in igc_check_for_link_i225()
1045 	mac->ops.config_collision_dist(hw);  in igc_check_for_link_i225()
1047 	/* Configure Flow Control now that Auto-Neg has completed.  in igc_check_for_link_i225()
1049 	 * settings because we may have had to re-autoneg with a  in igc_check_for_link_i225()
1064 /* igc_init_function_pointers_i225 - Init func ptrs.
1074 	hw->mac.ops.init_params = igc_init_mac_params_i225;  in igc_init_function_pointers_i225()
1075 	hw->nvm.ops.init_params = igc_init_nvm_params_i225;  in igc_init_function_pointers_i225()
1076 	hw->phy.ops.init_params = igc_init_phy_params_i225;  in igc_init_function_pointers_i225()
1079 /* igc_init_hw_i225 - Init hw for I225
1095  * igc_set_d0_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D0 state
1123  * igc_set_d3_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D3 state
1153  *  igc_set_eee_i225 - Enable/disable EEE support
1169 	if (hw->mac.type != igc_i225 ||  in igc_set_eee_i225()
1170 	    hw->phy.media_type != igc_media_type_copper)  in igc_set_eee_i225()
1176 	if (!(hw->dev_spec._i225.eee_disable)) {  in igc_set_eee_i225()