Lines Matching refs:u16
121 #define __le16 u16
351 s32 (*get_link_up_info)(struct igc_hw *, u16 *, u16 *);
362 s32 (*acquire_swfw_sync)(struct igc_hw *, u16);
363 void (*release_swfw_sync)(struct igc_hw *, u16);
386 s32 (*set_page)(struct igc_hw *, u16);
387 s32 (*read_reg)(struct igc_hw *, u32, u16 *);
388 s32 (*read_reg_locked)(struct igc_hw *, u32, u16 *);
389 s32 (*read_reg_page)(struct igc_hw *, u32, u16 *);
394 s32 (*write_reg)(struct igc_hw *, u32, u16);
395 s32 (*write_reg_locked)(struct igc_hw *, u32, u16);
396 s32 (*write_reg_page)(struct igc_hw *, u32, u16);
405 s32 (*read)(struct igc_hw *, u16, u16, u16 *);
410 s32 (*write)(struct igc_hw *, u16, u16, u16 *);
431 u16 current_ifs_val;
432 u16 ifs_max_val;
433 u16 ifs_min_val;
434 u16 ifs_ratio;
435 u16 ifs_step_size;
436 u16 mta_reg_count;
437 u16 uta_reg_count;
442 u16 rar_entry_count;
465 u16 autoneg_advertised;
466 u16 autoneg_mask;
479 u16 word_size;
480 u16 delay_usec;
481 u16 address_bits;
482 u16 opcode_bits;
483 u16 page_size;
491 u16 func;
492 u16 pci_cmd_word;
498 u16 pause_time; /* Flow control pause timer */
499 u16 refresh_time; /* Flow control refresh timer */
529 u16 device_id;
530 u16 subsystem_vendor_id;
531 u16 subsystem_device_id;
532 u16 vendor_id;
541 s32 igc_read_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);
542 s32 igc_write_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);
543 void igc_read_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);
544 void igc_write_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);