50  * Intel swears it's always at offset 0x60, so we use that.
291 	{ 0, NULL, 0, 0 },
301 	{ 0, NULL, 0, 0 },
340 	} while (0)
371 	return ((ichwd_read_smi_4(sc, SMI_EN) & SMI_TCO_EN) != 0);  in ichwd_smi_is_enabled()
383 	 * by writing a 1, not a 0.  in ichwd_sts_reset()
422 	sc->active = 0;  in ichwd_tmr_disable()
454 		tmr_val8 &= (~TCO_RLD1_TMR_MAX & 0xff);  in ichwd_tmr_set()
462 		tmr_val16 &= (~TCO_RLD2_TMR_MAX & 0xffff);  in ichwd_tmr_set()
478 	int rc = 0;  in ichwd_clear_noreboot()
491 		status = ichwd_read_gcs_4(sc, 0);  in ichwd_clear_noreboot()
493 		ichwd_write_gcs_4(sc, 0, status);  in ichwd_clear_noreboot()
494 		status = ichwd_read_gcs_4(sc, 0);  in ichwd_clear_noreboot()
499 		status = ichwd_read_pmc_4(sc, 0);  in ichwd_clear_noreboot()
501 		ichwd_write_pmc_4(sc, 0, status);  in ichwd_clear_noreboot()
502 		status = ichwd_read_pmc_4(sc, 0);  in ichwd_clear_noreboot()
507 		status = ichwd_read_gc_4(sc, 0);  in ichwd_clear_noreboot()
509 		ichwd_write_gc_4(sc, 0, status);  in ichwd_clear_noreboot()
510 		status = ichwd_read_gc_4(sc, 0);  in ichwd_clear_noreboot()
553 		*error = 0;  in ichwd_event()
646 	if ((dev = device_find_child(parent, driver->name, 0)) == NULL)  in ichwd_identify()
647 		dev = BUS_ADD_CHILD(parent, 0, driver->name, 0);  in ichwd_identify()
658 		rc = bus_set_resource(ich, SYS_RES_MEMORY, 0,  in ichwd_identify()
659 		    (base_address & 0xffffc000) + ICH_GCS_OFFSET,  in ichwd_identify()
669 		rc = bus_set_resource(ich, SYS_RES_MEMORY, 0,  in ichwd_identify()
670 		    (base_address & 0xfffffe00) + ICH_PMC_OFFSET,  in ichwd_identify()
680 		if ((ctl & ICH_TCOCTL_TCO_BASE_EN) == 0) {  in ichwd_identify()
687 		rc = bus_set_resource(dev, SYS_RES_IOPORT, 0,  in ichwd_identify()
689 		if (rc != 0) {  in ichwd_identify()
701 		pci_cfgregwrite(0, 0, 31, 1, 0xe1, 0, 1);  in ichwd_identify()
702 		base_address64 = pci_cfgregread(0, 0, 31, 1, SBREG_BAR + 4, 4);  in ichwd_identify()
704 		base_address64 |= pci_cfgregread(0, 0, 31, 1, SBREG_BAR, 4);  in ichwd_identify()
705 		base_address64 &= ~0xfull;  in ichwd_identify()
706 		pci_cfgregwrite(0, 0, 31, 1, 0xe1, 1, 1);  in ichwd_identify()
709 		 * No Reboot bit is in General Control register, offset 0xc,  in ichwd_identify()
710 		 * within the SMBus target port, ID 0xc6.  in ichwd_identify()
715 		if (rc != 0) {  in ichwd_identify()
736 	if (isa_get_logicalid(dev) != 0)  in ichwd_probe()
744 	return (0);  in ichwd_probe()
765 	sc->tco_rid = 0;  in ichwd_smb_attach()
801 		acpi_base = pci_read_config(pmdev, ICH_PMBASE, 4) & 0xffffff00;  in ichwd_smb_attach()
802 		if (acpi_base == 0) {  in ichwd_smb_attach()
818 	return (0);  in ichwd_smb_attach()
827 	unsigned int pmbase = 0;  in ichwd_lpc_attach()
841 	if (pmbase == 0) {  in ichwd_lpc_attach()
847 	sc->smi_rid = 0;  in ichwd_lpc_attach()
865 	sc->gcs_rid = 0;  in ichwd_lpc_attach()
875 	return (0);  in ichwd_lpc_attach()
886 	if (ichwd_lpc_attach(dev) != 0 && ichwd_smb_attach(dev) != 0)  in ichwd_attach()
889 	if (ichwd_clear_noreboot(sc) != 0)  in ichwd_attach()
897 	if ((ichwd_read_tco_2(sc, TCO2_STS) & TCO_SECOND_TO_STS) != 0)  in ichwd_attach()
908 	sc->ev_tag = EVENTHANDLER_REGISTER(watchdog_list, ichwd_event, sc, 0);  in ichwd_attach()
914 	return (0);  in ichwd_attach()
945 	if (sc->smi_enabled != 0)  in ichwd_detach()
968 	return (0);  in ichwd_detach()
977 	{0,0}