Lines Matching full:reset
43 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE(_i) (0x000FD000 + ((_i) * 64)) /* _i=0...7 */ /* Reset Source: CORER */
67 #define GL_RDPU_CNTRL 0x00052054 /* Reset Source: CORER */
90 #define MSIX_PBA(_i) (0x00008000 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: FLR */
94 #define MSIX_TADD(_i) (0x00000000 + ((_i) * 16)) /* _i=0...64 */ /* Reset Source: FLR */
100 #define MSIX_TUADD(_i) (0x00000004 + ((_i) * 16)) /* _i=0...64 */ /* Reset Source: FLR */
104 #define MSIX_TVCTRL(_i) (0x0000000C + ((_i) * 16)) /* _i=0...64 */ /* Reset Source: FLR */
108 #define PF0_FW_HLP_ARQBAH_PAGE 0x02D00180 /* Reset Source: EMPR */
111 #define PF0_FW_HLP_ARQBAL_PAGE 0x02D00080 /* Reset Source: EMPR */
116 #define PF0_FW_HLP_ARQH_PAGE 0x02D00380 /* Reset Source: EMPR */
119 #define PF0_FW_HLP_ARQLEN_PAGE 0x02D00280 /* Reset Source: EMPR */
130 #define PF0_FW_HLP_ARQT_PAGE 0x02D00480 /* Reset Source: EMPR */
133 #define PF0_FW_HLP_ATQBAH_PAGE 0x02D00100 /* Reset Source: EMPR */
136 #define PF0_FW_HLP_ATQBAL_PAGE 0x02D00000 /* Reset Source: EMPR */
141 #define PF0_FW_HLP_ATQH_PAGE 0x02D00300 /* Reset Source: EMPR */
144 #define PF0_FW_HLP_ATQLEN_PAGE 0x02D00200 /* Reset Source: EMPR */
155 #define PF0_FW_HLP_ATQT_PAGE 0x02D00400 /* Reset Source: EMPR */
158 #define PF0_FW_PSM_ARQBAH_PAGE 0x02D40180 /* Reset Source: EMPR */
161 #define PF0_FW_PSM_ARQBAL_PAGE 0x02D40080 /* Reset Source: EMPR */
166 #define PF0_FW_PSM_ARQH_PAGE 0x02D40380 /* Reset Source: EMPR */
169 #define PF0_FW_PSM_ARQLEN_PAGE 0x02D40280 /* Reset Source: EMPR */
180 #define PF0_FW_PSM_ARQT_PAGE 0x02D40480 /* Reset Source: EMPR */
183 #define PF0_FW_PSM_ATQBAH_PAGE 0x02D40100 /* Reset Source: EMPR */
186 #define PF0_FW_PSM_ATQBAL_PAGE 0x02D40000 /* Reset Source: EMPR */
191 #define PF0_FW_PSM_ATQH_PAGE 0x02D40300 /* Reset Source: EMPR */
194 #define PF0_FW_PSM_ATQLEN_PAGE 0x02D40200 /* Reset Source: EMPR */
205 #define PF0_FW_PSM_ATQT_PAGE 0x02D40400 /* Reset Source: EMPR */
208 #define PF0_MBX_CPM_ARQBAH_PAGE 0x02D80190 /* Reset Source: CORER */
211 #define PF0_MBX_CPM_ARQBAL_PAGE 0x02D80090 /* Reset Source: CORER */
216 #define PF0_MBX_CPM_ARQH_PAGE 0x02D80390 /* Reset Source: CORER */
219 #define PF0_MBX_CPM_ARQLEN_PAGE 0x02D80290 /* Reset Source: PFR */
230 #define PF0_MBX_CPM_ARQT_PAGE 0x02D80490 /* Reset Source: CORER */
233 #define PF0_MBX_CPM_ATQBAH_PAGE 0x02D80110 /* Reset Source: CORER */
236 #define PF0_MBX_CPM_ATQBAL_PAGE 0x02D80010 /* Reset Source: CORER */
239 #define PF0_MBX_CPM_ATQH_PAGE 0x02D80310 /* Reset Source: CORER */
242 #define PF0_MBX_CPM_ATQLEN_PAGE 0x02D80210 /* Reset Source: PFR */
253 #define PF0_MBX_CPM_ATQT_PAGE 0x02D80410 /* Reset Source: CORER */
256 #define PF0_MBX_HLP_ARQBAH_PAGE 0x02D00190 /* Reset Source: CORER */
259 #define PF0_MBX_HLP_ARQBAL_PAGE 0x02D00090 /* Reset Source: CORER */
264 #define PF0_MBX_HLP_ARQH_PAGE 0x02D00390 /* Reset Source: CORER */
267 #define PF0_MBX_HLP_ARQLEN_PAGE 0x02D00290 /* Reset Source: PFR */
278 #define PF0_MBX_HLP_ARQT_PAGE 0x02D00490 /* Reset Source: CORER */
281 #define PF0_MBX_HLP_ATQBAH_PAGE 0x02D00110 /* Reset Source: CORER */
284 #define PF0_MBX_HLP_ATQBAL_PAGE 0x02D00010 /* Reset Source: CORER */
287 #define PF0_MBX_HLP_ATQH_PAGE 0x02D00310 /* Reset Source: CORER */
290 #define PF0_MBX_HLP_ATQLEN_PAGE 0x02D00210 /* Reset Source: PFR */
301 #define PF0_MBX_HLP_ATQT_PAGE 0x02D00410 /* Reset Source: CORER */
304 #define PF0_MBX_PSM_ARQBAH_PAGE 0x02D40190 /* Reset Source: CORER */
307 #define PF0_MBX_PSM_ARQBAL_PAGE 0x02D40090 /* Reset Source: CORER */
312 #define PF0_MBX_PSM_ARQH_PAGE 0x02D40390 /* Reset Source: CORER */
315 #define PF0_MBX_PSM_ARQLEN_PAGE 0x02D40290 /* Reset Source: PFR */
326 #define PF0_MBX_PSM_ARQT_PAGE 0x02D40490 /* Reset Source: CORER */
329 #define PF0_MBX_PSM_ATQBAH_PAGE 0x02D40110 /* Reset Source: CORER */
332 #define PF0_MBX_PSM_ATQBAL_PAGE 0x02D40010 /* Reset Source: CORER */
335 #define PF0_MBX_PSM_ATQH_PAGE 0x02D40310 /* Reset Source: CORER */
338 #define PF0_MBX_PSM_ATQLEN_PAGE 0x02D40210 /* Reset Source: PFR */
349 #define PF0_MBX_PSM_ATQT_PAGE 0x02D40410 /* Reset Source: CORER */
352 #define PF0_SB_CPM_ARQBAH_PAGE 0x02D801A0 /* Reset Source: CORER */
355 #define PF0_SB_CPM_ARQBAL_PAGE 0x02D800A0 /* Reset Source: CORER */
360 #define PF0_SB_CPM_ARQH_PAGE 0x02D803A0 /* Reset Source: CORER */
363 #define PF0_SB_CPM_ARQLEN_PAGE 0x02D802A0 /* Reset Source: PFR */
374 #define PF0_SB_CPM_ARQT_PAGE 0x02D804A0 /* Reset Source: CORER */
377 #define PF0_SB_CPM_ATQBAH_PAGE 0x02D80120 /* Reset Source: CORER */
380 #define PF0_SB_CPM_ATQBAL_PAGE 0x02D80020 /* Reset Source: CORER */
383 #define PF0_SB_CPM_ATQH_PAGE 0x02D80320 /* Reset Source: CORER */
386 #define PF0_SB_CPM_ATQLEN_PAGE 0x02D80220 /* Reset Source: PFR */
397 #define PF0_SB_CPM_ATQT_PAGE 0x02D80420 /* Reset Source: CORER */
400 #define PF0_SB_HLP_ARQBAH_PAGE 0x02D001A0 /* Reset Source: CORER */
403 #define PF0_SB_HLP_ARQBAL_PAGE 0x02D000A0 /* Reset Source: CORER */
408 #define PF0_SB_HLP_ARQH_PAGE 0x02D003A0 /* Reset Source: CORER */
411 #define PF0_SB_HLP_ARQLEN_PAGE 0x02D002A0 /* Reset Source: PFR */
422 #define PF0_SB_HLP_ARQT_PAGE 0x02D004A0 /* Reset Source: CORER */
425 #define PF0_SB_HLP_ATQBAH_PAGE 0x02D00120 /* Reset Source: CORER */
428 #define PF0_SB_HLP_ATQBAL_PAGE 0x02D00020 /* Reset Source: CORER */
431 #define PF0_SB_HLP_ATQH_PAGE 0x02D00320 /* Reset Source: CORER */
434 #define PF0_SB_HLP_ATQLEN_PAGE 0x02D00220 /* Reset Source: PFR */
445 #define PF0_SB_HLP_ATQT_PAGE 0x02D00420 /* Reset Source: CORER */
448 #define PF0INT_DYN_CTL(_i) (0x03000000 + ((_i) * 4096)) /* _i=0...2047 */ /* Reset Source: CORER */
468 #define PF0INT_ITR_0(_i) (0x03000004 + ((_i) * 4096)) /* _i=0...2047 */ /* Reset Source: CORER */
472 #define PF0INT_ITR_1(_i) (0x03000008 + ((_i) * 4096)) /* _i=0...2047 */ /* Reset Source: CORER */
476 #define PF0INT_ITR_2(_i) (0x0300000C + ((_i) * 4096)) /* _i=0...2047 */ /* Reset Source: CORER */
480 #define PF0INT_OICR_CPM_PAGE 0x02D03000 /* Reset Source: CORER */
531 #define PF0INT_OICR_ENA_CPM_PAGE 0x02D03100 /* Reset Source: CORER */
536 #define PF0INT_OICR_ENA_HLP_PAGE 0x02D01100 /* Reset Source: CORER */
541 #define PF0INT_OICR_ENA_PSM_PAGE 0x02D02100 /* Reset Source: CORER */
546 #define PF0INT_OICR_HLP_PAGE 0x02D01000 /* Reset Source: CORER */
597 #define PF0INT_OICR_PSM_PAGE 0x02D02000 /* Reset Source: CORER */
648 #define QRX_TAIL_PAGE(_QRX) (0x03800000 + ((_QRX) * 4096)) /* _i=0...2047 */ /* Reset Source: CORER */
652 #define QTX_COMM_DBELL_PAGE(_DBQM) (0x04000000 + ((_DBQM) * 4096)) /* _i=0...16383 */ /* Reset Source: CORER */
656 #define E800_QTX_COMM_DBLQ_DBELL_PAGE(_DBLQ) (0x02F00000 + ((_DBLQ) * 4096)) /* _i=0...255 */ /* Reset Source: CORER */
660 #define VSI_MBX_ARQBAH(_VSI) (0x02000018 + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: CORER */
664 #define VSI_MBX_ARQBAL(_VSI) (0x02000014 + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: CORER */
670 #define VSI_MBX_ARQH(_VSI) (0x02000020 + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: CORER */
674 #define VSI_MBX_ARQLEN(_VSI) (0x0200001C + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: PFR */
686 #define VSI_MBX_ARQT(_VSI) (0x02000024 + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: CORER */
690 #define VSI_MBX_ATQBAH(_VSI) (0x02000004 + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: CORER */
694 #define VSI_MBX_ATQBAL(_VSI) (0x02000000 + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: CORER */
698 #define VSI_MBX_ATQH(_VSI) (0x0200000C + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: CORER */
702 #define VSI_MBX_ATQLEN(_VSI) (0x02000008 + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: PFR */
714 #define VSI_MBX_ATQT(_VSI) (0x02000010 + ((_VSI) * 4096)) /* _i=0...767 */ /* Reset Source: CORER */
718 #define GL_ACL_ACCESS_CMD 0x00391000 /* Reset Source: CORER */
729 #define GL_ACL_ACCESS_STATUS 0x00391004 /* Reset Source: CORER */
746 #define GL_ACL_ACTMEM_ACT(_i) (0x00393824 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
754 #define GL_ACL_CHICKEN_REGISTER 0x00393810 /* Reset Source: CORER */
759 #define GL_ACL_DEFAULT_ACT(_i) (0x00391168 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
767 #define GL_ACL_PROFILE_BWSB_SEL(_i) (0x00391008 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
773 #define GL_ACL_PROFILE_DWSB_SEL(_i) (0x00391088 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
777 #define GL_ACL_PROFILE_PF_CFG(_i) (0x003910C8 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
781 #define GL_ACL_PROFILE_RC_CFG(_i) (0x003910E8 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
787 #define GL_ACL_PROFILE_RCF_MASK(_i) (0x00391108 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
791 #define GL_ACL_SCENARIO_ACT_CFG(_i) (0x003938AC + ((_i) * 4)) /* _i=0...19 */ /* Reset Source: CORER */
797 #define GL_ACL_SCENARIO_CFG_H(_i) (0x0039386C + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
807 #define GL_ACL_SCENARIO_CFG_L(_i) (0x0039382C + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
817 #define GL_ACL_TCAM_KEY_H 0x00393818 /* Reset Source: CORER */
820 #define GL_ACL_TCAM_KEY_INV_H 0x00393820 /* Reset Source: CORER */
823 #define GL_ACL_TCAM_KEY_INV_L 0x0039381C /* Reset Source: CORER */
826 #define GL_ACL_TCAM_KEY_L 0x00393814 /* Reset Source: CORER */
829 #define VSI_ACL_DEF_SEL(_VSI) (0x00391800 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
839 #define GL_SWT_L2TAG0(_i) (0x000492A8 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
843 #define GL_SWT_L2TAG1(_i) (0x000492C8 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
847 #define GL_SWT_L2TAGCTRL(_i) (0x001D2660 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
867 #define GL_SWT_L2TAGRXEB(_i) (0x00052000 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
873 #define GL_SWT_L2TAGTXIB(_i) (0x000492E8 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
879 #define GLCM_PE_CACHESIZE 0x005046B4 /* Reset Source: CORER */
886 #define GLCOMM_CQ_CTL(_CQ) (0x000F0000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
894 #define GLCOMM_MIN_MAX_PKT 0x000FC064 /* Reset Source: CORER */
901 #define GLCOMM_PKT_SHAPER_PROF(_i) (0x002D2DA8 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
905 #define GLCOMM_QTX_CNTX_CTL 0x002D2DC8 /* Reset Source: CORER */
912 #define GLCOMM_QTX_CNTX_DATA(_i) (0x002D2D40 + ((_i) * 4)) /* _i=0...9 */ /* Reset Source: CORER */
916 #define GLCOMM_QTX_CNTX_STAT 0x002D2DCC /* Reset Source: CORER */
919 #define GLCOMM_QUANTA_PROF(_i) (0x002D2D68 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
927 #define GLLAN_TCLAN_CACHE_CTL 0x000FC0B8 /* Reset Source: CORER */
938 #define GLTCLAN_CQ_CNTX0(_CQ) (0x000F0800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
942 #define GLTCLAN_CQ_CNTX1(_CQ) (0x000F1000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
946 #define GLTCLAN_CQ_CNTX10(_CQ) (0x000F5800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
950 #define GLTCLAN_CQ_CNTX11(_CQ) (0x000F6000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
954 #define GLTCLAN_CQ_CNTX12(_CQ) (0x000F6800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
958 #define GLTCLAN_CQ_CNTX13(_CQ) (0x000F7000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
962 #define GLTCLAN_CQ_CNTX14(_CQ) (0x000F7800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
966 #define GLTCLAN_CQ_CNTX15(_CQ) (0x000F8000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
970 #define GLTCLAN_CQ_CNTX16(_CQ) (0x000F8800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
974 #define GLTCLAN_CQ_CNTX17(_CQ) (0x000F9000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
978 #define GLTCLAN_CQ_CNTX18(_CQ) (0x000F9800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
982 #define GLTCLAN_CQ_CNTX19(_CQ) (0x000FA000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
986 #define GLTCLAN_CQ_CNTX2(_CQ) (0x000F1800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
990 #define GLTCLAN_CQ_CNTX20(_CQ) (0x000FA800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
994 #define GLTCLAN_CQ_CNTX21(_CQ) (0x000FB000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
998 #define GLTCLAN_CQ_CNTX3(_CQ) (0x000F2000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
1004 #define GLTCLAN_CQ_CNTX4(_CQ) (0x000F2800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
1012 #define GLTCLAN_CQ_CNTX5(_CQ) (0x000F3000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
1020 #define GLTCLAN_CQ_CNTX6(_CQ) (0x000F3800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
1024 #define GLTCLAN_CQ_CNTX7(_CQ) (0x000F4000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
1028 #define GLTCLAN_CQ_CNTX8(_CQ) (0x000F4800 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
1032 #define GLTCLAN_CQ_CNTX9(_CQ) (0x000F5000 + ((_CQ) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
1036 #define QTX_COMM_DBELL(_DBQM) (0x002C0000 + ((_DBQM) * 4)) /* _i=0...16383 */ /* Reset Source: CORER */
1040 #define QTX_COMM_DBLQ_CNTX(_i, _DBLQ) (0x002D0000 + ((_i) * 1024 + (_DBLQ) * 4)) /* _i=0...4, _DBLQ=0...255 */ /* Reset Source: CORER */
1044 #define QTX_COMM_DBLQ_DBELL(_DBLQ) (0x002D1400 + ((_DBLQ) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1048 #define QTX_COMM_HEAD(_DBQM) (0x000E0000 + ((_DBQM) * 4)) /* _i=0...16383 */ /* Reset Source: CORER */
1054 #define GL_FW_TOOL_ARQBAH 0x000801C0 /* Reset Source: EMPR */
1057 #define GL_FW_TOOL_ARQBAL 0x000800C0 /* Reset Source: EMPR */
1062 #define GL_FW_TOOL_ARQH 0x000803C0 /* Reset Source: EMPR */
1065 #define GL_FW_TOOL_ARQLEN 0x000802C0 /* Reset Source: EMPR */
1076 #define GL_FW_TOOL_ARQT 0x000804C0 /* Reset Source: EMPR */
1079 #define GL_FW_TOOL_ATQBAH 0x00080140 /* Reset Source: EMPR */
1082 #define GL_FW_TOOL_ATQBAL 0x00080040 /* Reset Source: EMPR */
1087 #define GL_FW_TOOL_ATQH 0x00080340 /* Reset Source: EMPR */
1090 #define GL_FW_TOOL_ATQLEN 0x00080240 /* Reset Source: EMPR */
1101 #define GL_FW_TOOL_ATQT 0x00080440 /* Reset Source: EMPR */
1104 #define GL_MBX_PASID 0x00231EC0 /* Reset Source: CORER */
1109 #define PF_FW_ARQBAH 0x00080180 /* Reset Source: EMPR */
1112 #define PF_FW_ARQBAL 0x00080080 /* Reset Source: EMPR */
1117 #define PF_FW_ARQH 0x00080380 /* Reset Source: EMPR */
1120 #define PF_FW_ARQLEN 0x00080280 /* Reset Source: EMPR */
1131 #define PF_FW_ARQT 0x00080480 /* Reset Source: EMPR */
1134 #define PF_FW_ATQBAH 0x00080100 /* Reset Source: EMPR */
1137 #define PF_FW_ATQBAL 0x00080000 /* Reset Source: EMPR */
1142 #define PF_FW_ATQH 0x00080300 /* Reset Source: EMPR */
1145 #define PF_FW_ATQLEN 0x00080200 /* Reset Source: EMPR */
1156 #define PF_FW_ATQT 0x00080400 /* Reset Source: EMPR */
1159 #define PF_MBX_ARQBAH 0x0022E400 /* Reset Source: CORER */
1162 #define PF_MBX_ARQBAL 0x0022E380 /* Reset Source: CORER */
1167 #define PF_MBX_ARQH 0x0022E500 /* Reset Source: CORER */
1170 #define PF_MBX_ARQLEN 0x0022E480 /* Reset Source: PFR */
1181 #define PF_MBX_ARQT 0x0022E580 /* Reset Source: CORER */
1184 #define PF_MBX_ATQBAH 0x0022E180 /* Reset Source: CORER */
1187 #define PF_MBX_ATQBAL 0x0022E100 /* Reset Source: CORER */
1190 #define PF_MBX_ATQH 0x0022E280 /* Reset Source: CORER */
1193 #define PF_MBX_ATQLEN 0x0022E200 /* Reset Source: PFR */
1204 #define PF_MBX_ATQT 0x0022E300 /* Reset Source: CORER */
1207 #define PF_SB_ARQBAH 0x0022FF00 /* Reset Source: CORER */
1210 #define PF_SB_ARQBAL 0x0022FE80 /* Reset Source: CORER */
1215 #define PF_SB_ARQH 0x00230000 /* Reset Source: CORER */
1218 #define PF_SB_ARQLEN 0x0022FF80 /* Reset Source: PFR */
1229 #define PF_SB_ARQT 0x00230080 /* Reset Source: CORER */
1232 #define PF_SB_ATQBAH 0x0022FC80 /* Reset Source: CORER */
1235 #define PF_SB_ATQBAL 0x0022FC00 /* Reset Source: CORER */
1238 #define PF_SB_ATQH 0x0022FD80 /* Reset Source: CORER */
1241 #define PF_SB_ATQLEN 0x0022FD00 /* Reset Source: PFR */
1252 #define PF_SB_ATQT 0x0022FE00 /* Reset Source: CORER */
1255 #define PF_SB_REM_DEV_CTL 0x002300F0 /* Reset Source: CORER */
1258 #define PF0_FW_HLP_ARQBAH 0x000801C8 /* Reset Source: EMPR */
1261 #define PF0_FW_HLP_ARQBAL 0x000800C8 /* Reset Source: EMPR */
1266 #define PF0_FW_HLP_ARQH 0x000803C8 /* Reset Source: EMPR */
1269 #define PF0_FW_HLP_ARQLEN 0x000802C8 /* Reset Source: EMPR */
1280 #define PF0_FW_HLP_ARQT 0x000804C8 /* Reset Source: EMPR */
1283 #define PF0_FW_HLP_ATQBAH 0x00080148 /* Reset Source: EMPR */
1286 #define PF0_FW_HLP_ATQBAL 0x00080048 /* Reset Source: EMPR */
1291 #define PF0_FW_HLP_ATQH 0x00080348 /* Reset Source: EMPR */
1294 #define PF0_FW_HLP_ATQLEN 0x00080248 /* Reset Source: EMPR */
1305 #define PF0_FW_HLP_ATQT 0x00080448 /* Reset Source: EMPR */
1308 #define PF0_FW_PSM_ARQBAH 0x000801C4 /* Reset Source: EMPR */
1311 #define PF0_FW_PSM_ARQBAL 0x000800C4 /* Reset Source: EMPR */
1316 #define PF0_FW_PSM_ARQH 0x000803C4 /* Reset Source: EMPR */
1319 #define PF0_FW_PSM_ARQLEN 0x000802C4 /* Reset Source: EMPR */
1330 #define PF0_FW_PSM_ARQT 0x000804C4 /* Reset Source: EMPR */
1333 #define PF0_FW_PSM_ATQBAH 0x00080144 /* Reset Source: EMPR */
1336 #define PF0_FW_PSM_ATQBAL 0x00080044 /* Reset Source: EMPR */
1341 #define PF0_FW_PSM_ATQH 0x00080344 /* Reset Source: EMPR */
1344 #define PF0_FW_PSM_ATQLEN 0x00080244 /* Reset Source: EMPR */
1355 #define PF0_FW_PSM_ATQT 0x00080444 /* Reset Source: EMPR */
1358 #define PF0_MBX_CPM_ARQBAH 0x0022E5D8 /* Reset Source: CORER */
1361 #define PF0_MBX_CPM_ARQBAL 0x0022E5D4 /* Reset Source: CORER */
1366 #define PF0_MBX_CPM_ARQH 0x0022E5E0 /* Reset Source: CORER */
1369 #define PF0_MBX_CPM_ARQLEN 0x0022E5DC /* Reset Source: PFR */
1380 #define PF0_MBX_CPM_ARQT 0x0022E5E4 /* Reset Source: CORER */
1383 #define PF0_MBX_CPM_ATQBAH 0x0022E5C4 /* Reset Source: CORER */
1386 #define PF0_MBX_CPM_ATQBAL 0x0022E5C0 /* Reset Source: CORER */
1389 #define PF0_MBX_CPM_ATQH 0x0022E5CC /* Reset Source: CORER */
1392 #define PF0_MBX_CPM_ATQLEN 0x0022E5C8 /* Reset Source: PFR */
1403 #define PF0_MBX_CPM_ATQT 0x0022E5D0 /* Reset Source: CORER */
1406 #define PF0_MBX_HLP_ARQBAH 0x0022E600 /* Reset Source: CORER */
1409 #define PF0_MBX_HLP_ARQBAL 0x0022E5FC /* Reset Source: CORER */
1414 #define PF0_MBX_HLP_ARQH 0x0022E608 /* Reset Source: CORER */
1417 #define PF0_MBX_HLP_ARQLEN 0x0022E604 /* Reset Source: PFR */
1428 #define PF0_MBX_HLP_ARQT 0x0022E60C /* Reset Source: CORER */
1431 #define PF0_MBX_HLP_ATQBAH 0x0022E5EC /* Reset Source: CORER */
1434 #define PF0_MBX_HLP_ATQBAL 0x0022E5E8 /* Reset Source: CORER */
1437 #define PF0_MBX_HLP_ATQH 0x0022E5F4 /* Reset Source: CORER */
1440 #define PF0_MBX_HLP_ATQLEN 0x0022E5F0 /* Reset Source: PFR */
1451 #define PF0_MBX_HLP_ATQT 0x0022E5F8 /* Reset Source: CORER */
1454 #define PF0_MBX_PSM_ARQBAH 0x0022E628 /* Reset Source: CORER */
1457 #define PF0_MBX_PSM_ARQBAL 0x0022E624 /* Reset Source: CORER */
1462 #define PF0_MBX_PSM_ARQH 0x0022E630 /* Reset Source: CORER */
1465 #define PF0_MBX_PSM_ARQLEN 0x0022E62C /* Reset Source: PFR */
1476 #define PF0_MBX_PSM_ARQT 0x0022E634 /* Reset Source: CORER */
1479 #define PF0_MBX_PSM_ATQBAH 0x0022E614 /* Reset Source: CORER */
1482 #define PF0_MBX_PSM_ATQBAL 0x0022E610 /* Reset Source: CORER */
1485 #define PF0_MBX_PSM_ATQH 0x0022E61C /* Reset Source: CORER */
1488 #define PF0_MBX_PSM_ATQLEN 0x0022E618 /* Reset Source: PFR */
1499 #define PF0_MBX_PSM_ATQT 0x0022E620 /* Reset Source: CORER */
1502 #define PF0_SB_CPM_ARQBAH 0x0022E650 /* Reset Source: CORER */
1505 #define PF0_SB_CPM_ARQBAL 0x0022E64C /* Reset Source: CORER */
1510 #define PF0_SB_CPM_ARQH 0x0022E658 /* Reset Source: CORER */
1513 #define PF0_SB_CPM_ARQLEN 0x0022E654 /* Reset Source: PFR */
1524 #define PF0_SB_CPM_ARQT 0x0022E65C /* Reset Source: CORER */
1527 #define PF0_SB_CPM_ATQBAH 0x0022E63C /* Reset Source: CORER */
1530 #define PF0_SB_CPM_ATQBAL 0x0022E638 /* Reset Source: CORER */
1533 #define PF0_SB_CPM_ATQH 0x0022E644 /* Reset Source: CORER */
1536 #define PF0_SB_CPM_ATQLEN 0x0022E640 /* Reset Source: PFR */
1547 #define PF0_SB_CPM_ATQT 0x0022E648 /* Reset Source: CORER */
1550 #define PF0_SB_CPM_REM_DEV_CTL 0x002300F4 /* Reset Source: CORER */
1553 #define PF0_SB_HLP_ARQBAH 0x002300D8 /* Reset Source: CORER */
1556 #define PF0_SB_HLP_ARQBAL 0x002300D4 /* Reset Source: CORER */
1561 #define PF0_SB_HLP_ARQH 0x002300E0 /* Reset Source: CORER */
1564 #define PF0_SB_HLP_ARQLEN 0x002300DC /* Reset Source: PFR */
1575 #define PF0_SB_HLP_ARQT 0x002300E4 /* Reset Source: CORER */
1578 #define PF0_SB_HLP_ATQBAH 0x002300C4 /* Reset Source: CORER */
1581 #define PF0_SB_HLP_ATQBAL 0x002300C0 /* Reset Source: CORER */
1584 #define PF0_SB_HLP_ATQH 0x002300CC /* Reset Source: CORER */
1587 #define PF0_SB_HLP_ATQLEN 0x002300C8 /* Reset Source: PFR */
1598 #define PF0_SB_HLP_ATQT 0x002300D0 /* Reset Source: CORER */
1601 #define PF0_SB_HLP_REM_DEV_CTL 0x002300E8 /* Reset Source: CORER */
1604 #define SB_REM_DEV_DEST(_i) (0x002300F8 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
1610 #define VF_MBX_ARQBAH(_VF) (0x0022B800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1614 #define VF_MBX_ARQBAL(_VF) (0x0022B400 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1620 #define VF_MBX_ARQH(_VF) (0x0022C000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1624 #define VF_MBX_ARQLEN(_VF) (0x0022BC00 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
1636 #define VF_MBX_ARQT(_VF) (0x0022C400 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1640 #define VF_MBX_ATQBAH(_VF) (0x0022A400 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1644 #define VF_MBX_ATQBAL(_VF) (0x0022A000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1648 #define VF_MBX_ATQH(_VF) (0x0022AC00 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1652 #define VF_MBX_ATQLEN(_VF) (0x0022A800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
1664 #define VF_MBX_ATQT(_VF) (0x0022B000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
1668 #define VF_MBX_CPM_ARQBAH(_VF128) (0x0022D400 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1672 #define VF_MBX_CPM_ARQBAL(_VF128) (0x0022D200 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1678 #define VF_MBX_CPM_ARQH(_VF128) (0x0022D800 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1682 #define VF_MBX_CPM_ARQLEN(_VF128) (0x0022D600 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: PFR */
1694 #define VF_MBX_CPM_ARQT(_VF128) (0x0022DA00 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1698 #define VF_MBX_CPM_ATQBAH(_VF128) (0x0022CA00 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1702 #define VF_MBX_CPM_ATQBAL(_VF128) (0x0022C800 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1706 #define VF_MBX_CPM_ATQH(_VF128) (0x0022CE00 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1710 #define VF_MBX_CPM_ATQLEN(_VF128) (0x0022CC00 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: PFR */
1722 #define VF_MBX_CPM_ATQT(_VF128) (0x0022D000 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1726 #define VF_MBX_HLP_ARQBAH(_VF16) (0x0022DD80 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1730 #define VF_MBX_HLP_ARQBAL(_VF16) (0x0022DD40 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1736 #define VF_MBX_HLP_ARQH(_VF16) (0x0022DE00 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1740 #define VF_MBX_HLP_ARQLEN(_VF16) (0x0022DDC0 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: PFR */
1752 #define VF_MBX_HLP_ARQT(_VF16) (0x0022DE40 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1756 #define VF_MBX_HLP_ATQBAH(_VF16) (0x0022DC40 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1760 #define VF_MBX_HLP_ATQBAL(_VF16) (0x0022DC00 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1764 #define VF_MBX_HLP_ATQH(_VF16) (0x0022DCC0 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1768 #define VF_MBX_HLP_ATQLEN(_VF16) (0x0022DC80 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: PFR */
1780 #define VF_MBX_HLP_ATQT(_VF16) (0x0022DD00 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1784 #define VF_MBX_PSM_ARQBAH(_VF16) (0x0022E000 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1788 #define VF_MBX_PSM_ARQBAL(_VF16) (0x0022DFC0 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1794 #define VF_MBX_PSM_ARQH(_VF16) (0x0022E080 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1798 #define VF_MBX_PSM_ARQLEN(_VF16) (0x0022E040 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: PFR */
1810 #define VF_MBX_PSM_ARQT(_VF16) (0x0022E0C0 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1814 #define VF_MBX_PSM_ATQBAH(_VF16) (0x0022DEC0 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1818 #define VF_MBX_PSM_ATQBAL(_VF16) (0x0022DE80 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1822 #define VF_MBX_PSM_ATQH(_VF16) (0x0022DF40 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1826 #define VF_MBX_PSM_ATQLEN(_VF16) (0x0022DF00 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: PFR */
1838 #define VF_MBX_PSM_ATQT(_VF16) (0x0022DF80 + ((_VF16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1842 #define VF_SB_CPM_ARQBAH(_VF128) (0x0022F400 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1846 #define VF_SB_CPM_ARQBAL(_VF128) (0x0022F200 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1852 #define VF_SB_CPM_ARQH(_VF128) (0x0022F800 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1856 #define VF_SB_CPM_ARQLEN(_VF128) (0x0022F600 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: PFR */
1868 #define VF_SB_CPM_ARQT(_VF128) (0x0022FA00 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1872 #define VF_SB_CPM_ATQBAH(_VF128) (0x0022EA00 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1876 #define VF_SB_CPM_ATQBAL(_VF128) (0x0022E800 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1880 #define VF_SB_CPM_ATQH(_VF128) (0x0022EE00 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1884 #define VF_SB_CPM_ATQLEN(_VF128) (0x0022EC00 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: PFR */
1896 #define VF_SB_CPM_ATQT(_VF128) (0x0022F000 + ((_VF128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1900 #define VF_SB_CPM_REM_DEV_CTL 0x002300EC /* Reset Source: CORER */
1903 #define VP_MBX_CPM_PF_VF_CTRL(_VP128) (0x00231800 + ((_VP128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1907 #define VP_MBX_HLP_PF_VF_CTRL(_VP16) (0x00231A00 + ((_VP16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1911 #define VP_MBX_PF_VF_CTRL(_VSI) (0x00230800 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
1915 #define VP_MBX_PSM_PF_VF_CTRL(_VP16) (0x00231A40 + ((_VP16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
1919 #define VP_SB_CPM_PF_VF_CTRL(_VP128) (0x00231C00 + ((_VP128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
1923 #define GL_DCB_TDSCP2TC_BLOCK_DIS 0x00049218 /* Reset Source: CORER */
1926 #define GL_DCB_TDSCP2TC_BLOCK_IPV4(_i) (0x00049018 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
1930 #define GL_DCB_TDSCP2TC_BLOCK_IPV6(_i) (0x00049118 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
1934 #define GLDCB_GENC 0x00083044 /* Reset Source: CORER */
1937 #define GLDCB_PRS_RETSTCC(_i) (0x002000B0 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
1943 #define GLDCB_PRS_RSPMC 0x00200160 /* Reset Source: CORER */
1954 #define GLDCB_RETSTCC(_i) (0x00122140 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
1960 #define GLDCB_RETSTCS(_i) (0x001221C0 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
1964 #define GLDCB_RTC2PFC_RCB 0x00122100 /* Reset Source: CORER */
1967 #define GLDCB_SWT_RETSTCC(_i) (0x0020A040 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
1973 #define GLDCB_TC2PFC 0x001D2694 /* Reset Source: CORER */
1976 #define GLDCB_TCB_MNG_SP 0x000AE12C /* Reset Source: CORER */
1979 #define GLDCB_TCB_TCLL_CFG 0x000AE134 /* Reset Source: CORER */
1982 #define GLDCB_TCB_WB_SP 0x000AE310 /* Reset Source: CORER */
1985 #define GLDCB_TCUPM_IMM_EN 0x000BC824 /* Reset Source: CORER */
1988 #define GLDCB_TCUPM_LEGACY_TC 0x000BC828 /* Reset Source: CORER */
1991 #define GLDCB_TCUPM_NO_EXCEED_DIS 0x000BC830 /* Reset Source: CORER */
1994 #define GLDCB_TCUPM_WB_DIS 0x000BC834 /* Reset Source: CORER */
1999 #define GLDCB_TFPFCI 0x0009949C /* Reset Source: CORER */
2002 #define GLDCB_TLPM_IMM_TCB 0x000A0190 /* Reset Source: CORER */
2005 #define GLDCB_TLPM_IMM_TCUPM 0x000A018C /* Reset Source: CORER */
2008 #define GLDCB_TLPM_PCI_DM 0x000A0180 /* Reset Source: CORER */
2011 #define GLDCB_TLPM_PCI_DTHR 0x000A0184 /* Reset Source: CORER */
2014 #define GLDCB_TPB_IMM_TLPM 0x00099468 /* Reset Source: CORER */
2017 #define GLDCB_TPB_IMM_TPB 0x0009946C /* Reset Source: CORER */
2020 #define GLDCB_TPB_TCLL_CFG 0x00099464 /* Reset Source: CORER */
2023 #define GLTCB_BULK_DWRR_REG_QUANTA 0x000AE0E0 /* Reset Source: CORER */
2026 #define GLTCB_BULK_DWRR_REG_SAT 0x000AE0F0 /* Reset Source: CORER */
2029 #define GLTCB_BULK_DWRR_WB_QUANTA 0x000AE0E4 /* Reset Source: CORER */
2032 #define GLTCB_BULK_DWRR_WB_SAT 0x000AE0F4 /* Reset Source: CORER */
2035 #define GLTCB_CREDIT_EXP_CTL 0x000AE120 /* Reset Source: CORER */
2040 #define GLTCB_LL_DWRR_REG_QUANTA 0x000AE0E8 /* Reset Source: CORER */
2043 #define GLTCB_LL_DWRR_REG_SAT 0x000AE0F8 /* Reset Source: CORER */
2046 #define GLTCB_LL_DWRR_WB_QUANTA 0x000AE0EC /* Reset Source: CORER */
2049 #define GLTCB_LL_DWRR_WB_SAT 0x000AE0FC /* Reset Source: CORER */
2052 #define GLTCB_WB_RL 0x000AE238 /* Reset Source: CORER */
2057 #define GLTPB_WB_RL 0x00099460 /* Reset Source: CORER */
2062 #define E800_PRTDCB_FCCFG 0x001E4640 /* Reset Source: GLOBR */
2065 #define E800_PRTDCB_FCRTV 0x001E4600 /* Reset Source: GLOBR */
2068 #define E800_PRTDCB_FCTTVN(_i) (0x001E4580 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: GLOBR */
2074 #define PRTDCB_GENC 0x00083000 /* Reset Source: CORER */
2083 #define PRTDCB_GENS 0x00083020 /* Reset Source: CORER */
2086 #define PRTDCB_PRS_RETSC 0x002001A0 /* Reset Source: CORER */
2093 #define PRTDCB_PRS_RPRRC 0x00200180 /* Reset Source: CORER */
2098 #define PRTDCB_RETSC 0x001222A0 /* Reset Source: CORER */
2105 #define PRTDCB_RPRRC 0x001220C0 /* Reset Source: CORER */
2110 #define PRTDCB_RPRRS 0x001220E0 /* Reset Source: CORER */
2113 #define PRTDCB_RUP_TDPU 0x00040960 /* Reset Source: CORER */
2116 #define PRTDCB_RUP2TC 0x001D2640 /* Reset Source: CORER */
2133 #define PRTDCB_SWT_RETSC 0x0020A140 /* Reset Source: CORER */
2140 #define PRTDCB_TCB_DWRR_CREDITS 0x000AE000 /* Reset Source: CORER */
2143 #define PRTDCB_TCB_DWRR_QUANTA 0x000AE020 /* Reset Source: CORER */
2146 #define PRTDCB_TCB_DWRR_SAT 0x000AE040 /* Reset Source: CORER */
2149 #define PRTDCB_TCUPM_NO_EXCEED_DM 0x000BC3C0 /* Reset Source: CORER */
2152 #define PRTDCB_TCUPM_REG_CM 0x000BC360 /* Reset Source: CORER */
2155 #define PRTDCB_TCUPM_REG_CTHR 0x000BC380 /* Reset Source: CORER */
2160 #define PRTDCB_TCUPM_REG_DM 0x000BC3A0 /* Reset Source: CORER */
2163 #define PRTDCB_TCUPM_REG_DTHR 0x000BC3E0 /* Reset Source: CORER */
2168 #define PRTDCB_TCUPM_REG_PE_HB_DM 0x000BC400 /* Reset Source: CORER */
2171 #define PRTDCB_TCUPM_REG_PE_HB_DTHR 0x000BC420 /* Reset Source: CORER */
2176 #define PRTDCB_TCUPM_WAIT_PFC_CM 0x000BC440 /* Reset Source: CORER */
2179 #define PRTDCB_TCUPM_WAIT_PFC_CTHR 0x000BC460 /* Reset Source: CORER */
2182 #define PRTDCB_TCUPM_WAIT_PFC_DM 0x000BC480 /* Reset Source: CORER */
2185 #define PRTDCB_TCUPM_WAIT_PFC_DTHR 0x000BC4A0 /* Reset Source: CORER */
2188 #define PRTDCB_TCUPM_WAIT_PFC_PE_HB_DM 0x000BC4C0 /* Reset Source: CORER */
2191 #define PRTDCB_TCUPM_WAIT_PFC_PE_HB_DTHR 0x000BC4E0 /* Reset Source: CORER */
2194 #define PRTDCB_TDPUC 0x00040940 /* Reset Source: CORER */
2221 #define PRTDCB_TFCS 0x001E4560 /* Reset Source: GLOBR */
2240 #define PRTDCB_TLPM_REG_DM 0x000A0000 /* Reset Source: CORER */
2243 #define PRTDCB_TLPM_REG_DTHR 0x000A0020 /* Reset Source: CORER */
2248 #define PRTDCB_TLPM_WAIT_PFC_DM 0x000A0040 /* Reset Source: CORER */
2251 #define PRTDCB_TLPM_WAIT_PFC_DTHR 0x000A0060 /* Reset Source: CORER */
2254 #define PRTDCB_TPFCTS(_i) (0x001E4660 + ((_i) * 32)) /* _i=0...7 */ /* Reset Source: GLOBR */
2258 #define PRTDCB_TUP2TC 0x001D26C0 /* Reset Source: CORER */
2275 #define PRTDCB_TX_DSCP2UP_CTL 0x00040980 /* Reset Source: CORER */
2280 #define PRTDCB_TX_DSCP2UP_IPV4_LUT(_i) (0x000409A0 + ((_i) * 32)) /* _i=0...7 */ /* Reset Source: CORER */
2298 #define PRTDCB_TX_DSCP2UP_IPV6_LUT(_i) (0x00040AA0 + ((_i) * 32)) /* _i=0...7 */ /* Reset Source: CORER */
2316 #define PRTTCB_BULK_DWRR_REG_CREDITS 0x000AE060 /* Reset Source: CORER */
2319 #define PRTTCB_BULK_DWRR_WB_CREDITS 0x000AE080 /* Reset Source: CORER */
2322 #define PRTTCB_CREDIT_EXP 0x000AE100 /* Reset Source: CORER */
2325 #define PRTTCB_LL_DWRR_REG_CREDITS 0x000AE0A0 /* Reset Source: CORER */
2328 #define PRTTCB_LL_DWRR_WB_CREDITS 0x000AE0C0 /* Reset Source: CORER */
2331 #define TCDCB_TCUPM_WAIT_CM(_i) (0x000BC520 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2335 #define TCDCB_TCUPM_WAIT_CTHR(_i) (0x000BC5A0 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2339 #define TCDCB_TCUPM_WAIT_DM(_i) (0x000BC620 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2343 #define TCDCB_TCUPM_WAIT_DTHR(_i) (0x000BC6A0 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2347 #define TCDCB_TCUPM_WAIT_PE_HB_DM(_i) (0x000BC720 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2351 #define TCDCB_TCUPM_WAIT_PE_HB_DTHR(_i) (0x000BC7A0 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2355 #define TCDCB_TLPM_WAIT_DM(_i) (0x000A0080 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2359 #define TCDCB_TLPM_WAIT_DTHR(_i) (0x000A0100 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2363 #define TCTCB_WB_RL_TC_CFG(_i) (0x000AE138 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2369 #define TCTCB_WB_RL_TC_STAT(_i) (0x000AE1B8 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2373 #define TPB_BULK_DWRR_REG_QUANTA 0x00099340 /* Reset Source: CORER */
2376 #define TPB_BULK_DWRR_REG_SAT 0x00099350 /* Reset Source: CORER */
2379 #define TPB_BULK_DWRR_WB_QUANTA 0x00099344 /* Reset Source: CORER */
2382 #define TPB_BULK_DWRR_WB_SAT 0x00099354 /* Reset Source: CORER */
2385 #define TPB_GLDCB_TCB_WB_SP 0x0009966C /* Reset Source: CORER */
2388 #define TPB_GLTCB_CREDIT_EXP_CTL 0x00099664 /* Reset Source: CORER */
2393 #define TPB_LL_DWRR_REG_QUANTA 0x00099348 /* Reset Source: CORER */
2396 #define TPB_LL_DWRR_REG_SAT 0x00099358 /* Reset Source: CORER */
2399 #define TPB_LL_DWRR_WB_QUANTA 0x0009934C /* Reset Source: CORER */
2402 #define TPB_LL_DWRR_WB_SAT 0x0009935C /* Reset Source: CORER */
2405 #define TPB_PRTDCB_TCB_DWRR_CREDITS 0x000991C0 /* Reset Source: CORER */
2408 #define TPB_PRTDCB_TCB_DWRR_QUANTA 0x00099220 /* Reset Source: CORER */
2411 #define TPB_PRTDCB_TCB_DWRR_SAT 0x00099260 /* Reset Source: CORER */
2414 #define TPB_PRTTCB_BULK_DWRR_REG_CREDITS 0x000992A0 /* Reset Source: CORER */
2417 #define TPB_PRTTCB_BULK_DWRR_WB_CREDITS 0x000992C0 /* Reset Source: CORER */
2420 #define TPB_PRTTCB_CREDIT_EXP 0x00099644 /* Reset Source: CORER */
2423 #define TPB_PRTTCB_LL_DWRR_REG_CREDITS 0x00099300 /* Reset Source: CORER */
2426 #define TPB_PRTTCB_LL_DWRR_WB_CREDITS 0x00099320 /* Reset Source: CORER */
2429 #define TPB_WB_RL_TC_CFG(_i) (0x00099360 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2435 #define TPB_WB_RL_TC_STAT(_i) (0x000993E0 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
2439 #define E800_GL_ACLEXT_CDMD_L1SEL(_i) (0x00210054 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2451 #define E800_GL_ACLEXT_CTLTBL_L2ADDR(_i) (0x00210084 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2459 #define E800_GL_ACLEXT_CTLTBL_L2DATA(_i) (0x00210090 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2463 #define E800_GL_ACLEXT_DFLT_L2PRFL(_i) (0x00210138 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2467 #define GL_ACLEXT_DFLT_L2PRFL_ACL(_i) (0x00393800 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2471 #define E800_GL_ACLEXT_FLGS_L1SEL0_1(_i) (0x0021006C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2477 #define E800_GL_ACLEXT_FLGS_L1SEL2_3(_i) (0x00210078 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2483 #define E800_GL_ACLEXT_FLGS_L1TBL(_i) (0x00210060 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2489 #define E800_GL_ACLEXT_FORCE_L1CDID(_i) (0x00210018 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2495 #define E800_GL_ACLEXT_FORCE_PID(_i) (0x00210000 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2501 #define E800_GL_ACLEXT_K2N_L2ADDR(_i) (0x00210144 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2507 #define E800_GL_ACLEXT_K2N_L2DATA(_i) (0x00210150 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2517 #define E800_GL_ACLEXT_L2_PMASK0(_i) (0x002100FC + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2521 #define E800_GL_ACLEXT_L2_PMASK1(_i) (0x00210108 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2525 #define E800_GL_ACLEXT_L2_TMASK0(_i) (0x00210498 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2529 #define E800_GL_ACLEXT_L2_TMASK1(_i) (0x002104A4 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2533 #define E800_GL_ACLEXT_L2BMP0_3(_i) (0x002100A8 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2543 #define E800_GL_ACLEXT_L2BMP4_7(_i) (0x002100B4 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2553 #define E800_GL_ACLEXT_L2PRTMOD(_i) (0x0021009C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2559 #define E800_GL_ACLEXT_N2N_L2ADDR(_i) (0x0021015C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2565 #define E800_GL_ACLEXT_N2N_L2DATA(_i) (0x00210168 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2575 #define E800_GL_ACLEXT_P2P_L1ADDR(_i) (0x00210024 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2581 #define E800_GL_ACLEXT_P2P_L1DATA(_i) (0x00210030 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2585 #define E800_GL_ACLEXT_PID_L2GKTYPE(_i) (0x002100F0 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2589 #define E800_GL_ACLEXT_PLVL_SEL(_i) (0x0021000C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2593 #define E800_GL_ACLEXT_TCAM_L2ADDR(_i) (0x00210114 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2599 #define E800_GL_ACLEXT_TCAM_L2DATALSB(_i) (0x00210120 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2603 #define E800_GL_ACLEXT_TCAM_L2DATAMSB(_i) (0x0021012C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2607 #define E800_GL_ACLEXT_XLT0_L1ADDR(_i) (0x0021003C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2613 #define E800_GL_ACLEXT_XLT0_L1DATA(_i) (0x00210048 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2617 #define E800_GL_ACLEXT_XLT1_L2ADDR(_i) (0x002100C0 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2623 #define E800_GL_ACLEXT_XLT1_L2DATA(_i) (0x002100CC + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2627 #define E800_GL_ACLEXT_XLT2_L2ADDR(_i) (0x002100D8 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2633 #define E800_GL_ACLEXT_XLT2_L2DATA(_i) (0x002100E4 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2637 #define GL_PREEXT_CDMD_L1SEL(_i) (0x0020F054 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2657 #define GL_PREEXT_CTLTBL_L2ADDR(_i) (0x0020F084 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2665 #define GL_PREEXT_CTLTBL_L2DATA(_i) (0x0020F090 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2669 #define GL_PREEXT_DFLT_L2PRFL(_i) (0x0020F138 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2673 #define GL_PREEXT_FLGS_L1SEL0_1(_i) (0x0020F06C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2683 #define GL_PREEXT_FLGS_L1SEL2_3(_i) (0x0020F078 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2693 #define GL_PREEXT_FLGS_L1TBL(_i) (0x0020F060 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2699 #define GL_PREEXT_FORCE_L1CDID(_i) (0x0020F018 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2705 #define GL_PREEXT_FORCE_PID(_i) (0x0020F000 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2711 #define GL_PREEXT_K2N_L2ADDR(_i) (0x0020F144 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2717 #define GL_PREEXT_K2N_L2DATA(_i) (0x0020F150 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2727 #define GL_PREEXT_L2_PMASK0(_i) (0x0020F0FC + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2731 #define GL_PREEXT_L2_PMASK1(_i) (0x0020F108 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2735 #define GL_PREEXT_L2_TMASK0(_i) (0x0020F498 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2739 #define GL_PREEXT_L2_TMASK1(_i) (0x0020F4A4 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2743 #define GL_PREEXT_L2BMP0_3(_i) (0x0020F0A8 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2753 #define GL_PREEXT_L2BMP4_7(_i) (0x0020F0B4 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2763 #define GL_PREEXT_L2PRTMOD(_i) (0x0020F09C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2769 #define GL_PREEXT_N2N_L2ADDR(_i) (0x0020F15C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2775 #define GL_PREEXT_N2N_L2DATA(_i) (0x0020F168 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2785 #define GL_PREEXT_P2P_L1ADDR(_i) (0x0020F024 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2791 #define GL_PREEXT_P2P_L1DATA(_i) (0x0020F030 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2795 #define GL_PREEXT_PID_L2GKTYPE(_i) (0x0020F0F0 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2799 #define GL_PREEXT_PLVL_SEL(_i) (0x0020F00C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2803 #define GL_PREEXT_TCAM_L2ADDR(_i) (0x0020F114 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2809 #define GL_PREEXT_TCAM_L2DATALSB(_i) (0x0020F120 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2813 #define GL_PREEXT_TCAM_L2DATAMSB(_i) (0x0020F12C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2817 #define GL_PREEXT_XLT0_L1ADDR(_i) (0x0020F03C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2823 #define GL_PREEXT_XLT0_L1DATA(_i) (0x0020F048 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2827 #define GL_PREEXT_XLT1_L2ADDR(_i) (0x0020F0C0 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2833 #define GL_PREEXT_XLT1_L2DATA(_i) (0x0020F0CC + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2837 #define GL_PREEXT_XLT2_L2ADDR(_i) (0x0020F0D8 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2843 #define GL_PREEXT_XLT2_L2DATA(_i) (0x0020F0E4 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2847 #define GL_PSTEXT_CDMD_L1SEL(_i) (0x0020E054 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2867 #define GL_PSTEXT_CTLTBL_L2ADDR(_i) (0x0020E084 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2875 #define GL_PSTEXT_CTLTBL_L2DATA(_i) (0x0020E090 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2879 #define GL_PSTEXT_DFLT_L2PRFL(_i) (0x0020E138 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2883 #define GL_PSTEXT_FL15_BMPLSB(_i) (0x0020E480 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2887 #define GL_PSTEXT_FL15_BMPMSB(_i) (0x0020E48C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2891 #define GL_PSTEXT_FLGS_L1SEL0_1(_i) (0x0020E06C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2901 #define GL_PSTEXT_FLGS_L1SEL2_3(_i) (0x0020E078 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2911 #define GL_PSTEXT_FLGS_L1TBL(_i) (0x0020E060 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2917 #define GL_PSTEXT_FORCE_L1CDID(_i) (0x0020E018 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2923 #define GL_PSTEXT_FORCE_PID(_i) (0x0020E000 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2929 #define GL_PSTEXT_K2N_L2ADDR(_i) (0x0020E144 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2935 #define GL_PSTEXT_K2N_L2DATA(_i) (0x0020E150 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2945 #define GL_PSTEXT_L2_PMASK0(_i) (0x0020E0FC + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2949 #define GL_PSTEXT_L2_PMASK1(_i) (0x0020E108 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2953 #define GL_PSTEXT_L2_TMASK0(_i) (0x0020E498 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2957 #define GL_PSTEXT_L2_TMASK1(_i) (0x0020E4A4 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2961 #define GL_PSTEXT_L2PRTMOD(_i) (0x0020E09C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2967 #define GL_PSTEXT_N2N_L2ADDR(_i) (0x0020E15C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2973 #define GL_PSTEXT_N2N_L2DATA(_i) (0x0020E168 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2983 #define GL_PSTEXT_P2P_L1ADDR(_i) (0x0020E024 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2989 #define GL_PSTEXT_P2P_L1DATA(_i) (0x0020E030 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2993 #define GL_PSTEXT_PID_L2GKTYPE(_i) (0x0020E0F0 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
2997 #define GL_PSTEXT_PLVL_SEL(_i) (0x0020E00C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3001 #define GL_PSTEXT_PRFLM_CTRL(_i) (0x0020E474 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3009 #define GL_PSTEXT_PRFLM_DATA_0(_i) (0x0020E174 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3015 #define GL_PSTEXT_PRFLM_DATA_1(_i) (0x0020E274 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3021 #define GL_PSTEXT_PRFLM_DATA_2(_i) (0x0020E374 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3027 #define GL_PSTEXT_TCAM_L2ADDR(_i) (0x0020E114 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3033 #define GL_PSTEXT_TCAM_L2DATALSB(_i) (0x0020E120 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3037 #define GL_PSTEXT_TCAM_L2DATAMSB(_i) (0x0020E12C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3041 #define GL_PSTEXT_XLT0_L1ADDR(_i) (0x0020E03C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3047 #define GL_PSTEXT_XLT0_L1DATA(_i) (0x0020E048 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3051 #define GL_PSTEXT_XLT1_L2ADDR(_i) (0x0020E0C0 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3057 #define GL_PSTEXT_XLT1_L2DATA(_i) (0x0020E0CC + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3061 #define GL_PSTEXT_XLT2_L2ADDR(_i) (0x0020E0D8 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3067 #define GL_PSTEXT_XLT2_L2DATA(_i) (0x0020E0E4 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3071 #define GLFLXP_PTYPE_TRANSLATION(_i) (0x0045C000 + ((_i) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
3081 #define GLFLXP_RX_CMD_LX_PROT_IDX(_i) (0x0045C400 + ((_i) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
3093 #define GLFLXP_RX_CMD_PROTIDS(_i, _j) (0x0045A000 + ((_i) * 4 + (_j) * 1024)) /* _i=0...255, _j=0...5 */ /* Reset Source: CORER */
3103 #define GLFLXP_RXDID_FLAGS(_i, _j) (0x0045D000 + ((_i) * 4 + (_j) * 256)) /* _i=0...63, _j=0...4 */ /* Reset Source: CORER */
3113 #define GLFLXP_RXDID_FLAGS1_OVERRIDE(_i) (0x0045D600 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3117 #define GLFLXP_RXDID_FLX_WRD_0(_i) (0x0045C800 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3125 #define GLFLXP_RXDID_FLX_WRD_1(_i) (0x0045C900 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3133 #define GLFLXP_RXDID_FLX_WRD_2(_i) (0x0045CA00 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3141 #define GLFLXP_RXDID_FLX_WRD_3(_i) (0x0045CB00 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3149 #define GLFLXP_RXDID_FLX_WRD_4(_i) (0x0045CC00 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3157 #define GLFLXP_RXDID_FLX_WRD_5(_i) (0x0045CD00 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3165 #define GLFLXP_TX_SCHED_CORRECT(_i, _j) (0x00458000 + ((_i) * 4 + (_j) * 256)) /* _i=0...63, _j=0...31 */ /* Reset Source: CORER */
3175 #define QRXFLXP_CNTXT(_QRX) (0x00480000 + ((_QRX) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
3183 #define GL_FWSTS 0x00083048 /* Reset Source: POR */
3192 #define GL_TCVMLR_DRAIN_CNTR_CTL 0x000A21E0 /* Reset Source: CORER */
3199 #define GL_TCVMLR_DRAIN_DONE_DEC 0x000A21A8 /* Reset Source: CORER */
3206 #define GL_TCVMLR_DRAIN_DONE_TCLAN(_i) (0x000A20A8 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
3210 #define GL_TCVMLR_DRAIN_DONE_TPB(_i) (0x000A2128 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
3214 #define GL_TCVMLR_DRAIN_MARKER 0x000A2008 /* Reset Source: CORER */
3219 #define GL_TCVMLR_ERR_STAT 0x000A2024 /* Reset Source: CORER */
3230 #define GL_TCVMLR_QCFG 0x000A2010 /* Reset Source: CORER */
3239 #define GL_TCVMLR_QCFG_RD 0x000A2014 /* Reset Source: CORER */
3246 #define GL_TCVMLR_QCNTR 0x000A200C /* Reset Source: CORER */
3249 #define GL_TCVMLR_QCTL 0x000A2004 /* Reset Source: CORER */
3254 #define GL_TCVMLR_REQ_STAT 0x000A2018 /* Reset Source: CORER */
3263 #define GL_TCVMLR_STAT 0x000A201C /* Reset Source: CORER */
3270 #define GL_XLR_MARKER_TRIG_TCVMLR 0x000A2000 /* Reset Source: CORER */
3279 #define GL_XLR_MARKER_TRIG_VMLR 0x00093804 /* Reset Source: CORER */
3288 #define GLGEN_ANA_ABORT_PTYPE 0x0020C21C /* Reset Source: CORER */
3291 #define GLGEN_ANA_ALU_ACCSS_OUT_OF_PKT 0x0020C208 /* Reset Source: CORER */
3294 #define GLGEN_ANA_CFG_CTRL 0x0020C104 /* Reset Source: CORER */
3303 #define GLGEN_ANA_CFG_HTBL_LU_RESULT 0x0020C158 /* Reset Source: CORER */
3310 #define GLGEN_ANA_CFG_LU_KEY(_i) (0x0020C14C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3314 #define GLGEN_ANA_CFG_RDDATA(_i) (0x0020C10C + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
3318 #define GLGEN_ANA_CFG_SPLBUF_LU_RESULT 0x0020C15C /* Reset Source: CORER */
3325 #define GLGEN_ANA_CFG_WRDATA 0x0020C108 /* Reset Source: CORER */
3328 #define GLGEN_ANA_DEF_PTYPE 0x0020C100 /* Reset Source: CORER */
3331 #define GLGEN_ANA_ERR_CTRL 0x0020C220 /* Reset Source: CORER */
3334 #define GLGEN_ANA_FLAG_MAP(_i) (0x0020C000 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3340 #define GLGEN_ANA_INV_NODE_PTYPE 0x0020C210 /* Reset Source: CORER */
3343 #define GLGEN_ANA_INV_PTYPE_MARKER 0x0020C218 /* Reset Source: CORER */
3346 #define GLGEN_ANA_LAST_PROT_ID(_i) (0x0020C1E4 + ((_i) * 4)) /* _i=0...5 */ /* Reset Source: CORER */
3352 #define GLGEN_ANA_NMPG_KEYMASK(_i) (0x0020C1D0 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
3356 #define GLGEN_ANA_NMPG0_HASHKEY(_i) (0x0020C1B0 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
3360 #define GLGEN_ANA_NO_HIT_PG_NM_PG 0x0020C204 /* Reset Source: CORER */
3363 #define GLGEN_ANA_OUT_OF_PKT 0x0020C200 /* Reset Source: CORER */
3366 #define GLGEN_ANA_P2P(_i) (0x0020C160 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
3370 #define GLGEN_ANA_PG_KEYMASK(_i) (0x0020C1C0 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
3374 #define GLGEN_ANA_PG0_HASHKEY(_i) (0x0020C1A0 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
3378 #define GLGEN_ANA_PROFIL_CTRL 0x0020C1FC /* Reset Source: CORER */
3391 #define GLGEN_ANA_TX_ABORT_PTYPE 0x0020D21C /* Reset Source: CORER */
3394 #define GLGEN_ANA_TX_ALU_ACCSS_OUT_OF_PKT 0x0020D208 /* Reset Source: CORER */
3397 #define GLGEN_ANA_TX_CFG_CTRL 0x0020D104 /* Reset Source: CORER */
3406 #define GLGEN_ANA_TX_CFG_HTBL_LU_RESULT 0x0020D158 /* Reset Source: CORER */
3413 #define GLGEN_ANA_TX_CFG_LU_KEY(_i) (0x0020D14C + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
3417 #define GLGEN_ANA_TX_CFG_RDDATA(_i) (0x0020D10C + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
3421 #define GLGEN_ANA_TX_CFG_SPLBUF_LU_RESULT 0x0020D15C /* Reset Source: CORER */
3428 #define GLGEN_ANA_TX_CFG_WRDATA 0x0020D108 /* Reset Source: CORER */
3431 #define GLGEN_ANA_TX_DEF_PTYPE 0x0020D100 /* Reset Source: CORER */
3434 #define GLGEN_ANA_TX_DFD_PACE_OUT 0x0020D4CC /* Reset Source: CORER */
3437 #define GLGEN_ANA_TX_ERR_CTRL 0x0020D220 /* Reset Source: CORER */
3440 #define GLGEN_ANA_TX_FLAG_MAP(_i) (0x0020D000 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
3446 #define GLGEN_ANA_TX_INV_NODE_PTYPE 0x0020D210 /* Reset Source: CORER */
3449 #define GLGEN_ANA_TX_INV_PROT_ID 0x0020D214 /* Reset Source: CORER */
3452 #define GLGEN_ANA_TX_INV_PTYPE_MARKER 0x0020D218 /* Reset Source: CORER */
3455 #define GLGEN_ANA_TX_NMPG_KEYMASK(_i) (0x0020D1D0 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
3459 #define GLGEN_ANA_TX_NMPG0_HASHKEY(_i) (0x0020D1B0 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
3463 #define GLGEN_ANA_TX_NO_HIT_PG_NM_PG 0x0020D204 /* Reset Source: CORER */
3466 #define GLGEN_ANA_TX_P2P(_i) (0x0020D160 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
3470 #define GLGEN_ANA_TX_PG_KEYMASK(_i) (0x0020D1C0 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
3474 #define GLGEN_ANA_TX_PG0_HASHKEY(_i) (0x0020D1A0 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
3478 #define GLGEN_ANA_TX_PROFIL_CTRL 0x0020D1FC /* Reset Source: CORER */
3491 #define GLGEN_ASSERT_HLP 0x000B81E4 /* Reset Source: POR */
3496 #define GLGEN_CLKSTAT 0x000B8184 /* Reset Source: POR */
3509 #define GLGEN_CLKSTAT_SRC 0x000B826C /* Reset Source: POR */
3520 #define GLGEN_ECC_ERR_INT_TOG_MASK_H 0x00093A00 /* Reset Source: CORER */
3523 #define GLGEN_ECC_ERR_INT_TOG_MASK_L 0x000939FC /* Reset Source: CORER */
3526 #define GLGEN_ECC_ERR_RST_MASK_H 0x000939F8 /* Reset Source: CORER */
3529 #define GLGEN_ECC_ERR_RST_MASK_L 0x000939F4 /* Reset Source: CORER */
3532 #define GLGEN_GPIO_CTL(_i) (0x000880C8 + ((_i) * 4)) /* _i=0...6 */ /* Reset Source: POR */
3550 #define GLGEN_MARKER_COUNT 0x000939E8 /* Reset Source: CORER */
3555 #define GLGEN_RSTAT 0x000B8188 /* Reset Source: POR */
3574 #define GLGEN_RSTCTL 0x000B8180 /* Reset Source: POR */
3583 #define GLGEN_RTRIG 0x000B8190 /* Reset Source: CORER */
3590 #define GLGEN_STAT 0x000B612C /* Reset Source: POR */
3593 #define GLGEN_VFLRSTAT(_i) (0x00093A04 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3597 #define GLGEN_XLR_MSK2HLP_RDY 0x000939F0 /* Reset Source: CORER */
3600 #define GLGEN_XLR_TRNS_WAIT_COUNT 0x000939EC /* Reset Source: CORER */
3605 #define GLVFGEN_TIMER 0x000B8214 /* Reset Source: POR */
3608 #define PFGEN_CTRL 0x00091000 /* Reset Source: CORER */
3611 #define PFGEN_DRUN 0x00091180 /* Reset Source: CORER */
3614 #define PFGEN_PFRSTAT 0x00091080 /* Reset Source: CORER */
3617 #define PFGEN_PORTNUM 0x001D2400 /* Reset Source: CORER */
3620 #define PFGEN_STATE 0x00088000 /* Reset Source: CORER */
3629 #define PRT_TCVMLR_DRAIN_CNTR 0x000A21C0 /* Reset Source: CORER */
3632 #define PRTGEN_CNF 0x000B8120 /* Reset Source: POR */
3639 #define PRTGEN_CNF2 0x000B8160 /* Reset Source: POR */
3642 #define PRTGEN_CNF3 0x000B8280 /* Reset Source: POR */
3645 #define PRTGEN_STATUS 0x000B8100 /* Reset Source: POR */
3650 #define VFGEN_RSTAT(_VF) (0x00074000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: VFR */
3654 #define VPGEN_VFRSTAT(_VF) (0x00090800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
3658 #define VPGEN_VFRTRIG(_VF) (0x00090000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
3662 #define VSIGEN_RSTAT(_VSI) (0x00092800 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
3666 #define VSIGEN_RTRIG(_VSI) (0x00091800 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
3670 #define GLHMC_APBVTINUSEBASE(_i) (0x00524A00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3674 #define GLHMC_CEQPART(_i) (0x005031C0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3680 #define GLHMC_DBCQMAX 0x005220F0 /* Reset Source: CORER */
3683 #define GLHMC_DBCQPART(_i) (0x00503180 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3689 #define GLHMC_DBQPMAX 0x005220EC /* Reset Source: CORER */
3692 #define GLHMC_DBQPPART(_i) (0x005044C0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3698 #define GLHMC_FSIAVBASE(_i) (0x00525600 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3702 #define GLHMC_FSIAVCNT(_i) (0x00525700 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3706 #define GLHMC_FSIAVMAX 0x00522068 /* Reset Source: CORER */
3709 #define GLHMC_FSIAVOBJSZ 0x00522064 /* Reset Source: CORER */
3712 #define GLHMC_FSIMCBASE(_i) (0x00526000 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3716 #define GLHMC_FSIMCCNT(_i) (0x00526100 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3720 #define GLHMC_FSIMCMAX 0x00522060 /* Reset Source: CORER */
3723 #define GLHMC_FSIMCOBJSZ 0x0052205C /* Reset Source: CORER */
3726 #define GLHMC_FWPDINV 0x0052207C /* Reset Source: CORER */
3733 #define GLHMC_FWPDINV_FPMAT 0x0010207C /* Reset Source: CORER */
3740 #define GLHMC_FWSDDATAHIGH 0x00522078 /* Reset Source: CORER */
3743 #define GLHMC_FWSDDATAHIGH_FPMAT 0x00102078 /* Reset Source: CORER */
3746 #define GLHMC_FWSDDATALOW 0x00522074 /* Reset Source: CORER */
3755 #define GLHMC_FWSDDATALOW_FPMAT 0x00102074 /* Reset Source: CORER */
3764 #define GLHMC_PEARPBASE(_i) (0x00524800 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3768 #define GLHMC_PEARPCNT(_i) (0x00524900 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3772 #define GLHMC_PEARPMAX 0x00522038 /* Reset Source: CORER */
3775 #define GLHMC_PEARPOBJSZ 0x00522034 /* Reset Source: CORER */
3778 #define GLHMC_PECQBASE(_i) (0x00524200 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3782 #define GLHMC_PECQCNT(_i) (0x00524300 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3786 #define GLHMC_PECQOBJSZ 0x00522020 /* Reset Source: CORER */
3789 #define GLHMC_PEHDRBASE(_i) (0x00526200 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3793 #define GLHMC_PEHDRCNT(_i) (0x00526300 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3797 #define GLHMC_PEHDRMAX 0x00522008 /* Reset Source: CORER */
3802 #define GLHMC_PEHDROBJSZ 0x00522004 /* Reset Source: CORER */
3807 #define GLHMC_PEHTCNT(_i) (0x00524700 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3811 #define GLHMC_PEHTCNT_FPMAT(_i) (0x00104700 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3815 #define GLHMC_PEHTEBASE(_i) (0x00524600 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3819 #define GLHMC_PEHTEBASE_FPMAT(_i) (0x00104600 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3823 #define GLHMC_PEHTEOBJSZ 0x0052202C /* Reset Source: CORER */
3826 #define GLHMC_PEHTEOBJSZ_FPMAT 0x0010202C /* Reset Source: CORER */
3829 #define GLHMC_PEHTMAX 0x00522030 /* Reset Source: CORER */
3832 #define GLHMC_PEHTMAX_FPMAT 0x00102030 /* Reset Source: CORER */
3835 #define GLHMC_PEMDBASE(_i) (0x00526400 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3839 #define GLHMC_PEMDCNT(_i) (0x00526500 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3843 #define GLHMC_PEMDMAX 0x00522010 /* Reset Source: CORER */
3848 #define GLHMC_PEMDOBJSZ 0x0052200C /* Reset Source: CORER */
3853 #define GLHMC_PEMRBASE(_i) (0x00524C00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3857 #define GLHMC_PEMRCNT(_i) (0x00524D00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3861 #define GLHMC_PEMRMAX 0x00522040 /* Reset Source: CORER */
3864 #define GLHMC_PEMROBJSZ 0x0052203C /* Reset Source: CORER */
3867 #define GLHMC_PEOOISCBASE(_i) (0x00526600 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3871 #define GLHMC_PEOOISCCNT(_i) (0x00526700 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3875 #define GLHMC_PEOOISCFFLBASE(_i) (0x00526C00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3879 #define GLHMC_PEOOISCFFLCNT_PMAT(_i) (0x00526D00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3883 #define GLHMC_PEOOISCFFLMAX 0x005220A4 /* Reset Source: CORER */
3888 #define GLHMC_PEOOISCMAX 0x00522018 /* Reset Source: CORER */
3893 #define GLHMC_PEOOISCOBJSZ 0x00522014 /* Reset Source: CORER */
3898 #define GLHMC_PEPBLBASE(_i) (0x00525800 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3902 #define GLHMC_PEPBLCNT(_i) (0x00525900 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3906 #define GLHMC_PEPBLMAX 0x0052206C /* Reset Source: CORER */
3909 #define GLHMC_PEQ1BASE(_i) (0x00525200 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3913 #define GLHMC_PEQ1CNT(_i) (0x00525300 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3917 #define GLHMC_PEQ1FLBASE(_i) (0x00525400 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3921 #define GLHMC_PEQ1FLMAX 0x00522058 /* Reset Source: CORER */
3924 #define GLHMC_PEQ1MAX 0x00522054 /* Reset Source: CORER */
3927 #define GLHMC_PEQ1OBJSZ 0x00522050 /* Reset Source: CORER */
3930 #define GLHMC_PEQPBASE(_i) (0x00524000 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3934 #define GLHMC_PEQPCNT(_i) (0x00524100 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3938 #define GLHMC_PEQPOBJSZ 0x0052201C /* Reset Source: CORER */
3941 #define GLHMC_PERRFBASE(_i) (0x00526800 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3945 #define GLHMC_PERRFCNT(_i) (0x00526900 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3949 #define GLHMC_PERRFFLBASE(_i) (0x00526A00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3953 #define GLHMC_PERRFFLCNT_PMAT(_i) (0x00526B00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3957 #define GLHMC_PERRFFLMAX 0x005220A0 /* Reset Source: CORER */
3962 #define GLHMC_PERRFMAX 0x0052209C /* Reset Source: CORER */
3967 #define GLHMC_PERRFOBJSZ 0x00522098 /* Reset Source: CORER */
3972 #define GLHMC_PETIMERBASE(_i) (0x00525A00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3976 #define GLHMC_PETIMERCNT(_i) (0x00525B00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3980 #define GLHMC_PETIMERMAX 0x00522084 /* Reset Source: CORER */
3983 #define GLHMC_PETIMEROBJSZ 0x00522080 /* Reset Source: CORER */
3986 #define GLHMC_PEXFBASE(_i) (0x00524E00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3990 #define GLHMC_PEXFCNT(_i) (0x00524F00 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3994 #define GLHMC_PEXFFLBASE(_i) (0x00525000 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
3998 #define GLHMC_PEXFFLMAX 0x0052204C /* Reset Source: CORER */
4001 #define GLHMC_PEXFMAX 0x00522048 /* Reset Source: CORER */
4004 #define GLHMC_PEXFOBJSZ 0x00522044 /* Reset Source: CORER */
4007 #define GLHMC_PFPESDPART(_i) (0x00520880 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
4013 #define GLHMC_PFPESDPART_FPMAT(_i) (0x00100880 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
4019 #define GLHMC_SDPART(_i) (0x00520800 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
4025 #define GLHMC_SDPART_FPMAT(_i) (0x00100800 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
4031 #define GLHMC_VFAPBVTINUSEBASE(_i) (0x0052CA00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4035 #define GLHMC_VFCEQPART(_i) (0x00502F00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4041 #define GLHMC_VFDBCQPART(_i) (0x00502E00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4047 #define GLHMC_VFDBQPPART(_i) (0x00504520 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4053 #define GLHMC_VFFSIAVBASE(_i) (0x0052D600 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4057 #define GLHMC_VFFSIAVCNT(_i) (0x0052D700 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4061 #define GLHMC_VFFSIMCBASE(_i) (0x0052E000 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4065 #define GLHMC_VFFSIMCCNT(_i) (0x0052E100 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4069 #define GLHMC_VFPDINV(_i) (0x00528300 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4077 #define GLHMC_VFPDINV_FPMAT(_i) (0x00108300 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4085 #define GLHMC_VFPEARPBASE(_i) (0x0052C800 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4089 #define GLHMC_VFPEARPCNT(_i) (0x0052C900 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4093 #define GLHMC_VFPECQBASE(_i) (0x0052C200 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4097 #define GLHMC_VFPECQCNT(_i) (0x0052C300 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4101 #define GLHMC_VFPEHDRBASE(_i) (0x0052E200 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4105 #define GLHMC_VFPEHDRCNT(_i) (0x0052E300 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4109 #define GLHMC_VFPEHTCNT(_i) (0x0052C700 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4113 #define GLHMC_VFPEHTCNT_FPMAT(_i) (0x0010C700 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4117 #define GLHMC_VFPEHTEBASE(_i) (0x0052C600 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4121 #define GLHMC_VFPEHTEBASE_FPMAT(_i) (0x0010C600 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4125 #define GLHMC_VFPEMDBASE(_i) (0x0052E400 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4129 #define GLHMC_VFPEMDCNT(_i) (0x0052E500 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4133 #define GLHMC_VFPEMRBASE(_i) (0x0052CC00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4137 #define GLHMC_VFPEMRCNT(_i) (0x0052CD00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4141 #define GLHMC_VFPEOOISCBASE(_i) (0x0052E600 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4145 #define GLHMC_VFPEOOISCCNT(_i) (0x0052E700 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4149 #define GLHMC_VFPEOOISCFFLBASE(_i) (0x0052EC00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4153 #define GLHMC_VFPEPBLBASE(_i) (0x0052D800 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4157 #define GLHMC_VFPEPBLCNT(_i) (0x0052D900 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4161 #define GLHMC_VFPEQ1BASE(_i) (0x0052D200 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4165 #define GLHMC_VFPEQ1CNT(_i) (0x0052D300 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4169 #define GLHMC_VFPEQ1FLBASE(_i) (0x0052D400 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4173 #define GLHMC_VFPEQPBASE(_i) (0x0052C000 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4177 #define GLHMC_VFPEQPCNT(_i) (0x0052C100 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4181 #define GLHMC_VFPERRFBASE(_i) (0x0052E800 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4185 #define GLHMC_VFPERRFCNT(_i) (0x0052E900 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4189 #define GLHMC_VFPERRFFLBASE(_i) (0x0052EA00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4193 #define GLHMC_VFPETIMERBASE(_i) (0x0052DA00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4197 #define GLHMC_VFPETIMERCNT(_i) (0x0052DB00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4201 #define GLHMC_VFPEXFBASE(_i) (0x0052CE00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4205 #define GLHMC_VFPEXFCNT(_i) (0x0052CF00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4209 #define GLHMC_VFPEXFFLBASE(_i) (0x0052D000 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4213 #define GLHMC_VFSDDATAHIGH(_i) (0x00528200 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4217 #define GLHMC_VFSDDATAHIGH_FPMAT(_i) (0x00108200 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4221 #define GLHMC_VFSDDATALOW(_i) (0x00528100 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4231 #define GLHMC_VFSDDATALOW_FPMAT(_i) (0x00108100 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4241 #define GLHMC_VFSDPART(_i) (0x00528800 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4247 #define GLHMC_VFSDPART_FPMAT(_i) (0x00108800 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
4253 #define GLMDOC_CACHESIZE 0x0051C06C /* Reset Source: CORER */
4260 #define GLPBLOC0_CACHESIZE 0x00518074 /* Reset Source: CORER */
4267 #define GLPBLOC1_CACHESIZE 0x0051A074 /* Reset Source: CORER */
4274 #define GLPDOC_CACHESIZE 0x00530048 /* Reset Source: CORER */
4281 #define GLPDOC_CACHESIZE_FPMAT 0x00110088 /* Reset Source: CORER */
4288 #define GLPEOC0_CACHESIZE 0x005140A8 /* Reset Source: CORER */
4295 #define GLPEOC1_CACHESIZE 0x005160A8 /* Reset Source: CORER */
4302 #define PFHMC_ERRORDATA 0x00520500 /* Reset Source: PFR */
4305 #define PFHMC_ERRORDATA_FPMAT 0x00100500 /* Reset Source: PFR */
4308 #define PFHMC_ERRORINFO 0x00520400 /* Reset Source: PFR */
4319 #define PFHMC_ERRORINFO_FPMAT 0x00100400 /* Reset Source: PFR */
4330 #define PFHMC_PDINV 0x00520300 /* Reset Source: PFR */
4337 #define PFHMC_PDINV_FPMAT 0x00100300 /* Reset Source: PFR */
4344 #define PFHMC_SDCMD 0x00520000 /* Reset Source: PFR */
4351 #define PFHMC_SDCMD_FPMAT 0x00100000 /* Reset Source: PFR */
4358 #define PFHMC_SDDATAHIGH 0x00520200 /* Reset Source: PFR */
4361 #define PFHMC_SDDATAHIGH_FPMAT 0x00100200 /* Reset Source: PFR */
4364 #define PFHMC_SDDATALOW 0x00520100 /* Reset Source: PFR */
4373 #define PFHMC_SDDATALOW_FPMAT 0x00100100 /* Reset Source: PFR */
4382 #define GL_DSI_REPC 0x00294208 /* Reset Source: CORER */
4387 #define GL_MDCK_TDAT_TCLAN 0x000FC0DC /* Reset Source: CORER */
4430 #define GLCORE_CLKCTL_H 0x000B81E8 /* Reset Source: POR */
4441 #define GLCORE_CLKCTL_L 0x000B8254 /* Reset Source: POR */
4452 #define GLCORE_CLKCTL_M 0x000B8258 /* Reset Source: POR */
4463 #define GLFOC_CACHESIZE 0x000AA074 /* Reset Source: CORER */
4470 #define GLMAC_CLKSTAT 0x000B8210 /* Reset Source: POR */
4487 #define GLTPB_100G_MAC_FC_THRESH 0x00099510 /* Reset Source: CORER */
4492 #define E800_GLTPB_100G_RPB_FC_THRESH 0x0009963C /* Reset Source: CORER */
4497 #define GLTPB_PACING_10G 0x000994E4 /* Reset Source: CORER */
4504 #define GLTPB_PACING_25G 0x000994E0 /* Reset Source: CORER */
4511 #define GLTPB_PORT_PACING_SPEED 0x000994E8 /* Reset Source: CORER */
4528 #define TPB_CFG_SCHEDULED_BC_THRESHOLD 0x00099494 /* Reset Source: CORER */
4531 #define GL_UFUSE_SOC 0x000A400C /* Reset Source: POR */
4554 #define EMPINT_GPIO_ENA 0x000880C0 /* Reset Source: POR */
4569 #define GLGEN_MAC_LINK_TOPO 0x000B81DC /* Reset Source: GLOBR */
4572 #define GLINT_CEQCTL(_INT) (0x0015C000 + ((_INT) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
4582 #define GLINT_CTL 0x0016CC54 /* Reset Source: CORER */
4595 #define GLINT_DYN_CTL(_INT) (0x00160000 + ((_INT) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
4615 #define GLINT_FW_TOOL_CTL 0x0016C840 /* Reset Source: CORER */
4624 #define GLINT_ITR(_i, _INT) (0x00154000 + ((_i) * 8192 + (_INT) * 4)) /* _i=0...2, _INT=0...2047 */ /* Reset Source: CORER */
4628 #define GLINT_RATE(_INT) (0x0015A000 + ((_INT) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
4634 #define GLINT_TSYN_PFMSTR(_i) (0x0016CCC0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
4638 #define GLINT_TSYN_PHY 0x0016CC50 /* Reset Source: CORER */
4643 #define GLINT_VECT2FUNC(_INT) (0x00162000 + ((_INT) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
4651 #define PF0INT_FW_HLP_CTL 0x0016C844 /* Reset Source: CORER */
4660 #define PF0INT_FW_PSM_CTL 0x0016C848 /* Reset Source: CORER */
4669 #define PF0INT_MBX_CPM_CTL 0x0016B2C0 /* Reset Source: CORER */
4678 #define PF0INT_MBX_HLP_CTL 0x0016B2C4 /* Reset Source: CORER */
4687 #define PF0INT_MBX_PSM_CTL 0x0016B2C8 /* Reset Source: CORER */
4696 #define PF0INT_OICR_CPM 0x0016CC40 /* Reset Source: CORER */
4747 #define PF0INT_OICR_CTL_CPM 0x0016CC48 /* Reset Source: CORER */
4756 #define PF0INT_OICR_CTL_HLP 0x0016CC5C /* Reset Source: CORER */
4765 #define PF0INT_OICR_CTL_PSM 0x0016CC64 /* Reset Source: CORER */
4774 #define PF0INT_OICR_ENA_CPM 0x0016CC60 /* Reset Source: CORER */
4779 #define PF0INT_OICR_ENA_HLP 0x0016CC4C /* Reset Source: CORER */
4784 #define PF0INT_OICR_ENA_PSM 0x0016CC58 /* Reset Source: CORER */
4789 #define PF0INT_OICR_HLP 0x0016CC68 /* Reset Source: CORER */
4840 #define PF0INT_OICR_PSM 0x0016CC44 /* Reset Source: CORER */
4891 #define PF0INT_SB_CPM_CTL 0x0016B2CC /* Reset Source: CORER */
4900 #define PF0INT_SB_HLP_CTL 0x0016B640 /* Reset Source: CORER */
4909 #define PFINT_AEQCTL 0x0016CB00 /* Reset Source: CORER */
4918 #define PFINT_ALLOC 0x001D2600 /* Reset Source: CORER */
4925 #define PFINT_ALLOC_PCI 0x0009D800 /* Reset Source: PCIR */
4932 #define PFINT_FW_CTL 0x0016C800 /* Reset Source: CORER */
4941 #define PFINT_GPIO_ENA 0x00088080 /* Reset Source: CORER */
4956 #define PFINT_MBX_CTL 0x0016B280 /* Reset Source: CORER */
4965 #define PFINT_OICR 0x0016CA00 /* Reset Source: CORER */
5016 #define PFINT_OICR_CTL 0x0016CA80 /* Reset Source: CORER */
5025 #define PFINT_OICR_ENA 0x0016C900 /* Reset Source: CORER */
5030 #define PFINT_SB_CTL 0x0016B600 /* Reset Source: CORER */
5039 #define PFINT_TSYN_MSK 0x0016C980 /* Reset Source: CORER */
5044 #define QINT_RQCTL(_QRX) (0x00150000 + ((_QRX) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
5054 #define QINT_TQCTL(_DBQM) (0x00140000 + ((_DBQM) * 4)) /* _i=0...16383 */ /* Reset Source: CORER */
5064 #define VPINT_AEQCTL(_VF) (0x0016B800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5074 #define VPINT_ALLOC(_VF) (0x001D1000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5082 #define VPINT_ALLOC_PCI(_VF) (0x0009D000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PCIR */
5090 #define VPINT_MBX_CPM_CTL(_VP128) (0x0016B000 + ((_VP128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
5100 #define VPINT_MBX_CTL(_VSI) (0x0016A000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
5110 #define VPINT_MBX_HLP_CTL(_VP16) (0x0016B200 + ((_VP16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
5120 #define VPINT_MBX_PSM_CTL(_VP16) (0x0016B240 + ((_VP16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
5130 #define VPINT_SB_CPM_CTL(_VP128) (0x0016B400 + ((_VP128) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
5140 #define GL_HLP_PRT_IPG_PREAMBLE_SIZE(_i) (0x00049240 + ((_i) * 4)) /* _i=0...20 */ /* Reset Source: CORER */
5144 #define GL_TDPU_PSM_DEFAULT_RECIPE(_i) (0x00049294 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
5156 #define GLLAN_PF_RECIPE(_i) (0x0029420C + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
5160 #define GLLAN_RCTL_0 0x002941F8 /* Reset Source: CORER */
5163 #define GLLAN_RCTL_1 0x002941FC /* Reset Source: CORER */
5172 #define GLLAN_TSOMSK_F 0x00049308 /* Reset Source: CORER */
5175 #define GLLAN_TSOMSK_L 0x00049310 /* Reset Source: CORER */
5178 #define GLLAN_TSOMSK_M 0x0004930C /* Reset Source: CORER */
5181 #define PFLAN_CP_QALLOC 0x00075700 /* Reset Source: CORER */
5188 #define PFLAN_DB_QALLOC 0x00075680 /* Reset Source: CORER */
5195 #define PFLAN_RX_QALLOC 0x001D2500 /* Reset Source: CORER */
5202 #define PFLAN_TX_QALLOC 0x001D2580 /* Reset Source: CORER */
5209 #define PRT_TDPUL2TAGSEN 0x00040BA0 /* Reset Source: CORER */
5214 #define QRX_CONTEXT(_i, _QRX) (0x00280000 + ((_i) * 8192 + (_QRX) * 4)) /* _i=0...7, _QRX=0...2047 */ /* Reset Source: CORER */
5218 #define QRX_CTRL(_QRX) (0x00120000 + ((_QRX) * 4)) /* _i=0...2047 */ /* Reset Source: PFR */
5230 #define QRX_ITR(_QRX) (0x00292000 + ((_QRX) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
5234 #define QRX_TAIL(_QRX) (0x00290000 + ((_QRX) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
5238 #define VPDSI_RX_QTABLE(_i, _VP16) (0x00074C00 + ((_i) * 64 + (_VP16) * 4)) /* _i=0...15, _VP16=0...15 */ /* Reset Source: CORER */
5248 #define VPDSI_TX_QTABLE(_i, _VP16) (0x001D2000 + ((_i) * 64 + (_VP16) * 4)) /* _i=0...15, _VP16=0...15 */ /* Reset Source: CORER */
5258 #define VPLAN_DB_QTABLE(_i, _VF) (0x00070000 + ((_i) * 2048 + (_VF) * 4)) /* _i=0...3, _VF=0...255 */ /* Reset Source: CORER */
5262 #define VPLAN_DSI_VF_MODE(_VP16) (0x002D2C00 + ((_VP16) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
5266 #define VPLAN_RX_QBASE(_VF) (0x00072000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5274 #define VPLAN_RX_QTABLE(_i, _VF) (0x00060000 + ((_i) * 2048 + (_VF) * 4)) /* _i=0...15, _VF=0...255 */ /* Reset Source: CORER */
5278 #define VPLAN_RXQ_MAPENA(_VF) (0x00073000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5282 #define VPLAN_TX_QBASE(_VF) (0x001D1800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5290 #define VPLAN_TX_QTABLE(_i, _VF) (0x001C0000 + ((_i) * 2048 + (_VF) * 4)) /* _i=0...15, _VF=0...255 */ /* Reset Source: CORER */
5294 #define VPLAN_TXQ_MAPENA(_VF) (0x00073800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5298 #define VSILAN_QBASE(_VSI) (0x0044C000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */
5304 #define VSILAN_QTABLE(_i, _VSI) (0x00440000 + ((_i) * 4096 + (_VSI) * 4)) /* _i=0...7, _VSI=0...767 */ /* Reset Source: PFR */
5310 #define E800_PRTMAC_HSEC_CTL_RX_ENABLE_GCP 0x001E31C0 /* Reset Source: GLOBR */
5313 #define E800_PRTMAC_HSEC_CTL_RX_ENABLE_GPP 0x001E34C0 /* Reset Source: GLOBR */
5316 #define E800_PRTMAC_HSEC_CTL_RX_ENABLE_PPP 0x001E35C0 /* Reset Source: GLOBR */
5319 #define E800_PRTMAC_HSEC_CTL_RX_FORWARD_CONTROL 0x001E36C0 /* Reset Source: GLOBR */
5322 #define E800_PRTMAC_HSEC_CTL_RX_PAUSE_DA_UCAST_PART1 0x001E3220 /* Reset Source: GLOBR */
5325 #define E800_PRTMAC_HSEC_CTL_RX_PAUSE_DA_UCAST_PART2 0x001E3240 /* Reset Source: GLOBR */
5328 #define E800_PRTMAC_HSEC_CTL_RX_PAUSE_ENABLE 0x001E3180 /* Reset Source: GLOBR */
5331 #define E800_PRTMAC_HSEC_CTL_RX_PAUSE_SA_PART1 0x001E3280 /* Reset Source: GLOBR */
5334 #define E800_PRTMAC_HSEC_CTL_RX_PAUSE_SA_PART2 0x001E32A0 /* Reset Source: GLOBR */
5337 #define E800_PRTMAC_HSEC_CTL_RX_QUANTA_S 0x001E3C40 /* Reset Source: GLOBR */
5340 #define E800_PRTMAC_HSEC_CTL_TX_PAUSE_ENABLE 0x001E31A0 /* Reset Source: GLOBR */
5343 #define E800_PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(_i) (0x001E36E0 + ((_i) * 32)) /* _i=0...8 */ /* Reset Source: GLOBR */
5347 #define E800_PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(_i) (0x001E3800 + ((_i) * 32)) /* _i=0...8 */ /* Reset Source: GLOBR */
5351 #define E800_PRTMAC_HSEC_CTL_TX_SA_PART1 0x001E3960 /* Reset Source: GLOBR */
5354 #define E800_PRTMAC_HSEC_CTL_TX_SA_PART2 0x001E3980 /* Reset Source: GLOBR */
5358 #define E800_PRTMAC_LINK_DOWN_COUNTER 0x001E47C0 /* Reset Source: GLOBR */
5359 #define E830_PRTMAC_LINK_DOWN_COUNTER 0x001E2460 /* Reset Source: GLOBR */
5363 #define E800_PRTMAC_MD_OVRRIDE_ENABLE(_i) (0x001E3C60 + ((_i) * 32)) /* _i=0...7 */ /* Reset Source: GLOBR */
5364 #define E830_PRTMAC_MD_OVRRIDE_ENABLE(_i) (0x001E2500 + ((_i) * 32)) /* _i=0...1 */ /* Reset Source: GLOBR */
5371 #define E800_PRTMAC_MD_OVRRIDE_VAL(_i) (0x001E3D60 + ((_i) * 32)) /* _i=0...7 */ /* Reset Source: GLOBR */
5372 #define E830_PRTMAC_MD_OVRRIDE_VAL(_i) (0x001E2600 + ((_i) * 32)) /* _i=0...1 */ /* Reset Source: GLOBR */
5378 #define PRTMAC_RX_CNT_MRKR 0x001E48E0 /* Reset Source: GLOBR */
5382 #define E800_PRTMAC_RX_PKT_DRP_CNT 0x001E3C20 /* Reset Source: GLOBR */
5383 #define E830_PRTMAC_RX_PKT_DRP_CNT 0x001E2420 /* Reset Source: GLOBR */
5394 #define PRTMAC_TX_CNT_MRKR 0x001E48C0 /* Reset Source: GLOBR */
5398 #define E800_PRTMAC_TX_LNK_UP_CNT 0x001E4840 /* Reset Source: GLOBR */
5399 #define E830_PRTMAC_TX_LNK_UP_CNT 0x001E2480 /* Reset Source: GLOBR */
5402 #define GL_MDCK_CFG1_TX_PQM 0x002D2DF4 /* Reset Source: CORER */
5409 #define GL_MDCK_EN_TX_PQM 0x002D2DFC /* Reset Source: CORER */
5462 #define GL_MDCK_RX 0x0029422C /* Reset Source: CORER */
5465 #define GL_MDCK_TX_TDPU 0x00049348 /* Reset Source: CORER */
5488 #define GL_MDET_RX 0x00294C00 /* Reset Source: CORER */
5499 #define GL_MDET_TX_PQM 0x002D2E00 /* Reset Source: CORER */
5510 #define GL_MDET_TX_TCLAN 0x000FC068 /* Reset Source: CORER */
5521 #define GL_MDET_TX_TDPU 0x00049350 /* Reset Source: CORER */
5532 #define GLRLAN_MDET 0x00294200 /* Reset Source: CORER */
5535 #define PF_MDET_RX 0x00294280 /* Reset Source: CORER */
5538 #define PF_MDET_TX_PQM 0x002D2C80 /* Reset Source: CORER */
5541 #define PF_MDET_TX_TCLAN 0x000FC000 /* Reset Source: CORER */
5544 #define PF_MDET_TX_TDPU 0x00040800 /* Reset Source: CORER */
5547 #define VP_MDET_RX(_VF) (0x00294400 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5551 #define VP_MDET_TX_PQM(_VF) (0x002D2000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5555 #define VP_MDET_TX_TCLAN(_VF) (0x000FB800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5559 #define VP_MDET_TX_TDPU(_VF) (0x00040000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
5563 #define GENERAL_MNG_FW_DBG_CSR(_i) (0x000B6180 + ((_i) * 4)) /* _i=0...9 */ /* Reset Source: POR */
5567 #define GL_FWRESETCNT 0x00083100 /* Reset Source: POR */
5571 #define E800_GL_MNG_FW_RAM_STAT 0x0008309C /* Reset Source: POR */
5572 #define E830_GL_MNG_FW_RAM_STAT 0x000830F4 /* Reset Source: POR */
5577 #define GL_MNG_FWSM 0x000B6134 /* Reset Source: POR */
5608 #define GL_MNG_HWARB_CTRL 0x000B6130 /* Reset Source: POR */
5612 #define E800_GL_MNG_SHA_EXTEND(_i) (0x00083120 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: EMPR */
5613 #define E830_GL_MNG_SHA_EXTEND(_i) (0x00083340 + ((_i) * 4)) /* _i=0...11 */ /* Reset Source: EMPR */
5620 #define E800_GL_MNG_SHA_EXTEND_ROM(_i) (0x00083160 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: EMPR */
5621 #define E830_GL_MNG_SHA_EXTEND_ROM(_i) (0x000832C0 + ((_i) * 4)) /* _i=0...11 */ /* Reset Source: EMPR */
5627 #define GL_MNG_SHA_EXTEND_STATUS 0x00083148 /* Reset Source: EMPR */
5634 #define GL_SWT_PRT2MDEF(_i) (0x00216018 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: POR */
5640 #define PRT_MNG_MANC 0x00214720 /* Reset Source: POR */
5657 #define PRT_MNG_MAVTV(_i) (0x00214780 + ((_i) * 32)) /* _i=0...7 */ /* Reset Source: POR */
5661 #define PRT_MNG_MDEF(_i) (0x00214880 + ((_i) * 32)) /* _i=0...7 */ /* Reset Source: POR */
5689 #define PRT_MNG_MDEF_EXT(_i) (0x00214A00 + ((_i) * 32)) /* _i=0...7 */ /* Reset Source: POR */
5713 #define PRT_MNG_MDEFVSI(_i) (0x00214980 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: POR */
5719 #define PRT_MNG_METF(_i) (0x00214120 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: POR */
5725 #define PRT_MNG_MFUTP(_i) (0x00214320 + ((_i) * 32)) /* _i=0...15 */ /* Reset Source: POR */
5735 #define PRT_MNG_MIPAF4(_i) (0x002141A0 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: POR */
5739 #define PRT_MNG_MIPAF6(_i) (0x00214520 + ((_i) * 32)) /* _i=0...15 */ /* Reset Source: POR */
5743 #define PRT_MNG_MMAH(_i) (0x00214220 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: POR */
5747 #define PRT_MNG_MMAL(_i) (0x002142A0 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: POR */
5751 #define PRT_MNG_MNGONLY 0x00214740 /* Reset Source: POR */
5754 #define PRT_MNG_MSFM 0x00214760 /* Reset Source: POR */
5771 #define MSIX_PBA_PAGE(_i) (0x02E08000 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: FLR */
5775 #define MSIX_PBA1(_i) (0x00008000 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: FLR */
5779 #define MSIX_TADD_PAGE(_i) (0x02E00000 + ((_i) * 16)) /* _i=0...2047 */ /* Reset Source: FLR */
5785 #define MSIX_TADD1(_i) (0x00000000 + ((_i) * 16)) /* _i=0...2047 */ /* Reset Source: FLR */
5791 #define MSIX_TMSG(_i) (0x00000008 + ((_i) * 16)) /* _i=0...2047 */ /* Reset Source: FLR */
5795 #define MSIX_TMSG_PAGE(_i) (0x02E00008 + ((_i) * 16)) /* _i=0...2047 */ /* Reset Source: FLR */
5799 #define MSIX_TUADD_PAGE(_i) (0x02E00004 + ((_i) * 16)) /* _i=0...2047 */ /* Reset Source: FLR */
5803 #define MSIX_TUADD1(_i) (0x00000004 + ((_i) * 16)) /* _i=0...2047 */ /* Reset Source: FLR */
5807 #define MSIX_TVCTRL_PAGE(_i) (0x02E0000C + ((_i) * 16)) /* _i=0...2047 */ /* Reset Source: FLR */
5811 #define MSIX_TVCTRL1(_i) (0x0000000C + ((_i) * 16)) /* _i=0...2047 */ /* Reset Source: FLR */
5815 #define GLNVM_AL_DONE_HLP 0x000824C4 /* Reset Source: POR */
5820 #define GLNVM_ALTIMERS 0x000B6140 /* Reset Source: POR */
5825 #define GLNVM_FLA 0x000B6108 /* Reset Source: POR */
5828 #define GLNVM_GENS 0x000B6100 /* Reset Source: POR */
5839 #define GLNVM_PROTCSR(_i) (0x000B6010 + ((_i) * 4)) /* _i=0...59 */ /* Reset Source: POR */
5843 #define GLNVM_ULD 0x000B6008 /* Reset Source: POR */
5864 #define GLNVM_ULT 0x000B6154 /* Reset Source: POR */
5889 #define GL_COTF_MARKER_STATUS 0x00200200 /* Reset Source: CORER */
5892 #define GL_COTF_MARKER_TRIG_RCU_PRS(_i) (0x002001D4 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
5896 #define GL_PRS_MARKER_ERROR 0x00200204 /* Reset Source: CORER */
5903 #define GL_PRS_RX_PIPE_INIT0(_i) (0x0020000C + ((_i) * 4)) /* _i=0...6 */ /* Reset Source: CORER */
5907 #define GL_PRS_RX_PIPE_INIT1 0x00200028 /* Reset Source: CORER */
5910 #define GL_PRS_RX_PIPE_INIT2 0x0020002C /* Reset Source: CORER */
5913 #define GL_PRS_RX_SIZE_CTRL 0x00200004 /* Reset Source: CORER */
5922 #define GL_PRS_TX_PIPE_INIT0(_i) (0x00202018 + ((_i) * 4)) /* _i=0...6 */ /* Reset Source: CORER */
5926 #define GL_PRS_TX_PIPE_INIT1 0x00202034 /* Reset Source: CORER */
5929 #define GL_PRS_TX_PIPE_INIT2 0x00202038 /* Reset Source: CORER */
5932 #define GL_PRS_TX_SIZE_CTRL 0x00202014 /* Reset Source: CORER */
5941 #define GL_QH_MARKER_STATUS 0x002001FC /* Reset Source: CORER */
5944 #define GL_QH_MARKER_TRIG_RCU_PRS(_i) (0x002001C4 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
5954 #define GL_RPRS_ANA_CSR_CTRL 0x00200708 /* Reset Source: CORER */
5959 #define GL_TPRS_ANA_CSR_CTRL 0x00202100 /* Reset Source: CORER */
5964 #define GL_TPRS_MNG_PM_THR 0x00202004 /* Reset Source: CORER */
5967 #define GL_TPRS_PM_CNT(_i) (0x00202008 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
5971 #define GL_TPRS_PM_THR 0x00202000 /* Reset Source: CORER */
5974 #define GL_XLR_MARKER_LOG_RCU_PRS(_i) (0x00200208 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
5978 #define GL_XLR_MARKER_STATUS(_i) (0x002001F4 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
5982 #define GL_XLR_MARKER_TRIG_PE 0x005008C0 /* Reset Source: CORER */
5991 #define GL_XLR_MARKER_TRIG_RCU_PRS 0x002001C0 /* Reset Source: CORER */
6000 #define GL_CLKGATE_EVENTS 0x0009DE70 /* Reset Source: PERST */
6005 #define GLPCI_BYTCTH_NP_C 0x000BFDA8 /* Reset Source: PCIR */
6008 #define GLPCI_BYTCTH_P 0x0009E970 /* Reset Source: PCIR */
6011 #define GLPCI_BYTCTL_NP_C 0x000BFDAC /* Reset Source: PCIR */
6014 #define GLPCI_BYTCTL_P 0x0009E994 /* Reset Source: PCIR */
6017 #define GLPCI_CAPCTRL 0x0009DE88 /* Reset Source: PCIR */
6020 #define GLPCI_CAPSUP 0x0009DE8C /* Reset Source: PCIR */
6061 #define GLPCI_CNF 0x0009DEA0 /* Reset Source: POR */
6068 #define GLPCI_CNF2 0x000BE004 /* Reset Source: PCIR */
6073 #define GLPCI_DREVID 0x0009E9AC /* Reset Source: PCIR */
6076 #define GLPCI_GSCL_1_NP_C 0x000BFDA4 /* Reset Source: PCIR */
6091 #define GLPCI_GSCL_1_P 0x0009E9B4 /* Reset Source: PCIR */
6118 #define GLPCI_GSCL_2 0x0009E998 /* Reset Source: PCIR */
6127 #define GLPCI_GSCL_5_8(_i) (0x0009E954 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: PCIR */
6133 #define GLPCI_GSCN_0_3(_i) (0x0009E99C + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: PCIR */
6137 #define GLPCI_LATCT_NP_C 0x000BFDA0 /* Reset Source: PCIR */
6140 #define GLPCI_LBARCTRL 0x0009DE74 /* Reset Source: POR */
6157 #define GLPCI_LINKCAP 0x0009DE90 /* Reset Source: PCIR */
6162 #define GLPCI_NPQ_CFG 0x000BFD80 /* Reset Source: PCIR */
6173 #define GLPCI_PKTCT_NP_C 0x000BFD9C /* Reset Source: PCIR */
6176 #define GLPCI_PKTCT_P 0x0009E9B0 /* Reset Source: PCIR */
6179 #define GLPCI_PMSUP 0x0009DE94 /* Reset Source: PCIR */
6194 #define GLPCI_PUSH_PE_IF_TO_STATUS 0x0009DF44 /* Reset Source: PCIR */
6197 #define GLPCI_PWRDATA 0x0009DE7C /* Reset Source: PCIR */
6206 #define GLPCI_REVID 0x0009DE98 /* Reset Source: PCIR */
6209 #define GLPCI_SERH 0x0009DE84 /* Reset Source: PCIR */
6212 #define GLPCI_SERL 0x0009DE80 /* Reset Source: PCIR */
6215 #define GLPCI_SUBVENID 0x0009DEE8 /* Reset Source: PCIR */
6218 #define GLPCI_UPADD 0x000BE0D4 /* Reset Source: PCIR */
6221 #define GLPCI_VENDORID 0x0009DEC8 /* Reset Source: PCIR */
6224 #define GLPCI_VFSUP 0x0009DE9C /* Reset Source: PCIR */
6229 #define GLPCI_WATMK_CLNT_PIPEMON 0x000BFD90 /* Reset Source: PCIR */
6232 #define PF_FUNC_RID 0x0009E880 /* Reset Source: PCIR */
6239 #define PF_PCI_CIAA 0x0009E580 /* Reset Source: FLR */
6244 #define PF_PCI_CIAD 0x0009E500 /* Reset Source: FLR */
6247 #define PFPCI_CLASS 0x0009DB00 /* Reset Source: PCIR */
6252 #define PFPCI_CNF 0x0009DF00 /* Reset Source: PCIR */
6261 #define PFPCI_DEVID 0x0009DE00 /* Reset Source: PCIR */
6266 #define PFPCI_FACTPS 0x0009E900 /* Reset Source: FLR */
6271 #define PFPCI_FUNC 0x0009D980 /* Reset Source: POR */
6278 #define PFPCI_PF_FLUSH_DONE 0x0009E400 /* Reset Source: PCIR */
6281 #define PFPCI_PM 0x0009DA80 /* Reset Source: POR */
6284 #define PFPCI_STATUS1 0x0009DA00 /* Reset Source: POR */
6287 #define PFPCI_SUBSYSID 0x0009D880 /* Reset Source: PCIR */
6292 #define PFPCI_VF_FLUSH_DONE(_VF) (0x0009E000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PCIR */
6296 #define PFPCI_VM_FLUSH_DONE 0x0009E480 /* Reset Source: PCIR */
6299 #define PFPCI_VMINDEX 0x0009E600 /* Reset Source: PCIR */
6302 #define PFPCI_VMPEND 0x0009E800 /* Reset Source: PCIR */
6305 #define PQ_FIFO_STATUS 0x0009DF40 /* Reset Source: PCIR */
6310 #define GLPE_CPUSTATUS0 0x0050BA5C /* Reset Source: CORER */
6313 #define GLPE_CPUSTATUS1 0x0050BA60 /* Reset Source: CORER */
6316 #define GLPE_CPUSTATUS2 0x0050BA64 /* Reset Source: CORER */
6319 #define GLPE_MDQ_BASE(_i) (0x00536000 + ((_i) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
6323 #define GLPE_MDQ_PTR(_i) (0x00537000 + ((_i) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
6329 #define GLPE_MDQ_SIZE(_i) (0x00536800 + ((_i) * 4)) /* _i=0...511 */ /* Reset Source: CORER */
6333 #define GLPE_PEPM_CTRL 0x0050C000 /* Reset Source: PERST */
6340 #define GLPE_PEPM_DEALLOC 0x0050C004 /* Reset Source: PERST */
6351 #define GLPE_PEPM_PSQ_COUNT 0x0050C020 /* Reset Source: PERST */
6354 #define GLPE_PEPM_THRESH(_i) (0x0050C840 + ((_i) * 4)) /* _i=0...511 */ /* Reset Source: PERST */
6360 #define GLPE_PFAEQEDROPCNT(_i) (0x00503240 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
6364 #define GLPE_PFCEQEDROPCNT(_i) (0x00503220 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
6368 #define GLPE_PFCQEDROPCNT(_i) (0x00503200 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
6372 #define GLPE_PFFLMOOISCALLOCERR(_i) (0x0050B960 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
6376 #define GLPE_PFFLMQ1ALLOCERR(_i) (0x0050B920 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
6380 #define GLPE_PFFLMRRFALLOCERR(_i) (0x0050B940 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
6384 #define GLPE_PFFLMXMITALLOCERR(_i) (0x0050B900 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
6388 #define GLPE_PFTCPNOW50USCNT(_i) (0x0050B8C0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
6392 #define GLPE_PUSH_PEPM 0x0053241C /* Reset Source: CORER */
6395 #define GLPE_VFAEQEDROPCNT(_i) (0x00503100 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
6399 #define GLPE_VFCEQEDROPCNT(_i) (0x00503080 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
6403 #define GLPE_VFCQEDROPCNT(_i) (0x00503000 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
6407 #define GLPE_VFFLMOOISCALLOCERR(_i) (0x0050B580 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
6411 #define GLPE_VFFLMQ1ALLOCERR(_i) (0x0050B480 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
6415 #define GLPE_VFFLMRRFALLOCERR(_i) (0x0050B500 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
6419 #define GLPE_VFFLMXMITALLOCERR(_i) (0x0050B400 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
6423 #define GLPE_VFTCPNOW50USCNT(_i) (0x0050B300 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: PE_CORER */
6427 #define PFPE_AEQALLOC 0x00502D00 /* Reset Source: PFR */
6430 #define PFPE_CCQPHIGH 0x0050A100 /* Reset Source: PFR */
6433 #define PFPE_CCQPLOW 0x0050A080 /* Reset Source: PFR */
6436 #define PFPE_CCQPSTATUS 0x0050A000 /* Reset Source: PFR */
6445 #define PFPE_CQACK 0x00502C80 /* Reset Source: PFR */
6448 #define PFPE_CQARM 0x00502C00 /* Reset Source: PFR */
6451 #define PFPE_CQPDB 0x00500800 /* Reset Source: PFR */
6454 #define PFPE_CQPERRCODES 0x0050A200 /* Reset Source: PFR */
6459 #define PFPE_CQPTAIL 0x00500880 /* Reset Source: PFR */
6464 #define PFPE_IPCONFIG0 0x0050A180 /* Reset Source: PFR */
6471 #define PFPE_MRTEIDXMASK 0x0050A300 /* Reset Source: PFR */
6474 #define E800_PFPE_RCVUNEXPECTEDERROR 0x0050A380 /* Reset Source: PFR */
6477 #define PFPE_TCPNOWTIMER 0x0050A280 /* Reset Source: PFR */
6480 #define PFPE_WQEALLOC 0x00504400 /* Reset Source: PFR */
6485 #define PRT_PEPM_COUNT(_i) (0x0050C040 + ((_i) * 4)) /* _i=0...511 */ /* Reset Source: PERST */
6491 #define VFPE_AEQALLOC(_VF) (0x00502800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6495 #define VFPE_CCQPHIGH(_VF) (0x00508800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6499 #define VFPE_CCQPLOW(_VF) (0x00508400 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6503 #define VFPE_CCQPSTATUS(_VF) (0x00508000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6513 #define VFPE_CQACK(_VF) (0x00502400 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6517 #define VFPE_CQARM(_VF) (0x00502000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6521 #define VFPE_CQPDB(_VF) (0x00500000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6525 #define VFPE_CQPERRCODES(_VF) (0x00509000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6531 #define VFPE_CQPTAIL(_VF) (0x00500400 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6537 #define VFPE_IPCONFIG0(_VF) (0x00508C00 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6545 #define E800_VFPE_RCVUNEXPECTEDERROR(_VF) (0x00509C00 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6549 #define VFPE_TCPNOWTIMER(_VF) (0x00509400 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6553 #define VFPE_WQEALLOC(_VF) (0x00504000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
6559 #define GLPES_PFIP4RXDISCARD(_i) (0x00541400 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6563 #define GLPES_PFIP4RXFRAGSHI(_i) (0x00541C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6567 #define GLPES_PFIP4RXFRAGSLO(_i) (0x00541C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6571 #define GLPES_PFIP4RXMCOCTSHI(_i) (0x00542404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6575 #define GLPES_PFIP4RXMCOCTSLO(_i) (0x00542400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6579 #define GLPES_PFIP4RXMCPKTSHI(_i) (0x00542C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6583 #define GLPES_PFIP4RXMCPKTSLO(_i) (0x00542C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6587 #define GLPES_PFIP4RXOCTSHI(_i) (0x00540404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6591 #define GLPES_PFIP4RXOCTSLO(_i) (0x00540400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6595 #define GLPES_PFIP4RXPKTSHI(_i) (0x00540C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6599 #define GLPES_PFIP4RXPKTSLO(_i) (0x00540C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6603 #define GLPES_PFIP4RXTRUNC(_i) (0x00541800 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6607 #define GLPES_PFIP4TXFRAGSHI(_i) (0x00547404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6611 #define GLPES_PFIP4TXFRAGSLO(_i) (0x00547400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6615 #define GLPES_PFIP4TXMCOCTSHI(_i) (0x00547C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6619 #define GLPES_PFIP4TXMCOCTSLO(_i) (0x00547C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6623 #define GLPES_PFIP4TXMCPKTSHI(_i) (0x00548404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6627 #define GLPES_PFIP4TXMCPKTSLO(_i) (0x00548400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6631 #define GLPES_PFIP4TXNOROUTE(_i) (0x0054B400 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6635 #define GLPES_PFIP4TXOCTSHI(_i) (0x00546404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6639 #define GLPES_PFIP4TXOCTSLO(_i) (0x00546400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6643 #define GLPES_PFIP4TXPKTSHI(_i) (0x00546C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6647 #define GLPES_PFIP4TXPKTSLO(_i) (0x00546C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6651 #define GLPES_PFIP6RXDISCARD(_i) (0x00544400 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6655 #define GLPES_PFIP6RXFRAGSHI(_i) (0x00544C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6659 #define GLPES_PFIP6RXFRAGSLO(_i) (0x00544C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6663 #define GLPES_PFIP6RXMCOCTSHI(_i) (0x00545404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6667 #define GLPES_PFIP6RXMCOCTSLO(_i) (0x00545400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6671 #define GLPES_PFIP6RXMCPKTSHI(_i) (0x00545C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6675 #define GLPES_PFIP6RXMCPKTSLO(_i) (0x00545C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6679 #define GLPES_PFIP6RXOCTSHI(_i) (0x00543404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6683 #define GLPES_PFIP6RXOCTSLO(_i) (0x00543400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6687 #define GLPES_PFIP6RXPKTSHI(_i) (0x00543C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6691 #define GLPES_PFIP6RXPKTSLO(_i) (0x00543C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6695 #define GLPES_PFIP6RXTRUNC(_i) (0x00544800 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6699 #define GLPES_PFIP6TXFRAGSHI(_i) (0x00549C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6703 #define GLPES_PFIP6TXFRAGSLO(_i) (0x00549C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6707 #define GLPES_PFIP6TXMCOCTSHI(_i) (0x0054A404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6711 #define GLPES_PFIP6TXMCOCTSLO(_i) (0x0054A400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6715 #define GLPES_PFIP6TXMCPKTSHI(_i) (0x0054AC04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6719 #define GLPES_PFIP6TXMCPKTSLO(_i) (0x0054AC00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6723 #define GLPES_PFIP6TXNOROUTE(_i) (0x0054B800 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6727 #define GLPES_PFIP6TXOCTSHI(_i) (0x00548C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6731 #define GLPES_PFIP6TXOCTSLO(_i) (0x00548C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6735 #define GLPES_PFIP6TXPKTSHI(_i) (0x00549404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6739 #define GLPES_PFIP6TXPKTSLO(_i) (0x00549400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6743 #define GLPES_PFRDMARXRDSHI(_i) (0x0054EC04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6747 #define GLPES_PFRDMARXRDSLO(_i) (0x0054EC00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6751 #define GLPES_PFRDMARXSNDSHI(_i) (0x0054F404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6755 #define GLPES_PFRDMARXSNDSLO(_i) (0x0054F400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6759 #define GLPES_PFRDMARXWRSHI(_i) (0x0054E404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6763 #define GLPES_PFRDMARXWRSLO(_i) (0x0054E400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6767 #define GLPES_PFRDMATXRDSHI(_i) (0x00550404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6771 #define GLPES_PFRDMATXRDSLO(_i) (0x00550400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6775 #define GLPES_PFRDMATXSNDSHI(_i) (0x00550C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6779 #define GLPES_PFRDMATXSNDSLO(_i) (0x00550C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6783 #define GLPES_PFRDMATXWRSHI(_i) (0x0054FC04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6787 #define GLPES_PFRDMATXWRSLO(_i) (0x0054FC00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6791 #define GLPES_PFRDMAVBNDHI(_i) (0x00551404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6795 #define GLPES_PFRDMAVBNDLO(_i) (0x00551400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6799 #define GLPES_PFRDMAVINVHI(_i) (0x00551C04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6803 #define GLPES_PFRDMAVINVLO(_i) (0x00551C00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6807 #define GLPES_PFRXVLANERR(_i) (0x00540000 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6811 #define GLPES_PFTCPRTXSEG(_i) (0x00552400 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6815 #define GLPES_PFTCPRXOPTERR(_i) (0x0054C400 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6819 #define GLPES_PFTCPRXPROTOERR(_i) (0x0054C800 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
6823 #define GLPES_PFTCPRXSEGSHI(_i) (0x0054BC04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6827 #define GLPES_PFTCPRXSEGSLO(_i) (0x0054BC00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6831 #define GLPES_PFTCPTXSEGHI(_i) (0x0054CC04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6835 #define GLPES_PFTCPTXSEGLO(_i) (0x0054CC00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6839 #define GLPES_PFUDPRXPKTSHI(_i) (0x0054D404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6843 #define GLPES_PFUDPRXPKTSLO(_i) (0x0054D400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6847 #define GLPES_PFUDPTXPKTSHI(_i) (0x0054DC04 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6851 #define GLPES_PFUDPTXPKTSLO(_i) (0x0054DC00 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
6855 #define GLPES_RDMARXMULTFPDUSHI 0x0055E00C /* Reset Source: CORER */
6858 #define GLPES_RDMARXMULTFPDUSLO 0x0055E008 /* Reset Source: CORER */
6861 #define GLPES_RDMARXOOODDPHI 0x0055E014 /* Reset Source: CORER */
6864 #define GLPES_RDMARXOOODDPLO 0x0055E010 /* Reset Source: CORER */
6867 #define GLPES_RDMARXOOONOMARK 0x0055E004 /* Reset Source: CORER */
6870 #define GLPES_RDMARXUNALIGN 0x0055E000 /* Reset Source: CORER */
6873 #define GLPES_TCPRXFOURHOLEHI 0x0055E03C /* Reset Source: CORER */
6876 #define GLPES_TCPRXFOURHOLELO 0x0055E038 /* Reset Source: CORER */
6879 #define GLPES_TCPRXONEHOLEHI 0x0055E024 /* Reset Source: CORER */
6882 #define GLPES_TCPRXONEHOLELO 0x0055E020 /* Reset Source: CORER */
6885 #define GLPES_TCPRXPUREACKHI 0x0055E01C /* Reset Source: CORER */
6888 #define GLPES_TCPRXPUREACKSLO 0x0055E018 /* Reset Source: CORER */
6891 #define GLPES_TCPRXTHREEHOLEHI 0x0055E034 /* Reset Source: CORER */
6894 #define GLPES_TCPRXTHREEHOLELO 0x0055E030 /* Reset Source: CORER */
6897 #define GLPES_TCPRXTWOHOLEHI 0x0055E02C /* Reset Source: CORER */
6900 #define GLPES_TCPRXTWOHOLELO 0x0055E028 /* Reset Source: CORER */
6903 #define GLPES_TCPTXRETRANSFASTHI 0x0055E044 /* Reset Source: CORER */
6906 #define GLPES_TCPTXRETRANSFASTLO 0x0055E040 /* Reset Source: CORER */
6909 #define GLPES_TCPTXTOUTSFASTHI 0x0055E04C /* Reset Source: CORER */
6912 #define GLPES_TCPTXTOUTSFASTLO 0x0055E048 /* Reset Source: CORER */
6915 #define GLPES_TCPTXTOUTSHI 0x0055E054 /* Reset Source: CORER */
6918 #define GLPES_TCPTXTOUTSLO 0x0055E050 /* Reset Source: CORER */
6921 #define GL_PWR_MODE_CTL 0x000B820C /* Reset Source: POR */
6932 #define GL_PWR_MODE_DIVIDE_CTRL_H_DEFAULT 0x000B825C /* Reset Source: POR */
6947 #define GL_PWR_MODE_DIVIDE_CTRL_L_DEFAULT 0x000B8218 /* Reset Source: POR */
6962 #define GL_PWR_MODE_DIVIDE_CTRL_M_DEFAULT 0x000B8260 /* Reset Source: POR */
6977 #define GL_PWR_MODE_DIVIDE_S0_CTRL_H_LCLK 0x000B8200 /* Reset Source: POR */
6988 #define GL_PWR_MODE_DIVIDE_S0_CTRL_H_PECLK 0x000B81F0 /* Reset Source: POR */
6999 #define GL_PWR_MODE_DIVIDE_S0_CTRL_H_PSM 0x000B81FC /* Reset Source: POR */
7010 #define GL_PWR_MODE_DIVIDE_S0_CTRL_H_RXCTL 0x000B81F8 /* Reset Source: POR */
7021 #define GL_PWR_MODE_DIVIDE_S0_CTRL_H_UANA 0x000B8208 /* Reset Source: POR */
7032 #define GL_PWR_MODE_DIVIDE_S0_CTRL_H_UCLK 0x000B81F4 /* Reset Source: POR */
7043 #define GL_PWR_MODE_DIVIDE_S0_CTRL_L_LCLK 0x000B8244 /* Reset Source: POR */
7054 #define GL_PWR_MODE_DIVIDE_S0_CTRL_L_PECLK 0x000B8220 /* Reset Source: POR */
7065 #define GL_PWR_MODE_DIVIDE_S0_CTRL_L_PSM 0x000B8240 /* Reset Source: POR */
7076 #define GL_PWR_MODE_DIVIDE_S0_CTRL_L_RXCTL 0x000B823C /* Reset Source: POR */
7087 #define GL_PWR_MODE_DIVIDE_S0_CTRL_L_UANA 0x000B8248 /* Reset Source: POR */
7098 #define GL_PWR_MODE_DIVIDE_S0_CTRL_L_UCLK 0x000B8238 /* Reset Source: POR */
7109 #define GL_PWR_MODE_DIVIDE_S0_CTRL_M_LCLK 0x000B8230 /* Reset Source: POR */
7120 #define GL_PWR_MODE_DIVIDE_S0_CTRL_M_PECLK 0x000B821C /* Reset Source: POR */
7131 #define GL_PWR_MODE_DIVIDE_S0_CTRL_M_PSM 0x000B822C /* Reset Source: POR */
7142 #define GL_PWR_MODE_DIVIDE_S0_CTRL_M_RXCTL 0x000B8228 /* Reset Source: POR */
7153 #define GL_PWR_MODE_DIVIDE_S0_CTRL_M_UANA 0x000B8234 /* Reset Source: POR */
7164 #define GL_PWR_MODE_DIVIDE_S0_CTRL_M_UCLK 0x000B8224 /* Reset Source: POR */
7175 #define GL_PWR_MODE_DIVIDE_S5_H_CTRL 0x000B81EC /* Reset Source: POR */
7186 #define GL_PWR_MODE_DIVIDE_S5_L_CTRL 0x000B824C /* Reset Source: POR */
7197 #define GL_PWR_MODE_DIVIDE_S5_M_CTRL 0x000B8250 /* Reset Source: POR */
7208 #define GL_S5_PWR_MODE_EXIT_CTL 0x000B8270 /* Reset Source: POR */
7215 #define GLGEN_PME_TO 0x000B81BC /* Reset Source: POR */
7218 #define PRTPM_EEE_STAT 0x001E4320 /* Reset Source: GLOBR */
7225 #define PRTPM_EEEC 0x001E4380 /* Reset Source: GLOBR */
7232 #define PRTPM_EEEFWD 0x001E4400 /* Reset Source: GLOBR */
7235 #define PRTPM_EEER 0x001E4360 /* Reset Source: GLOBR */
7240 #define PRTPM_EEETXC 0x001E43E0 /* Reset Source: GLOBR */
7243 #define PRTPM_RLPIC 0x001E43A0 /* Reset Source: GLOBR */
7246 #define PRTPM_TLPIC 0x001E43C0 /* Reset Source: GLOBR */
7249 #define GLRPB_DHW(_i) (0x000AC000 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
7255 #define GLRPB_DLW(_i) (0x000AC044 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
7261 #define GLRPB_DPS(_i) (0x000AC084 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
7267 #define GLRPB_DSI_EN 0x000AC324 /* Reset Source: CORER */
7272 #define GLRPB_SHW(_i) (0x000AC120 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
7278 #define GLRPB_SLW(_i) (0x000AC140 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
7284 #define GLRPB_SPS(_i) (0x000AC0C4 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
7290 #define GLRPB_TC_CFG(_i) (0x000AC2A4 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7296 #define GLRPB_TCHW(_i) (0x000AC330 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7302 #define GLRPB_TCLW(_i) (0x000AC3B0 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7308 #define GLQF_APBVT(_i) (0x00450000 + ((_i) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
7312 #define GLQF_FD_CLSN_0 0x00460028 /* Reset Source: CORER */
7315 #define GLQF_FD_CLSN1 0x00460030 /* Reset Source: CORER */
7318 #define GLQF_FD_CNT 0x00460018 /* Reset Source: CORER */
7327 #define GLQF_FD_CTL 0x00460000 /* Reset Source: CORER */
7334 #define GLQF_FD_SIZE 0x00460010 /* Reset Source: CORER */
7343 #define GLQF_FDCNT_0 0x00460020 /* Reset Source: CORER */
7350 #define GLQF_FDEVICTENA(_i) (0x00452000 + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
7354 #define GLQF_FDINSET(_i, _j) (0x00412000 + ((_i) * 4 + (_j) * 512)) /* _i=0...127, _j=0...5 */ /* Reset Source: CORER */
7372 #define GLQF_FDMASK(_i) (0x00410800 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7378 #define GLQF_FDMASK_SEL(_i) (0x00410400 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
7382 #define GLQF_FDSWAP(_i, _j) (0x00413000 + ((_i) * 4 + (_j) * 512)) /* _i=0...127, _j=0...5 */ /* Reset Source: CORER */
7400 #define GLQF_HINSET(_i, _j) (0x0040E000 + ((_i) * 4 + (_j) * 512)) /* _i=0...127, _j=0...5 */ /* Reset Source: CORER */
7418 #define GLQF_HKEY(_i) (0x00456000 + ((_i) * 4)) /* _i=0...12 */ /* Reset Source: CORER */
7428 #define GLQF_HLUT(_i, _j) (0x00438000 + ((_i) * 4 + (_j) * 512)) /* _i=0...127, _j=0...15 */ /* Reset Source: CORER */
7438 #define GLQF_HLUT_SIZE(_i) (0x00455400 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
7442 #define GLQF_HMASK(_i) (0x0040FC00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7448 #define GLQF_HMASK_SEL(_i) (0x00410000 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
7452 #define GLQF_HSYMM(_i, _j) (0x0040F000 + ((_i) * 4 + (_j) * 512)) /* _i=0...127, _j=0...5 */ /* Reset Source: CORER */
7470 #define GLQF_PE_APBVT_CNT 0x00455500 /* Reset Source: CORER */
7473 #define GLQF_PE_CMD 0x00471080 /* Reset Source: CORER */
7478 #define GLQF_PE_CTL 0x004710C0 /* Reset Source: CORER */
7481 #define GLQF_PE_CTL2(_i) (0x00455200 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7487 #define GLQF_PE_FVE 0x0020E514 /* Reset Source: CORER */
7490 #define GLQF_PE_OSR_STS 0x00471040 /* Reset Source: CORER */
7495 #define GLQF_PEINSET(_i, _j) (0x00415000 + ((_i) * 4 + (_j) * 128)) /* _i=0...31, _j=0...5 */ /* Reset Source: CORER */
7513 #define GLQF_PEMASK(_i) (0x00415400 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
7519 #define GLQF_PEMASK_SEL(_i) (0x00415500 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7523 #define GLQF_PETABLE_CLR(_i) (0x000AA078 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
7535 #define GLQF_PROF2TC(_i, _j) (0x0044D000 + ((_i) * 4 + (_j) * 512)) /* _i=0...127, _j=0...3 */ /* Reset Source: CORER */
7569 #define PFQF_FD_CNT 0x00460180 /* Reset Source: CORER */
7578 #define PFQF_FD_ENA 0x0043A000 /* Reset Source: CORER */
7581 #define PFQF_FD_SIZE 0x00460100 /* Reset Source: CORER */
7590 #define PFQF_FD_SUBTRACT 0x00460200 /* Reset Source: CORER */
7599 #define PFQF_HLUT(_i) (0x00430000 + ((_i) * 64)) /* _i=0...511 */ /* Reset Source: CORER */
7609 #define PFQF_HLUT_SIZE 0x00455480 /* Reset Source: CORER */
7612 #define PFQF_PE_CLSN0 0x00470480 /* Reset Source: CORER */
7615 #define PFQF_PE_CLSN1 0x00470500 /* Reset Source: CORER */
7618 #define PFQF_PE_CTL1 0x00470000 /* Reset Source: CORER */
7621 #define PFQF_PE_CTL2 0x00470040 /* Reset Source: CORER */
7624 #define PFQF_PE_FILTERING_ENA 0x0043A080 /* Reset Source: CORER */
7627 #define PFQF_PE_FLHD 0x00470100 /* Reset Source: CORER */
7630 #define PFQF_PE_ST_CTL 0x00470400 /* Reset Source: CORER */
7639 #define PFQF_PE_TC_CTL 0x00452080 /* Reset Source: CORER */
7644 #define PFQF_PECNT_0 0x00470200 /* Reset Source: CORER */
7647 #define PFQF_PECNT_1 0x00470300 /* Reset Source: CORER */
7650 #define VPQF_PE_CTL1(_VF) (0x00474000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
7654 #define VPQF_PE_CTL2(_VF) (0x00474800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
7658 #define VPQF_PE_FILTERING_ENA(_VF) (0x00455800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
7662 #define VPQF_PE_FLHD(_VF) (0x00472000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
7666 #define VPQF_PECNT_0(_VF) (0x00472800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
7670 #define VPQF_PECNT_1(_VF) (0x00473000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
7674 #define GLDCB_RMPMC 0x001223C8 /* Reset Source: CORER */
7681 #define GLDCB_RMPMS 0x001223CC /* Reset Source: CORER */
7684 #define GLDCB_RPCC 0x00122260 /* Reset Source: CORER */
7691 #define GLDCB_RSPMC 0x001223C4 /* Reset Source: CORER */
7702 #define GLDCB_RSPMS 0x001223C0 /* Reset Source: CORER */
7705 #define GLDCB_RTCTI 0x001223D0 /* Reset Source: CORER */
7708 #define GLDCB_RTCTQ(_i) (0x001222C0 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7714 #define GLDCB_RTCTS(_i) (0x00122340 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7718 #define GLRCB_CFG_COTF_CNT(_i) (0x001223D4 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
7722 #define GLRCB_CFG_COTF_ST 0x001223F4 /* Reset Source: CORER */
7725 #define GLRPRS_PMCFG_DHW(_i) (0x00200388 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
7729 #define GLRPRS_PMCFG_DLW(_i) (0x002003C8 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
7733 #define GLRPRS_PMCFG_DPS(_i) (0x00200308 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: CORER */
7737 #define GLRPRS_PMCFG_SHW(_i) (0x00200448 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
7741 #define GLRPRS_PMCFG_SLW(_i) (0x00200468 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
7745 #define GLRPRS_PMCFG_SPS(_i) (0x00200408 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
7749 #define GLRPRS_PMCFG_TC_CFG(_i) (0x00200488 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7755 #define GLRPRS_PMCFG_TCHW(_i) (0x00200588 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7759 #define GLRPRS_PMCFG_TCLW(_i) (0x00200608 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7763 #define GLSWT_PMCFG_TC_CFG(_i) (0x00204900 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
7769 #define PRTDCB_RLANPMS 0x00122280 /* Reset Source: CORER */
7772 #define PRTDCB_RPPMC 0x00122240 /* Reset Source: CORER */
7777 #define PRTDCB_RRDMAPMS 0x00122120 /* Reset Source: CORER */
7780 #define GL_STAT_SWR_BPCH(_i) (0x00347804 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7784 #define GL_STAT_SWR_BPCL(_i) (0x00347800 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7788 #define GL_STAT_SWR_GORCH(_i) (0x00342004 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7792 #define GL_STAT_SWR_GORCL(_i) (0x00342000 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7796 #define GL_STAT_SWR_GOTCH(_i) (0x00304004 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7800 #define GL_STAT_SWR_GOTCL(_i) (0x00304000 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7804 #define GL_STAT_SWR_MPCH(_i) (0x00347404 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7808 #define GL_STAT_SWR_MPCL(_i) (0x00347400 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7812 #define GL_STAT_SWR_UPCH(_i) (0x00347004 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7816 #define GL_STAT_SWR_UPCL(_i) (0x00347000 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
7820 #define GLPRT_AORCL(_i) (0x003812C0 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7824 #define GLPRT_BPRCH(_i) (0x00381384 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7828 #define GLPRT_BPRCL(_i) (0x00381380 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7832 #define GLPRT_BPTCH(_i) (0x00381244 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7836 #define GLPRT_BPTCL(_i) (0x00381240 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7840 #define GLPRT_CRCERRS(_i) (0x00380100 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7844 #define GLPRT_CRCERRS_H(_i) (0x00380104 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7848 #define GLPRT_GORCH(_i) (0x00380004 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7852 #define GLPRT_GORCL(_i) (0x00380000 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7856 #define GLPRT_GOTCH(_i) (0x00380B44 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7860 #define GLPRT_GOTCL(_i) (0x00380B40 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7864 #define GLPRT_ILLERRC(_i) (0x003801C0 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7868 #define GLPRT_ILLERRC_H(_i) (0x003801C4 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7872 #define GLPRT_LXOFFRXC(_i) (0x003802C0 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7876 #define GLPRT_LXOFFRXC_H(_i) (0x003802C4 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7880 #define GLPRT_LXOFFTXC(_i) (0x00381180 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7884 #define GLPRT_LXOFFTXC_H(_i) (0x00381184 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7888 #define GLPRT_LXONRXC(_i) (0x00380280 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7892 #define GLPRT_LXONRXC_H(_i) (0x00380284 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7896 #define GLPRT_LXONTXC(_i) (0x00381140 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7900 #define GLPRT_LXONTXC_H(_i) (0x00381144 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7904 #define GLPRT_MLFC(_i) (0x00380040 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7908 #define GLPRT_MLFC_H(_i) (0x00380044 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7912 #define GLPRT_MPRCH(_i) (0x00381344 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7916 #define GLPRT_MPRCL(_i) (0x00381340 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7920 #define GLPRT_MPTCH(_i) (0x00381204 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7924 #define GLPRT_MPTCL(_i) (0x00381200 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7928 #define GLPRT_MRFC(_i) (0x00380080 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7932 #define GLPRT_MRFC_H(_i) (0x00380084 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7936 #define GLPRT_PRC1023H(_i) (0x00380A04 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7940 #define GLPRT_PRC1023L(_i) (0x00380A00 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7944 #define GLPRT_PRC127H(_i) (0x00380944 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7948 #define GLPRT_PRC127L(_i) (0x00380940 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7952 #define GLPRT_PRC1522H(_i) (0x00380A44 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7956 #define GLPRT_PRC1522L(_i) (0x00380A40 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7960 #define GLPRT_PRC255H(_i) (0x00380984 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7964 #define GLPRT_PRC255L(_i) (0x00380980 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7968 #define GLPRT_PRC511H(_i) (0x003809C4 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7972 #define GLPRT_PRC511L(_i) (0x003809C0 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7976 #define GLPRT_PRC64H(_i) (0x00380904 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7980 #define GLPRT_PRC64L(_i) (0x00380900 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7984 #define GLPRT_PRC9522H(_i) (0x00380A84 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7988 #define GLPRT_PRC9522L(_i) (0x00380A80 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7992 #define GLPRT_PTC1023H(_i) (0x00380C84 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
7996 #define GLPRT_PTC1023L(_i) (0x00380C80 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8000 #define GLPRT_PTC127H(_i) (0x00380BC4 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8004 #define GLPRT_PTC127L(_i) (0x00380BC0 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8008 #define GLPRT_PTC1522H(_i) (0x00380CC4 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8012 #define GLPRT_PTC1522L(_i) (0x00380CC0 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8016 #define GLPRT_PTC255H(_i) (0x00380C04 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8020 #define GLPRT_PTC255L(_i) (0x00380C00 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8024 #define GLPRT_PTC511H(_i) (0x00380C44 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8028 #define GLPRT_PTC511L(_i) (0x00380C40 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8032 #define GLPRT_PTC64H(_i) (0x00380B84 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8036 #define GLPRT_PTC64L(_i) (0x00380B80 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8040 #define GLPRT_PTC9522H(_i) (0x00380D04 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8044 #define GLPRT_PTC9522L(_i) (0x00380D00 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8048 #define GLPRT_PXOFFRXC(_i, _j) (0x00380500 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8052 #define GLPRT_PXOFFRXC_H(_i, _j) (0x00380504 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8056 #define GLPRT_PXOFFTXC(_i, _j) (0x00380F40 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8060 #define GLPRT_PXOFFTXC_H(_i, _j) (0x00380F44 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8064 #define GLPRT_PXONRXC(_i, _j) (0x00380300 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8068 #define GLPRT_PXONRXC_H(_i, _j) (0x00380304 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8072 #define GLPRT_PXONTXC(_i, _j) (0x00380D40 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8076 #define GLPRT_PXONTXC_H(_i, _j) (0x00380D44 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8080 #define GLPRT_RFC(_i) (0x00380AC0 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8084 #define GLPRT_RFC_H(_i) (0x00380AC4 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8088 #define GLPRT_RJC(_i) (0x00380B00 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8092 #define GLPRT_RJC_H(_i) (0x00380B04 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8096 #define GLPRT_RLEC(_i) (0x00380140 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8100 #define GLPRT_RLEC_H(_i) (0x00380144 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8104 #define GLPRT_ROC(_i) (0x00380240 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8108 #define GLPRT_ROC_H(_i) (0x00380244 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8112 #define GLPRT_RUC(_i) (0x00380200 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8116 #define GLPRT_RUC_H(_i) (0x00380204 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8120 #define GLPRT_RXON2OFFCNT(_i, _j) (0x00380700 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8124 #define GLPRT_RXON2OFFCNT_H(_i, _j) (0x00380704 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...7 */ /* Reset Source: CORER */
8128 #define GLPRT_STDC(_i) (0x00340000 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
8132 #define GLPRT_TDOLD(_i) (0x00381280 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8136 #define GLPRT_TDOLD_H(_i) (0x00381284 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8140 #define GLPRT_UPRCH(_i) (0x00381304 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8144 #define GLPRT_UPRCL(_i) (0x00381300 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8148 #define GLPRT_UPTCH(_i) (0x003811C4 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8152 #define GLPRT_UPTCL(_i) (0x003811C0 + ((_i) * 8)) /* _i=0...7 */ /* Reset Source: CORER */
8156 #define GLSTAT_ACL_CNT_0_H(_i) (0x00388004 + ((_i) * 8)) /* _i=0...511 */ /* Reset Source: CORER */
8160 #define GLSTAT_ACL_CNT_0_L(_i) (0x00388000 + ((_i) * 8)) /* _i=0...511 */ /* Reset Source: CORER */
8164 #define GLSTAT_ACL_CNT_1_H(_i) (0x00389004 + ((_i) * 8)) /* _i=0...511 */ /* Reset Source: CORER */
8168 #define GLSTAT_ACL_CNT_1_L(_i) (0x00389000 + ((_i) * 8)) /* _i=0...511 */ /* Reset Source: CORER */
8172 #define GLSTAT_ACL_CNT_2_H(_i) (0x0038A004 + ((_i) * 8)) /* _i=0...511 */ /* Reset Source: CORER */
8176 #define GLSTAT_ACL_CNT_2_L(_i) (0x0038A000 + ((_i) * 8)) /* _i=0...511 */ /* Reset Source: CORER */
8180 #define GLSTAT_ACL_CNT_3_H(_i) (0x0038B004 + ((_i) * 8)) /* _i=0...511 */ /* Reset Source: CORER */
8184 #define GLSTAT_ACL_CNT_3_L(_i) (0x0038B000 + ((_i) * 8)) /* _i=0...511 */ /* Reset Source: CORER */
8188 #define GLSTAT_FD_CNT0H(_i) (0x003A0004 + ((_i) * 8)) /* _i=0...4095 */ /* Reset Source: CORER */
8192 #define GLSTAT_FD_CNT0L(_i) (0x003A0000 + ((_i) * 8)) /* _i=0...4095 */ /* Reset Source: CORER */
8196 #define GLSTAT_FD_CNT1H(_i) (0x003A8004 + ((_i) * 8)) /* _i=0...4095 */ /* Reset Source: CORER */
8200 #define GLSTAT_FD_CNT1L(_i) (0x003A8000 + ((_i) * 8)) /* _i=0...4095 */ /* Reset Source: CORER */
8204 #define GLSW_BPRCH(_i) (0x00346204 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8208 #define GLSW_BPRCL(_i) (0x00346200 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8212 #define GLSW_BPTCH(_i) (0x00310204 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8216 #define GLSW_BPTCL(_i) (0x00310200 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8220 #define GLSW_GORCH(_i) (0x00341004 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8224 #define GLSW_GORCL(_i) (0x00341000 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8228 #define GLSW_GOTCH(_i) (0x00302004 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8232 #define GLSW_GOTCL(_i) (0x00302000 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8236 #define GLSW_MPRCH(_i) (0x00346104 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8240 #define GLSW_MPRCL(_i) (0x00346100 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8244 #define GLSW_MPTCH(_i) (0x00310104 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8248 #define GLSW_MPTCL(_i) (0x00310100 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8252 #define GLSW_UPRCH(_i) (0x00346004 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8256 #define GLSW_UPRCL(_i) (0x00346000 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8260 #define GLSW_UPTCH(_i) (0x00310004 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8264 #define GLSW_UPTCL(_i) (0x00310000 + ((_i) * 8)) /* _i=0...31 */ /* Reset Source: CORER */
8268 #define GLSWID_RUPP(_i) (0x00345000 + ((_i) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
8272 #define GLV_BPRCH(_i) (0x003B6004 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8276 #define GLV_BPRCL(_i) (0x003B6000 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8280 #define GLV_BPTCH(_i) (0x0030E004 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8284 #define GLV_BPTCL(_i) (0x0030E000 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8288 #define GLV_GORCH(_i) (0x003B0004 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8292 #define GLV_GORCL(_i) (0x003B0000 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8296 #define GLV_GOTCH(_i) (0x00300004 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8300 #define GLV_GOTCL(_i) (0x00300000 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8304 #define GLV_MPRCH(_i) (0x003B4004 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8308 #define GLV_MPRCL(_i) (0x003B4000 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8312 #define GLV_MPTCH(_i) (0x0030C004 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8316 #define GLV_MPTCL(_i) (0x0030C000 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8320 #define GLV_RDPC(_i) (0x00294C04 + ((_i) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8324 #define GLV_REPC(_i) (0x00295804 + ((_i) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8330 #define GLV_TEPC(_VSI) (0x00312000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8334 #define GLV_UPRCH(_i) (0x003B2004 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8338 #define GLV_UPRCL(_i) (0x003B2000 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8342 #define GLV_UPTCH(_i) (0x0030A004 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8346 #define GLV_UPTCL(_i) (0x0030A000 + ((_i) * 8)) /* _i=0...767 */ /* Reset Source: CORER */
8350 #define GLVEBUP_RBCH(_i, _j) (0x00343004 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...31 */ /* Reset Source: CORER */
8354 #define GLVEBUP_RBCL(_i, _j) (0x00343000 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...31 */ /* Reset Source: CORER */
8358 #define GLVEBUP_RPCH(_i, _j) (0x00344004 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...31 */ /* Reset Source: CORER */
8362 #define GLVEBUP_RPCL(_i, _j) (0x00344000 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...31 */ /* Reset Source: CORER */
8366 #define GLVEBUP_TBCH(_i, _j) (0x00306004 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...31 */ /* Reset Source: CORER */
8370 #define GLVEBUP_TBCL(_i, _j) (0x00306000 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...31 */ /* Reset Source: CORER */
8374 #define GLVEBUP_TPCH(_i, _j) (0x00308004 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...31 */ /* Reset Source: CORER */
8378 #define GLVEBUP_TPCL(_i, _j) (0x00308000 + ((_i) * 8 + (_j) * 64)) /* _i=0...7, _j=0...31 */ /* Reset Source: CORER */
8382 #define PRTRPB_LDPC 0x000AC280 /* Reset Source: CORER */
8385 #define PRTRPB_RDPC 0x000AC260 /* Reset Source: CORER */
8388 #define PRTTPB_STAT_TC_BYTES_SENTL(_i) (0x00098200 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
8392 #define TPB_PRTTPB_STAT_PKT_SENT(_i) (0x00099470 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
8396 #define TPB_PRTTPB_STAT_TC_BYTES_SENT(_i) (0x00099094 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
8400 #define EMP_SWT_PRUNIND 0x00204020 /* Reset Source: CORER */
8409 #define EMP_SWT_REPIND 0x0020401C /* Reset Source: CORER */
8418 #define GL_OVERRIDEC 0x002040A4 /* Reset Source: CORER */
8423 #define GL_PLG_AVG_CALC_CFG 0x0020A5AC /* Reset Source: CORER */
8428 #define GL_PLG_AVG_CALC_ST 0x0020A5B0 /* Reset Source: CORER */
8435 #define GL_PRE_CFG_CMD 0x00214090 /* Reset Source: CORER */
8444 #define GL_PRE_CFG_DATA(_i) (0x00214074 + ((_i) * 4)) /* _i=0...6 */ /* Reset Source: CORER */
8448 #define GL_SWT_FUNCFILT 0x001D2698 /* Reset Source: CORER */
8451 #define GL_SWT_FW_STS(_i) (0x00216000 + ((_i) * 4)) /* _i=0...5 */ /* Reset Source: CORER */
8455 #define GL_SWT_LAT_DOUBLE 0x00204004 /* Reset Source: CORER */
8460 #define GL_SWT_LAT_QUAD 0x00204008 /* Reset Source: CORER */
8465 #define GL_SWT_LAT_SINGLE 0x00204000 /* Reset Source: CORER */
8470 #define GL_SWT_MD_PRI 0x002040AC /* Reset Source: CORER */
8481 #define GL_SWT_MIRTARVSI(_i) (0x00204500 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
8493 #define GL_SWT_SWIDFVIDX 0x00214114 /* Reset Source: CORER */
8498 #define GL_VP_SWITCHID(_i) (0x00214094 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
8502 #define GLSWID_STAT_BLOCK(_i) (0x0020A1A4 + ((_i) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
8508 #define GLSWT_ACT_RESP_0 0x0020A5A4 /* Reset Source: CORER */
8511 #define GLSWT_ACT_RESP_1 0x0020A5A8 /* Reset Source: CORER */
8514 #define GLSWT_ARB_MODE 0x0020A674 /* Reset Source: CORER */
8519 #define PRT_SBPVSI 0x00204120 /* Reset Source: CORER */
8524 #define PRT_SCSTS 0x00204140 /* Reset Source: CORER */
8533 #define PRT_SWT_BSCCNT 0x00204160 /* Reset Source: CORER */
8536 #define PRT_SWT_BSCTRH 0x00204180 /* Reset Source: CORER */
8539 #define PRT_SWT_MIREG 0x002042A0 /* Reset Source: CORER */
8544 #define PRT_SWT_MIRIG 0x00204280 /* Reset Source: CORER */
8549 #define PRT_SWT_MSCCNT 0x00204100 /* Reset Source: CORER */
8552 #define PRT_SWT_MSCTRH 0x002041C0 /* Reset Source: CORER */
8555 #define PRT_SWT_SCBI 0x002041E0 /* Reset Source: CORER */
8558 #define PRT_SWT_SCCRL 0x00204200 /* Reset Source: CORER */
8569 #define PRT_TCTUPR(_i) (0x00040840 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
8587 #define GLHH_ART_CTL 0x000A41D4 /* Reset Source: POR */
8596 #define GLHH_ART_DATA 0x000A41E0 /* Reset Source: POR */
8607 #define GLHH_ART_TIME_H 0x000A41D8 /* Reset Source: POR */
8610 #define GLHH_ART_TIME_L 0x000A41DC /* Reset Source: POR */
8613 #define GLTSYN_AUX_IN_0(_i) (0x000889D8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8619 #define GLTSYN_AUX_IN_1(_i) (0x000889E0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8625 #define GLTSYN_AUX_IN_2(_i) (0x000889E8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8631 #define GLTSYN_AUX_OUT_0(_i) (0x00088998 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8643 #define GLTSYN_AUX_OUT_1(_i) (0x000889A0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8655 #define GLTSYN_AUX_OUT_2(_i) (0x000889A8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8667 #define GLTSYN_AUX_OUT_3(_i) (0x000889B0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8679 #define GLTSYN_CLKO_0(_i) (0x000889B8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8683 #define GLTSYN_CLKO_1(_i) (0x000889C0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8687 #define GLTSYN_CLKO_2(_i) (0x000889C8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8691 #define GLTSYN_CLKO_3(_i) (0x000889D0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8695 #define GLTSYN_CMD 0x00088810 /* Reset Source: CORER */
8700 #define GLTSYN_CMD_SYNC 0x00088814 /* Reset Source: CORER */
8703 #define GLTSYN_ENA(_i) (0x00088808 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8707 #define GLTSYN_EVNT_H_0(_i) (0x00088970 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8711 #define GLTSYN_EVNT_H_1(_i) (0x00088980 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8715 #define GLTSYN_EVNT_H_2(_i) (0x00088990 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8719 #define GLTSYN_EVNT_L_0(_i) (0x00088968 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8723 #define GLTSYN_EVNT_L_1(_i) (0x00088978 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8727 #define GLTSYN_EVNT_L_2(_i) (0x00088988 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8731 #define GLTSYN_HHTIME_H(_i) (0x00088900 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8735 #define GLTSYN_HHTIME_L(_i) (0x000888F8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8739 #define GLTSYN_INCVAL_H(_i) (0x00088920 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8743 #define GLTSYN_INCVAL_L(_i) (0x00088918 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8747 #define GLTSYN_SHADJ_H(_i) (0x00088910 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8751 #define GLTSYN_SHADJ_L(_i) (0x00088908 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8755 #define GLTSYN_SHTIME_0(_i) (0x000888E0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8759 #define GLTSYN_SHTIME_H(_i) (0x000888F0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8763 #define GLTSYN_SHTIME_L(_i) (0x000888E8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8767 #define GLTSYN_STAT(_i) (0x000888C0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8783 #define GLTSYN_SYNC_DLAY 0x00088818 /* Reset Source: CORER */
8786 #define GLTSYN_TGT_H_0(_i) (0x00088930 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8790 #define GLTSYN_TGT_H_1(_i) (0x00088940 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8794 #define GLTSYN_TGT_H_2(_i) (0x00088950 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8798 #define GLTSYN_TGT_H_3(_i) (0x00088960 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8802 #define GLTSYN_TGT_L_0(_i) (0x00088928 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8806 #define GLTSYN_TGT_L_1(_i) (0x00088938 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8810 #define GLTSYN_TGT_L_2(_i) (0x00088948 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8814 #define GLTSYN_TGT_L_3(_i) (0x00088958 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8818 #define GLTSYN_TIME_0(_i) (0x000888C8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8822 #define GLTSYN_TIME_H(_i) (0x000888D8 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8826 #define GLTSYN_TIME_L(_i) (0x000888D0 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
8830 #define PFHH_SEM 0x000A4200 /* Reset Source: PFR */
8835 #define PFTSYN_SEM 0x00088880 /* Reset Source: PFR */
8840 #define GLPE_TSCD_FLR(_i) (0x0051E24C + ((_i) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
8854 #define GLPE_TSCD_PEPM 0x0051E228 /* Reset Source: CORER */
8857 #define PF_VIRT_VSTATUS 0x0009E680 /* Reset Source: PFR */
8864 #define PF_VT_PFALLOC 0x001D2480 /* Reset Source: CORER */
8871 #define PF_VT_PFALLOC_HIF 0x0009DD80 /* Reset Source: PCIR */
8878 #define PF_VT_PFALLOC_PCIE 0x000BE080 /* Reset Source: PCIR */
8885 #define VSI_L2TAGSTXVALID(_VSI) (0x00046000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8907 #define VSI_PASID(_VSI) (0x0009C000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */
8913 #define VSI_RUPR(_VSI) (0x00050000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8931 #define VSI_RXSWCTRL(_VSI) (0x00205000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8939 #define VSI_SRCSWCTRL(_VSI) (0x00209000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8951 #define VSI_SWITCHID(_VSI) (0x00215000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8955 #define VSI_SWT_MIREG(_VSI) (0x00207000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8961 #define VSI_SWT_MIRIG(_VSI) (0x00208000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8967 #define VSI_TAIR(_VSI) (0x00044000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */
8971 #define VSI_TAR(_VSI) (0x00045000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8977 #define VSI_TIR_0(_VSI) (0x00041000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8981 #define VSI_TIR_1(_VSI) (0x00042000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8985 #define VSI_TIR_2(_VSI) (0x00043000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8989 #define VSI_TSR(_VSI) (0x00051000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
8997 #define VSI_TUPIOM(_VSI) (0x00048000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
9015 #define VSI_TUPR(_VSI) (0x00047000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
9033 #define VSI_VSI2F(_VSI) (0x001D0000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */
9047 #define VSIQF_FD_CNT(_VSI) (0x00464000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */
9057 #define VSIQF_FD_CTL1(_VSI) (0x00411000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
9065 #define VSIQF_FD_DFLT(_VSI) (0x00457000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
9077 #define VSIQF_FD_SIZE(_VSI) (0x00462000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
9087 #define VSIQF_HASH_CTL(_VSI) (0x0040D000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
9099 #define VSIQF_HKEY(_i, _VSI) (0x00400000 + ((_i) * 4096 + (_VSI) * 4)) /* _i=0...12, _VSI=0...767 */ /* Reset Source: PFR */
9109 #define VSIQF_HLUT(_i, _VSI) (0x00420000 + ((_i) * 4096 + (_VSI) * 4)) /* _i=0...15, _VSI=0...767 */ /* Reset Source: PFR */
9119 #define VSIQF_PE_CTL1(_VSI) (0x00414000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
9123 #define VSIQF_TC_REGION(_i, _VSI) (0x00448000 + ((_i) * 4096 + (_VSI) * 4)) /* _i=0...3, _VSI=0...767 */ /* Reset Source: CORER */
9133 #define GLPM_WUMC 0x0009DEE4 /* Reset Source: POR */
9136 #define PFPM_APM 0x000B8080 /* Reset Source: POR */
9139 #define PFPM_WUC 0x0009DC80 /* Reset Source: POR */
9142 #define PFPM_WUFC 0x0009DC00 /* Reset Source: POR */
9183 #define PFPM_WUS 0x0009DB80 /* Reset Source: POR */
9211 #define E800_PRTPM_SAH(_i) (0x001E3BA0 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: PFR */
9212 #define E830_PRTPM_SAH(_i) (0x001E2380 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: PFR */
9223 #define E800_PRTPM_SAL(_i) (0x001E3B20 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: PFR */
9224 #define E830_PRTPM_SAL(_i) (0x001E2300 + ((_i) * 32)) /* _i=0...3 */ /* Reset Source: PFR */
9228 #define GLPE_CQM_FUNC_INVALIDATE 0x00503300 /* Reset Source: CORER */
9238 #define E800_VFPE_MRTEIDXMASK 0x00009000 /* Reset Source: PFR */
9239 #define E830_VFPE_MRTEIDXMASK(_VF) (0x00509800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
9242 #define GLTSYN_HH_DLAY 0x0008881C /* Reset Source: CORER */
9245 #define VF_MBX_ARQBAH1 0x00006000 /* Reset Source: CORER */
9248 #define VF_MBX_ARQBAL1 0x00006C00 /* Reset Source: CORER */
9253 #define VF_MBX_ARQH1 0x00007400 /* Reset Source: CORER */
9256 #define VF_MBX_ARQLEN1 0x00008000 /* Reset Source: PFR */
9267 #define VF_MBX_ARQT1 0x00007000 /* Reset Source: CORER */
9270 #define VF_MBX_ATQBAH1 0x00007800 /* Reset Source: CORER */
9273 #define VF_MBX_ATQBAL1 0x00007C00 /* Reset Source: CORER */
9276 #define VF_MBX_ATQH1 0x00006400 /* Reset Source: CORER */
9279 #define VF_MBX_ATQLEN1 0x00006800 /* Reset Source: PFR */
9290 #define VF_MBX_ATQT1 0x00008400 /* Reset Source: CORER */
9293 #define PFPCI_VF_FLUSH_DONE1 0x0000E400 /* Reset Source: PCIR */
9296 #define VFGEN_RSTAT1 0x00008800 /* Reset Source: VFR */
9299 #define VFINT_DYN_CTL0 0x00005C00 /* Reset Source: CORER */
9318 #define VFINT_DYN_CTLN(_i) (0x00003800 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
9338 #define VFINT_ITR0(_i) (0x00004C00 + ((_i) * 4)) /* _i=0...2 */ /* Reset Source: CORER */
9343 #define E800_VFINT_ITRN(_i, _j) (0x00002800 + ((_i) * 4 + (_j) * 12)) /* _i=0...2, _j=0...63 */ /* Reset Source: CORER */
9344 #define E830_VFINT_ITRN(_i, _j) (0x00002800 + ((_i) * 4 + (_j) * 64)) /* _i=0...15, _j=0...2 */ /* Reset Source: CORER */
9350 #define QRX_TAIL1(_QRX) (0x00002000 + ((_QRX) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
9354 #define QTX_TAIL(_DBQM) (0x00000000 + ((_DBQM) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
9358 #define VF_MBX_CPM_ARQBAH1 0x0000F060 /* Reset Source: CORER */
9361 #define VF_MBX_CPM_ARQBAL1 0x0000F050 /* Reset Source: CORER */
9366 #define VF_MBX_CPM_ARQH1 0x0000F080 /* Reset Source: CORER */
9369 #define VF_MBX_CPM_ARQLEN1 0x0000F070 /* Reset Source: PFR */
9380 #define VF_MBX_CPM_ARQT1 0x0000F090 /* Reset Source: CORER */
9383 #define VF_MBX_CPM_ATQBAH1 0x0000F010 /* Reset Source: CORER */
9386 #define VF_MBX_CPM_ATQBAL1 0x0000F000 /* Reset Source: CORER */
9389 #define VF_MBX_CPM_ATQH1 0x0000F030 /* Reset Source: CORER */
9392 #define VF_MBX_CPM_ATQLEN1 0x0000F020 /* Reset Source: PFR */
9403 #define VF_MBX_CPM_ATQT1 0x0000F040 /* Reset Source: CORER */
9406 #define VF_MBX_HLP_ARQBAH1 0x00020060 /* Reset Source: CORER */
9409 #define VF_MBX_HLP_ARQBAL1 0x00020050 /* Reset Source: CORER */
9414 #define VF_MBX_HLP_ARQH1 0x00020080 /* Reset Source: CORER */
9417 #define VF_MBX_HLP_ARQLEN1 0x00020070 /* Reset Source: PFR */
9428 #define VF_MBX_HLP_ARQT1 0x00020090 /* Reset Source: CORER */
9431 #define VF_MBX_HLP_ATQBAH1 0x00020010 /* Reset Source: CORER */
9434 #define VF_MBX_HLP_ATQBAL1 0x00020000 /* Reset Source: CORER */
9437 #define VF_MBX_HLP_ATQH1 0x00020030 /* Reset Source: CORER */
9440 #define VF_MBX_HLP_ATQLEN1 0x00020020 /* Reset Source: PFR */
9451 #define VF_MBX_HLP_ATQT1 0x00020040 /* Reset Source: CORER */
9454 #define VF_MBX_PSM_ARQBAH1 0x00021060 /* Reset Source: CORER */
9457 #define VF_MBX_PSM_ARQBAL1 0x00021050 /* Reset Source: CORER */
9462 #define VF_MBX_PSM_ARQH1 0x00021080 /* Reset Source: CORER */
9465 #define VF_MBX_PSM_ARQLEN1 0x00021070 /* Reset Source: PFR */
9476 #define VF_MBX_PSM_ARQT1 0x00021090 /* Reset Source: CORER */
9479 #define VF_MBX_PSM_ATQBAH1 0x00021010 /* Reset Source: CORER */
9482 #define VF_MBX_PSM_ATQBAL1 0x00021000 /* Reset Source: CORER */
9485 #define VF_MBX_PSM_ATQH1 0x00021030 /* Reset Source: CORER */
9488 #define VF_MBX_PSM_ATQLEN1 0x00021020 /* Reset Source: PFR */
9499 #define VF_MBX_PSM_ATQT1 0x00021040 /* Reset Source: CORER */
9502 #define VF_SB_CPM_ARQBAH1 0x0000F160 /* Reset Source: CORER */
9505 #define VF_SB_CPM_ARQBAL1 0x0000F150 /* Reset Source: CORER */
9510 #define VF_SB_CPM_ARQH1 0x0000F180 /* Reset Source: CORER */
9513 #define VF_SB_CPM_ARQLEN1 0x0000F170 /* Reset Source: PFR */
9524 #define VF_SB_CPM_ARQT1 0x0000F190 /* Reset Source: CORER */
9527 #define VF_SB_CPM_ATQBAH1 0x0000F110 /* Reset Source: CORER */
9530 #define VF_SB_CPM_ATQBAL1 0x0000F100 /* Reset Source: CORER */
9533 #define VF_SB_CPM_ATQH1 0x0000F130 /* Reset Source: CORER */
9536 #define VF_SB_CPM_ATQLEN1 0x0000F120 /* Reset Source: PFR */
9547 #define VF_SB_CPM_ATQT1 0x0000F140 /* Reset Source: CORER */
9550 #define VFINT_DYN_CTL(_i) (0x00023000 + ((_i) * 4096)) /* _i=0...7 */ /* Reset Source: CORER */
9570 #define VFINT_ITR_0(_i) (0x00023004 + ((_i) * 4096)) /* _i=0...7 */ /* Reset Source: CORER */
9574 #define VFINT_ITR_1(_i) (0x00023008 + ((_i) * 4096)) /* _i=0...7 */ /* Reset Source: CORER */
9578 #define VFINT_ITR_2(_i) (0x0002300C + ((_i) * 4096)) /* _i=0...7 */ /* Reset Source: CORER */
9582 #define VFQRX_TAIL(_QRX) (0x0002E000 + ((_QRX) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
9586 #define VFQTX_COMM_DBELL(_DBQM) (0x00030000 + ((_DBQM) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
9590 #define VFQTX_COMM_DBLQ_DBELL(_DBLQ) (0x00022000 + ((_DBLQ) * 4)) /* _i=0...3 */ /* Reset Source: CORER */
9594 #define MSIX_TMSG1(_i) (0x00000008 + ((_i) * 16)) /* _i=0...64 */ /* Reset Source: FLR */
9598 #define VFPE_AEQALLOC1 0x0000A400 /* Reset Source: VFR */
9601 #define VFPE_CCQPHIGH1 0x00009800 /* Reset Source: VFR */
9604 #define VFPE_CCQPLOW1 0x0000AC00 /* Reset Source: VFR */
9607 #define VFPE_CCQPSTATUS1 0x0000B800 /* Reset Source: VFR */
9616 #define VFPE_CQACK1 0x0000B000 /* Reset Source: VFR */
9619 #define VFPE_CQARM1 0x0000B400 /* Reset Source: VFR */
9622 #define VFPE_CQPDB1 0x0000BC00 /* Reset Source: VFR */
9625 #define VFPE_CQPERRCODES1 0x00009C00 /* Reset Source: VFR */
9630 #define VFPE_CQPTAIL1 0x0000A000 /* Reset Source: VFR */
9635 #define VFPE_IPCONFIG01 0x00008C00 /* Reset Source: VFR */
9642 #define E800_VFPE_MRTEIDXMASK1(_VF) (0x00509800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: PFR */
9646 #define E800_VFPE_RCVUNEXPECTEDERROR1 0x00009400 /* Reset Source: VFR */
9649 #define VFPE_TCPNOWTIMER1 0x0000A800 /* Reset Source: VFR */
9652 #define VFPE_WQEALLOC1 0x0000C000 /* Reset Source: VFR */
9657 #define E830_GL_QRX_CONTEXT_CTL 0x00296640 /* Reset Source: CORER */
9664 #define E830_GL_QRX_CONTEXT_DATA(_i) (0x00296620 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9668 #define E830_GL_QRX_CONTEXT_STAT 0x00296644 /* Reset Source: CORER */
9671 #define E830_GL_RCB_INTERNAL(_i) (0x00122600 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
9675 #define E830_GL_RLAN_INTERNAL(_i) (0x00296700 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
9679 #define E830_GLPQMDBL_PQMDBL_IN_WRR_MAX_CREDITS 0x002D30F0 /* Reset Source: CORER */
9686 #define E830_GLPQMDBL_PQMDBL_IN_WRR_WEIGHTS 0x002D30F4 /* Reset Source: CORER */
9693 #define E830_GLPQMDBL_PQMDBL_OUT_WRR_MAX_CREDITS 0x002D30F8 /* Reset Source: CORER */
9698 #define E830_GLPQMDBL_PQMDBL_OUT_WRR_WEIGHTS 0x002D30FC /* Reset Source: CORER */
9703 #define E830_GLQTX_TXTIME_DBELL_LSB(_DBQM) (0x002E0000 + ((_DBQM) * 8)) /* _i=0...16383 */ /* Reset Source: CORER */
9707 #define E830_GLQTX_TXTIME_DBELL_MSB(_DBQM) (0x002E0004 + ((_DBQM) * 8)) /* _i=0...16383 */ /* Reset Source: CORER */
9713 #define E830_GLTXTIME_DBL_COMP_WRR_MAX_CREDITS 0x002D320C /* Reset Source: CORER */
9718 #define E830_GLTXTIME_DBL_COMP_WRR_WEIGHTS 0x002D3210 /* Reset Source: CORER */
9723 #define E830_GLTXTIME_FETCH_PROFILE(_i, _j) (0x002D3500 + ((_i) * 4 + (_j) * 64)) /* _i=0...15, _j=0...15 */ /* Reset Source: CORER */
9729 #define E830_GLTXTIME_OUTST_REQ_CNTL 0x002D3214 /* Reset Source: CORER */
9734 #define E830_GLTXTIME_QTX_CNTX_CTL 0x002D3204 /* Reset Source: CORER */
9741 #define E830_GLTXTIME_QTX_CNTX_DATA(_i) (0x002D3104 + ((_i) * 4)) /* _i=0...6 */ /* Reset Source: CORER */
9745 #define E830_GLTXTIME_QTX_CNTX_STAT 0x002D3208 /* Reset Source: CORER */
9748 #define E830_GLTXTIME_TS_CFG 0x002D3100 /* Reset Source: CORER */
9755 #define E830_MBX_PF_DEC_ERR 0x00234100 /* Reset Source: CORER */
9758 #define E830_MBX_PF_IN_FLIGHT_VF_MSGS_THRESH 0x00234000 /* Reset Source: CORER */
9761 #define E830_MBX_VF_DEC_TRIG(_VF) (0x00233800 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
9765 #define E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(_VF) (0x00233000 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
9769 #define E830_GLRCB_AG_ARBITER_CONFIG 0x00122500 /* Reset Source: CORER */
9772 #define E830_GLRCB_AG_DCB_ARBITER_CONFIG 0x00122518 /* Reset Source: CORER */
9777 #define E830_GLRCB_AG_DCB_NODE_CONFIG(_i) (0x00122510 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
9781 #define E830_GLRCB_AG_DCB_NODE_STATE(_i) (0x00122508 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
9785 #define E830_GLRCB_AG_NODE_CONFIG(_i) (0x001224E0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9789 #define E830_GLRCB_AG_NODE_STATE(_i) (0x001224C0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9793 #define E830_PRT_AG_PORT_FC_MAP 0x00122520 /* Reset Source: CORER */
9796 #define E830_GL_FW_LOGS_CTL 0x000827F8 /* Reset Source: POR */
9799 #define E830_GL_FW_LOGS_STS 0x000827FC /* Reset Source: POR */
9804 #define E830_GL_RTCTL 0x000827F0 /* Reset Source: POR */
9807 #define E830_GL_RTCTM 0x000827F4 /* Reset Source: POR */
9812 #define E830_GLPE_TSCD_NUM_PQS 0x0051E2FC /* Reset Source: CORER */
9815 #define E830_GLTPB_100G_RPB_FC_THRESH2 0x0009972C /* Reset Source: CORER */
9820 #define E830_GLTPB_100G_RPB_FC_THRESH3 0x00099730 /* Reset Source: CORER */
9825 #define E830_PORT_TIMER_SEL(_i) (0x00088BE0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9831 #define E830_PRTMAC_SHORT_PAC_DROP_BYTE_CNT 0x001E2280 /* Reset Source: GLOBR */
9834 #define E830_PRTTSYN_TXTIME_H(_i) (0x001E5800 + ((_i) * 32)) /* _i=0...63 */ /* Reset Source: GLOBR */
9838 #define E830_PRTTSYN_TXTIME_L(_i) (0x001E5000 + ((_i) * 32)) /* _i=0...63 */ /* Reset Source: GLOBR */
9844 #define E830_GL_MDCK_TDAT_TCLAN_TSYN 0x000FD200 /* Reset Source: CORER */
9849 #define E830_GL_MDET_RX_FIFO 0x00296840 /* Reset Source: CORER */
9864 #define E830_GL_MDET_RX_PF_CNT(_i) (0x00296800 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9868 #define E830_GL_MDET_RX_VF(_i) (0x00296820 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9872 #define E830_GL_MDET_TX_PQM_FIFO 0x002D4B00 /* Reset Source: CORER */
9887 #define E830_GL_MDET_TX_PQM_PF_CNT(_i) (0x002D4AC0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9891 #define E830_GL_MDET_TX_PQM_VF(_i) (0x002D4AE0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9895 #define E830_GL_MDET_TX_TCLAN_FIFO 0x000FCFD0 /* Reset Source: CORER */
9910 #define E830_GL_MDET_TX_TCLAN_PF_CNT(_i) (0x000FCF90 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9914 #define E830_GL_MDET_TX_TCLAN_VF(_i) (0x000FCFB0 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9918 #define E830_GL_MDET_TX_TDPU_FIFO 0x00049D80 /* Reset Source: CORER */
9933 #define E830_GL_MDET_TX_TDPU_PF_CNT(_i) (0x00049D40 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9937 #define E830_GL_MDET_TX_TDPU_VF(_i) (0x00049D60 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
9941 #define E830_GL_MNG_ECDSA_PUBKEY_HIGH(_i) (0x00083400 + ((_i) * 4)) /* _i=0...11 */ /* Reset Source: EMPR */
9945 #define E830_GL_MNG_ECDSA_PUBKEY_LOW(_i) (0x00083300 + ((_i) * 4)) /* _i=0...11 */ /* Reset Source: EMPR */
9949 #define E830_GL_PPRS_RX_SIZE_CTRL_0(_i) (0x00084900 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
9953 #define E830_GL_PPRS_RX_SIZE_CTRL_1(_i) (0x00085900 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
9957 #define E830_GL_PPRS_RX_SIZE_CTRL_2(_i) (0x00086900 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
9961 #define E830_GL_PPRS_RX_SIZE_CTRL_3(_i) (0x00087900 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
9965 #define E830_GL_RPRS_CSUM_PROT_ID_CFG_IP 0x00200740 /* Reset Source: CORER */
9974 #define E830_GL_RPRS_CSUM_PROT_ID_CFG_UDP_TCP 0x00200744 /* Reset Source: CORER */
9983 #define E830_GL_RPRS_PROT_ID_MAP(_i) (0x00200800 + ((_i) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
9993 #define E830_GL_RPRS_PROT_ID_MAP_PRFL(_i) (0x00201000 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
10027 #define E830_GL_RPRS_VALIDATE_CHECKS_CTL 0x00200748 /* Reset Source: CORER */
10040 #define E830_GL_TPRS_CSUM_PROT_ID_CFG_IP 0x00203A04 /* Reset Source: CORER */
10049 #define E830_GL_TPRS_CSUM_PROT_ID_CFG_UDP_TCP 0x00203A08 /* Reset Source: CORER */
10058 #define E830_GL_TPRS_PROT_ID_MAP(_i) (0x00202200 + ((_i) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
10068 #define E830_GL_TPRS_PROT_ID_MAP_PRFL(_i) (0x00202A00 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
10102 #define E830_GL_TPRS_VALIDATE_CHECKS_CTL 0x00203A00 /* Reset Source: CORER */
10115 #define E830_PRT_TDPU_TX_SIZE_CTRL 0x00049D20 /* Reset Source: CORER */
10118 #define E830_PRT_TPB_RX_LB_SIZE_CTRL 0x00099740 /* Reset Source: CORER */
10121 #define E830_GLQTX_TXTIME_DBELL_LSB_PAGE(_DBQM) (0x04000008 + ((_DBQM) * 4096)) /* _i=0...16383 */ /* Reset Source: CORER */
10125 #define E830_GLQTX_TXTIME_DBELL_MSB_PAGE(_DBQM) (0x0400000C + ((_DBQM) * 4096)) /* _i=0...16383 */ /* Reset Source: CORER */
10135 #define E830_GL_HIBA(_i) (0x00081000 + ((_i) * 4)) /* _i=0...1023 */ /* Reset Source: EMPR */
10139 #define E830_GL_HICR 0x00082040 /* Reset Source: EMPR */
10146 #define E830_GL_HICR_EN 0x00082044 /* Reset Source: EMPR */
10149 #define E830_GL_HIDA(_i) (0x00082000 + ((_i) * 4)) /* _i=0...15 */ /* Reset Source: EMPR */
10165 #define E830_GLFLXP_RXDID_FLX_WRD_6(_i) (0x0045CE00 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
10177 #define E830_GLFLXP_RXDID_FLX_WRD_7(_i) (0x0045CF00 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
10189 #define E830_GLFLXP_RXDID_FLX_WRD_8(_i) (0x0045D500 + ((_i) * 4)) /* _i=0...63 */ /* Reset Source: CORER */
10201 #define E830_GL_FW_LOGS(_i) (0x00082800 + ((_i) * 4)) /* _i=0...255 */ /* Reset Source: POR */
10213 #define E830_GLPCI_PLATFORM_INFO 0x0009DDC4 /* Reset Source: POR */
10222 #define E830_GL_TPB_LOCAL_TOPO 0x000996F4 /* Reset Source: CORER */
10227 #define E830_GL_TPB_PM_RESET 0x000996F0 /* Reset Source: CORER */
10232 #define E830_GLTPB_100G_MAC_FC_THRESH1 0x00099724 /* Reset Source: CORER */
10237 #define E830_GLTPB_100G_RPB_FC_THRESH0 0x0009963C /* Reset Source: CORER */
10242 #define E830_GLTPB_100G_RPB_FC_THRESH1 0x00099728 /* Reset Source: CORER */
10263 #define E830_PRTMAC_200G_CL01_PAUSE_QUANTA 0x001E3854 /* Reset Source: GLOBR */
10268 #define E830_PRTMAC_200G_CL01_QUANTA_THRESH 0x001E3864 /* Reset Source: GLOBR */
10273 #define E830_PRTMAC_200G_CL23_PAUSE_QUANTA 0x001E3858 /* Reset Source: GLOBR */
10278 #define E830_PRTMAC_200G_CL23_QUANTA_THRESH 0x001E3868 /* Reset Source: GLOBR */
10283 #define E830_PRTMAC_200G_CL45_PAUSE_QUANTA 0x001E385C /* Reset Source: GLOBR */
10288 #define E830_PRTMAC_200G_CL45_QUANTA_THRESH 0x001E386C /* Reset Source: GLOBR */
10293 #define E830_PRTMAC_200G_CL67_PAUSE_QUANTA 0x001E3860 /* Reset Source: GLOBR */
10298 #define E830_PRTMAC_200G_CL67_QUANTA_THRESH 0x001E3870 /* Reset Source: GLOBR */
10303 #define E830_PRTMAC_200G_COMMAND_CONFIG 0x001E3808 /* Reset Source: GLOBR */
10352 #define E830_PRTMAC_200G_CRC_INV_M 0x001E384C /* Reset Source: GLOBR */
10355 #define E830_PRTMAC_200G_FRM_LENGTH 0x001E3814 /* Reset Source: GLOBR */
10360 #define E830_PRTMAC_200G_HASHTABLE_LOAD 0x001E382C /* Reset Source: GLOBR */
10365 #define E830_PRTMAC_200G_MAC_ADDR_0 0x001E380C /* Reset Source: GLOBR */
10368 #define E830_PRTMAC_200G_MAC_ADDR_1 0x001E3810 /* Reset Source: GLOBR */
10371 #define E830_PRTMAC_200G_MDIO_CFG_STATUS 0x001E3830 /* Reset Source: GLOBR */
10384 #define E830_PRTMAC_200G_MDIO_COMMAND 0x001E3834 /* Reset Source: GLOBR */
10391 #define E830_PRTMAC_200G_MDIO_DATA 0x001E3838 /* Reset Source: GLOBR */
10398 #define E830_PRTMAC_200G_MDIO_REGADDR 0x001E383C /* Reset Source: GLOBR */
10401 #define E830_PRTMAC_200G_REVISION 0x001E3800 /* Reset Source: GLOBR */
10408 #define E830_PRTMAC_200G_RX_PAUSE_STATUS 0x001E3874 /* Reset Source: GLOBR */
10411 #define E830_PRTMAC_200G_SCRATCH 0x001E3804 /* Reset Source: GLOBR */
10414 #define E830_PRTMAC_200G_STATUS 0x001E3840 /* Reset Source: GLOBR */
10435 #define E830_PRTMAC_200G_TS_TIMESTAMP 0x001E387C /* Reset Source: GLOBR */
10438 #define E830_PRTMAC_200G_TX_FIFO_SECTIONS 0x001E3820 /* Reset Source: GLOBR */
10443 #define E830_PRTMAC_200G_TX_IPG_LENGTH 0x001E3844 /* Reset Source: GLOBR */
10448 #define E830_PRTMAC_200G_XIF_MODE 0x001E3880 /* Reset Source: GLOBR */
10459 #define E830_PRTMAC_APPROVED_SW_ADDR_MAC_100G_0 0x001E3C00 /* Reset Source: GLOBR */
10462 #define E830_PRTMAC_APPROVED_SW_ADDR_MAC_100G_1 0x001E3C20 /* Reset Source: GLOBR */
10465 #define E830_PRTMAC_APPROVED_SW_ADDR_MAC_100G_2 0x001E3C40 /* Reset Source: GLOBR */
10468 #define E830_PRTMAC_APPROVED_SW_ADDR_MAC_100G_3 0x001E3C60 /* Reset Source: GLOBR */
10471 #define E830_PRTMAC_APPROVED_SW_ADDR_MAC_200G_0 0x001E3C80 /* Reset Source: GLOBR */
10474 #define E830_PRTMAC_APPROVED_SW_ADDR_MAC_200G_1 0x001E3CA0 /* Reset Source: GLOBR */
10477 #define E830_PRTMAC_APPROVED_SW_ADDR_MAC_200G_2 0x001E3CC0 /* Reset Source: GLOBR */
10480 #define E830_PRTMAC_APPROVED_SW_ADDR_MAC_200G_3 0x001E3CE0 /* Reset Source: GLOBR */
10483 #define E830_PRTMAC_CF_GEN_STATUS 0x001E33C0 /* Reset Source: GLOBR */
10486 #define E830_PRTMAC_CL01_PAUSE_QUANTA 0x001E32A0 /* Reset Source: GLOBR */
10491 #define E830_PRTMAC_CL01_QUANTA_THRESH 0x001E3320 /* Reset Source: GLOBR */
10496 #define E830_PRTMAC_CL23_PAUSE_QUANTA 0x001E32C0 /* Reset Source: GLOBR */
10501 #define E830_PRTMAC_CL23_QUANTA_THRESH 0x001E3340 /* Reset Source: GLOBR */
10506 #define E830_PRTMAC_CL45_PAUSE_QUANTA 0x001E32E0 /* Reset Source: GLOBR */
10511 #define E830_PRTMAC_CL45_QUANTA_THRESH 0x001E3360 /* Reset Source: GLOBR */
10516 #define E830_PRTMAC_CL67_PAUSE_QUANTA 0x001E3300 /* Reset Source: GLOBR */
10521 #define E830_PRTMAC_CL67_QUANTA_THRESH 0x001E3380 /* Reset Source: GLOBR */
10526 #define E830_PRTMAC_COMMAND_CONFIG 0x001E3040 /* Reset Source: GLOBR */
10589 #define E830_PRTMAC_CRC_INV_M 0x001E3260 /* Reset Source: GLOBR */
10592 #define E830_PRTMAC_CRC_MODE 0x001E3240 /* Reset Source: GLOBR */
10601 #define E830_PRTMAC_CSR_TIMEOUT_CFG 0x001E3D00 /* Reset Source: GLOBR */
10604 #define E830_PRTMAC_CTL_RX_CFG 0x001E2160 /* Reset Source: GLOBR */
10611 #define E830_PRTMAC_CTL_RX_PAUSE_ENABLE 0x001E2180 /* Reset Source: GLOBR */
10614 #define E830_PRTMAC_CTL_TX_PAUSE_ENABLE 0x001E21A0 /* Reset Source: GLOBR */
10617 #define E830_PRTMAC_FRM_LENGTH 0x001E30A0 /* Reset Source: GLOBR */
10622 #define E830_PRTMAC_MAC_ADDR_0 0x001E3060 /* Reset Source: GLOBR */
10625 #define E830_PRTMAC_MAC_ADDR_1 0x001E3080 /* Reset Source: GLOBR */
10628 #define E830_PRTMAC_MDIO_CFG_STATUS 0x001E3180 /* Reset Source: GLOBR */
10641 #define E830_PRTMAC_MDIO_COMMAND 0x001E31A0 /* Reset Source: GLOBR */
10648 #define E830_PRTMAC_MDIO_DATA 0x001E31C0 /* Reset Source: GLOBR */
10655 #define E830_PRTMAC_MDIO_REGADDR 0x001E31E0 /* Reset Source: GLOBR */
10658 #define E830_PRTMAC_REVISION 0x001E3000 /* Reset Source: GLOBR */
10665 #define E830_PRTMAC_RX_OFLOW_PKT_DRP_BSOP_CNT 0x001E24C0 /* Reset Source: GLOBR */
10668 #define E830_PRTMAC_RX_PAUSE_STATUS 0x001E33A0 /* Reset Source: GLOBR */
10673 #define E830_PRTMAC_SCRATCH 0x001E3020 /* Reset Source: GLOBR */
10676 #define E830_PRTMAC_STATUS 0x001E3200 /* Reset Source: GLOBR */
10697 #define E830_PRTMAC_STATUS_SPARE 0x001E2740 /* Reset Source: GLOBR */
10700 #define E830_PRTMAC_TS_RX_PCS_LATENCY 0x001E2220 /* Reset Source: GLOBR */
10703 #define E830_PRTMAC_TS_TIMESTAMP 0x001E33E0 /* Reset Source: GLOBR */
10706 #define E830_PRTMAC_TS_TX_MEM_VALID_H 0x001E2020 /* Reset Source: GLOBR */
10709 #define E830_PRTMAC_TS_TX_MEM_VALID_L 0x001E2000 /* Reset Source: GLOBR */
10712 #define E830_PRTMAC_TS_TX_PCS_LATENCY 0x001E2200 /* Reset Source: GLOBR */
10715 #define E830_PRTMAC_TX_FIFO_SECTIONS 0x001E3100 /* Reset Source: GLOBR */
10720 #define E830_PRTMAC_TX_IPG_LENGTH 0x001E3220 /* Reset Source: GLOBR */
10727 #define E830_PRTMAC_USER_TX_PAUSE_CNT 0x001E2760 /* Reset Source: GLOBR */
10730 #define E830_PRTMAC_XIF_MODE 0x001E3400 /* Reset Source: GLOBR */
10767 #define E830_PRTPM_DFD_WOL_CNTR_PER_PF 0x001E2700 /* Reset Source: GLOBR */
10792 #define E830_GL_MDET_HIF_UR_FIFO 0x00096844 /* Reset Source: CORER */
10807 #define E830_GL_MDET_HIF_UR_PF_CNT(_i) (0x00096804 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
10811 #define E830_GL_MDET_HIF_UR_VF(_i) (0x00096824 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
10815 #define E830_PF_MDET_HIF_UR 0x00096880 /* Reset Source: CORER */
10818 #define E830_VM_MDET_TX_TCLAN(_i) (0x000FC348 + ((_i) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
10822 #define E830_VP_MDET_HIF_UR(_VF) (0x00096C00 + ((_VF) * 4)) /* _i=0...255 */ /* Reset Source: CORER */
10828 #define E830_DMA_AGENT_AT0 0x000BE268 /* Reset Source: PCIR */
10857 #define E830_DMA_AGENT_AT1 0x000BE26C /* Reset Source: PCIR */
10900 #define E830_GLPCI_DOE_BUSY_STATUS 0x0009DF70 /* Reset Source: PCIR */
10913 #define E830_GLPCI_DOE_CFG 0x0009DF54 /* Reset Source: PCIR */
10924 #define E830_GLPCI_DOE_CTRL 0x0009DF60 /* Reset Source: PCIR */
10929 #define E830_GLPCI_DOE_DBG 0x0009DF6C /* Reset Source: PCIR */
10944 #define E830_GLPCI_DOE_ERR_EN 0x0009DF64 /* Reset Source: PCIR */
10975 #define E830_GLPCI_DOE_ERR_STATUS 0x0009DF68 /* Reset Source: PCIR */
11008 #define E830_GLPCI_DOE_REQ_MSG_NUM_DWS 0x0009DF58 /* Reset Source: PCIR */
11011 #define E830_GLPCI_DOE_RESP 0x0009DF5C /* Reset Source: PCIR */
11016 #define E830_GLPCI_ERR_DBG 0x0009DF84 /* Reset Source: PCIR */
11029 #define E830_GLPCI_PUSH_PQM_CTRL 0x0009DF74 /* Reset Source: POR */
11048 #define E830_GLPCI_PUSH_PQM_DBG 0x0009DF7C /* Reset Source: PCIR */
11059 #define E830_GLPCI_PUSH_PQM_IF_TO_STATUS 0x0009DF78 /* Reset Source: PCIR */
11062 #define E830_GLPCI_RDPU_CMD_DBG 0x000BE264 /* Reset Source: PCIR */
11071 #define E830_GLPCI_RDPU_CMD_FIFO_DBG0 0x000BE25C /* Reset Source: PCIR */
11076 #define E830_GLPCI_RDPU_CMD_FIFO_DBG1 0x000BE260 /* Reset Source: PCIR */
11081 #define E830_GLPCI_RDPU_TAG 0x000BE258 /* Reset Source: PCIR */
11086 #define E830_GLPCI_SB_AER_MSG_OUT 0x0009DF80 /* Reset Source: PCIR */
11093 #define E830_GLPES_PFRXNPECNMARKEDPKTSHI(_i) (0x00553004 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
11097 #define E830_GLPES_PFRXNPECNMARKEDPKTSLO(_i) (0x00553000 + ((_i) * 8)) /* _i=0...127 */ /* Reset Source: CORER */
11101 #define E830_GLPES_PFRXRPCNPHANDLED(_i) (0x00552C00 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
11105 #define E830_GLPES_PFRXRPCNPIGNORED(_i) (0x00552800 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
11109 #define E830_GLPES_PFTXNPCNPSENT(_i) (0x00553800 + ((_i) * 4)) /* _i=0...127 */ /* Reset Source: CORER */
11113 #define E830_GLQF_FLAT_HLUT(_i) (0x004C0000 + ((_i) * 4)) /* _i=0...8191 */ /* Reset Source: CORER */
11123 #define E830_GLQF_QGRP_CNTX(_i) (0x00490000 + ((_i) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
11131 #define E830_GLQF_QGRP_PF_OWNER(_i) (0x00484000 + ((_i) * 4)) /* _i=0...2047 */ /* Reset Source: CORER */
11135 #define E830_PFQF_LUT_ALLOC 0x0048E000 /* Reset Source: CORER */
11140 #define E830_VSIQF_DEF_QGRP(_VSI) (0x00486000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */
11154 #define E830_GLPTM_ART_CTL 0x00088B50 /* Reset Source: POR */
11169 #define E830_GLPTM_ART_TIME_H 0x00088B54 /* Reset Source: POR */
11172 #define E830_GLPTM_ART_TIME_L 0x00088B58 /* Reset Source: POR */
11175 #define E830_GLTSYN_PTMTIME_H(_i) (0x00088B48 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
11179 #define E830_GLTSYN_PTMTIME_L(_i) (0x00088B40 + ((_i) * 4)) /* _i=0...1 */ /* Reset Source: CORER */
11183 #define E830_GLTSYN_TIME_H_0_AL 0x0008A004 /* Reset Source: CORER */
11186 #define E830_GLTSYN_TIME_H_1_AL 0x0008B004 /* Reset Source: CORER */
11189 #define E830_GLTSYN_TIME_L_0_AL 0x0008A000 /* Reset Source: CORER */
11192 #define E830_GLTSYN_TIME_L_1_AL 0x0008B000 /* Reset Source: CORER */
11195 #define E830_PFPTM_SEM 0x00088B00 /* Reset Source: PFR */
11200 #define E830_VSI_PASID_1(_VSI) (0x00094000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */
11206 #define E830_VSI_PASID_2(_VSI) (0x00095000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */
11217 #define E830_VSIQF_QGRP_CFG(_VSI) (0x00492000 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: CORER */
11223 #define E830_GLDCB_RTC_BLOCKED 0x0012274C /* Reset Source: CORER */
11226 #define E830_GLDCB_RTCID 0x00122900 /* Reset Source: CORER */
11229 #define E830_GLDCB_RTCTI_CDS_SET 0x00122748 /* Reset Source: CORER */
11232 #define E830_GLDCB_RTCTQ_PD(_i) (0x00122700 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
11238 #define E830_GLDCB_RTCTQ_SET 0x00122750 /* Reset Source: CORER */
11241 #define E830_GLDCB_RTCTQ_STICKY_EN 0x00122754 /* Reset Source: CORER */
11244 #define E830_GLDCB_RTCTS_PD(_i) (0x00122720 + ((_i) * 4)) /* _i=0...7 */ /* Reset Source: CORER */
11248 #define E830_GLRPB_TC_TOTAL_PC(_i) (0x000ACD00 + ((_i) * 4)) /* _i=0...31 */ /* Reset Source: CORER */
11252 #define E830_VFINT_ITRN_64(_i, _j) (0x00002C00 + ((_i) * 4 + (_j) * 256)) /* _i=0...63, _j=0...2 */ /* Reset Source: CORER */
11256 #define E830_GLQTX_TXTIME_DBELL_LSB1(_DBQM) (0x0000D000 + ((_DBQM) * 8)) /* _i=0...255 */ /* Reset Source: CORER */
11260 #define E830_GLQTX_TXTIME_DBELL_MSB1(_DBQM) (0x0000D004 + ((_DBQM) * 8)) /* _i=0...255 */ /* Reset Source: CORER */
11264 #define E830_GLQTX_TXTIME_LARGE_DBELL_LSB(_DBQM) (0x00040000 + ((_DBQM) * 8)) /* _i=0...255 */ /* Reset Source: CORER */
11268 #define E830_GLQTX_TXTIME_LARGE_DBELL_MSB(_DBQM) (0x00040004 + ((_DBQM) * 8)) /* _i=0...255 */ /* Reset Source: CORER */
11272 #define E830_GLTSYN_TIME_H_0_AL1 0x00003004 /* Reset Source: CORER */
11275 #define E830_GLTSYN_TIME_H_1_AL1 0x0000300C /* Reset Source: CORER */
11278 #define E830_GLTSYN_TIME_L_0_AL1 0x00003000 /* Reset Source: CORER */
11281 #define E830_GLTSYN_TIME_L_1_AL1 0x00003008 /* Reset Source: CORER */
11284 #define E830_VSI_VSI2F_LEM(_VSI) (0x006100A0 + ((_VSI) * 4)) /* _i=0...767 */ /* Reset Source: PFR */