Lines Matching +full:interrupt +full:- +full:counter
1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
38 #define REG_T1CL 4 /* T1 low-order latch/low-order counter */
39 #define REG_T1CH 5 /* T1 high-order counter */
40 #define REG_T1LL 6 /* T1 low-order latches */
41 #define REG_T1LH 7 /* T1 high-order latches */
42 #define REG_T2CL 8 /* T2 low-order latch/low-order counter */
43 #define REG_T2CH 9 /* T2 high-order counter */
47 #define REG_IFR 13 /* Interrupt flag register */
48 #define REG_IER 14 /* Interrupt-enable register */
54 #define ACR_SR_DIR 0x4 /* Bit for shift-register direction 1=out */
63 #define ACR_T1_SHIFT 5 /* bits 7-5 */
64 #define ACR_SR_SHIFT 2 /* bits 4-2 */
68 #define PCR_INTCNTL 0x01 /* interrupt active edge: +ve=1, -ve=0 */
71 #define PCR_CNTL_NEDGE 0x0 /* Input - negative active edge */
72 #define PCR_CNTL_INEDGE 0x1 /* Interrupt - negative active edge */
73 #define PCR_CNTL_PEDGE 0x2 /* Input - positive active edge */
74 #define PCR_CNTL_IPEDGE 0x3 /* Interrupt - positive active edge */
80 #define PCR_CB2_SHIFT 5 /* bits 7-5 */
82 #define PCR_CA2_SHIFT 1 /* bits 3-1 */
85 /* Interrupt flag register (13) */
95 /* Interrupt enable register (14) */