Lines Matching refs:QUICC_PRAM_BASE_SCC

41 #define	QUICC_PRAM_BASE_SCC(u)	(QUICC_PRAM_BASE + QUICC_PRAM_SIZE_SCC * (u))  macro
44 #define	QUICC_PRAM_SCC_RBASE(u)	(QUICC_PRAM_BASE_SCC(u) + 0x00)
45 #define	QUICC_PRAM_SCC_TBASE(u)	(QUICC_PRAM_BASE_SCC(u) + 0x02)
46 #define	QUICC_PRAM_SCC_RFCR(u)	(QUICC_PRAM_BASE_SCC(u) + 0x04)
47 #define	QUICC_PRAM_SCC_TFCR(u)	(QUICC_PRAM_BASE_SCC(u) + 0x05)
48 #define	QUICC_PRAM_SCC_MRBLR(u)	(QUICC_PRAM_BASE_SCC(u) + 0x06)
49 #define	QUICC_PRAM_SCC_RBPTR(u)	(QUICC_PRAM_BASE_SCC(u) + 0x10)
50 #define	QUICC_PRAM_SCC_TBPTR(u)	(QUICC_PRAM_BASE_SCC(u) + 0x20)
57 #define	QUICC_PRAM_SCC_UART_MAX_IDL(u)	(QUICC_PRAM_BASE_SCC(u) + 0x38)
58 #define	QUICC_PRAM_SCC_UART_IDLC(u)	(QUICC_PRAM_BASE_SCC(u) + 0x3a)
59 #define	QUICC_PRAM_SCC_UART_BRKCR(u)	(QUICC_PRAM_BASE_SCC(u) + 0x3c)
60 #define	QUICC_PRAM_SCC_UART_PAREC(u)	(QUICC_PRAM_BASE_SCC(u) + 0x3e)
61 #define	QUICC_PRAM_SCC_UART_FRMEC(u)	(QUICC_PRAM_BASE_SCC(u) + 0x40)
62 #define	QUICC_PRAM_SCC_UART_NOSEC(u)	(QUICC_PRAM_BASE_SCC(u) + 0x42)
63 #define	QUICC_PRAM_SCC_UART_BRKEC(u)	(QUICC_PRAM_BASE_SCC(u) + 0x44)
64 #define	QUICC_PRAM_SCC_UART_BRKLN(u)	(QUICC_PRAM_BASE_SCC(u) + 0x46)
65 #define	QUICC_PRAM_SCC_UART_UADDR1(u)	(QUICC_PRAM_BASE_SCC(u) + 0x48)
66 #define	QUICC_PRAM_SCC_UART_UADDR2(u)	(QUICC_PRAM_BASE_SCC(u) + 0x4a)
67 #define	QUICC_PRAM_SCC_UART_TOSEQ(u)	(QUICC_PRAM_BASE_SCC(u) + 0x4e)
68 #define	QUICC_PRAM_SCC_UART_CC(u,n)	(QUICC_PRAM_BASE_SCC(u) + 0x50 + (n)*2)
69 #define	QUICC_PRAM_SCC_UART_RCCM(u)	(QUICC_PRAM_BASE_SCC(u) + 0x60)
70 #define	QUICC_PRAM_SCC_UART_RCCR(u)	(QUICC_PRAM_BASE_SCC(u) + 0x62)
71 #define	QUICC_PRAM_SCC_UART_RLBC(u)	(QUICC_PRAM_BASE_SCC(u) + 0x64)