Lines Matching +full:0 +full:x000ff000
92 memset(c, 0, sizeof(*c)); in init_completion()
94 c->done = 0; in init_completion()
99 c->done = 0; in reinit_completion()
120 while (c->done == 0) in wait_for_completion()
121 mtx_sleep(c, &c->lock, 0, "hvwfc", 0); in wait_for_completion()
127 * Return: 0 if completed, a non-zero value if timed out.
136 if (c->done == 0) in wait_for_completion_timeout()
137 mtx_sleep(c, &c->lock, 0, "hvwfc", timeout); in wait_for_completion_timeout()
139 if (c->done > 0) { in wait_for_completion_timeout()
141 ret = 0; in wait_for_completion_timeout()
151 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
164 #define PCI_CONFIG_MMIO_LENGTH 0x2000
165 #define CFG_PAGE_OFFSET 0x1000
176 PCI_MESSAGE_BASE = 0x42490000,
177 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
185 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
186 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
187 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
188 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
189 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
190 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
191 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
192 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
193 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
194 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
195 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
196 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
197 PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16,
198 PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
199 PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
200 PCI_BUS_RELATIONS2 = PCI_MESSAGE_BASE + 0x19,
201 PCI_RESOURCES_ASSIGNED3 = PCI_MESSAGE_BASE + 0x1A,
202 PCI_CREATE_INTERRUPT_MESSAGE3 = PCI_MESSAGE_BASE + 0x1B,
206 #define STATUS_REVISION_MISMATCH 0xC0000059
310 struct pci_message message[0];
332 struct pci_func_desc func[0];
338 struct pci_func_desc2 func[0];
351 uint8_t memory_range[0x14][MAX_NUM_BARS]; /* unused here */
359 uint8_t memory_range[0x14][6]; /* not used here */
404 hv_pcibus_init = 0,
457 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
475 struct hv_pcidev_desc func[0];
484 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
485 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
486 #define PCI_FUNC(devfn) ((devfn) & 0x07)
493 wslot.val = 0; in devfn_to_wslot()
526 .hv_guid = {0x1D, 0xF6, 0xC4, 0x44, 0x44, 0x44, 0x00, 0x44,
527 0x9D, 0x52, 0x80, 0x2E, 0x27, 0xED, 0xE1, 0x9F}
548 * Return: 0 if response arrived, ENODEV if device revoked.
559 } while (wait_for_completion_timeout(c, hz /10) != 0); in wait_for_response()
561 return 0; in wait_for_response()
587 if (resp->status < 0) { in q_resource_requirements()
590 for (i = 0; i < MAX_NUM_BARS; i++) in q_resource_requirements()
620 memset(&ctxt, 0, sizeof(ctxt)); in hv_int_desc_free()
626 vmbus_chan_send(hpdev->hbus->sc->chan, VMBUS_CHANPKT_TYPE_INBAND, 0, in hv_int_desc_free()
627 int_pkt, sizeof(*int_pkt), 0); in hv_int_desc_free()
645 0, PCI_SLOT(devfn), PCI_FUNC(devfn)); in hv_pci_delete_device()
703 hbus->pci_domain = desc->ser & 0xFFFF; in new_pcichild_device()
759 for (child_no = 0; child_no < dr->device_count; child_no++) { in pci_devices_present_work()
832 if (hbus->detaching && relations->device_count > 0) in hv_pci_devices_present()
840 if (dr->device_count != 0) in hv_pci_devices_present()
850 TASK_INIT(&dr_wrk->task, 0, pci_devices_present_work, dr_wrk); in hv_pci_devices_present()
862 if (hbus->detaching && relations->device_count > 0) in hv_pci_devices_present2()
870 if (dr->device_count != 0) in hv_pci_devices_present2()
880 TASK_INIT(&dr_wrk->task, 0, pci_devices_present_work, dr_wrk); in hv_pci_devices_present2()
898 memset(&ctxt, 0, sizeof(ctxt)); in hv_eject_device_work()
902 vmbus_chan_send(hbus->sc->chan, VMBUS_CHANPKT_TYPE_INBAND, 0, in hv_eject_device_work()
903 eject_pkt, sizeof(*eject_pkt), 0); in hv_eject_device_work()
920 TASK_INIT(&hpdev->eject_task, 0, hv_eject_device_work, hpdev); in hv_pci_eject_device()
925 #define PCIB_PACKET_SIZE 0x100
968 if (ret != 0) { in vmbus_pcib_on_channel_callback()
991 if (bus_rel->device_count == 0) in vmbus_pcib_on_channel_callback()
1006 if (bus_rel2->device_count == 0) in vmbus_pcib_on_channel_callback()
1027 printf("vmbus_pcib: Unknown msg type 0x%x\n", in vmbus_pcib_on_channel_callback()
1064 for(i=0; i< num_version; i++) { in hv_pci_protocol_negotiation()
1080 if (comp_pkt.completion_status >= 0) { in hv_pci_protocol_negotiation()
1083 "PCI VMBus using version 0x%x\n", in hv_pci_protocol_negotiation()
1085 ret = 0; in hv_pci_protocol_negotiation()
1114 ret = vmbus_chan_send(hbus->sc->chan, VMBUS_CHANPKT_TYPE_INBAND, 0, in hv_pci_query_relations()
1115 &message, sizeof(message), 0); in hv_pci_query_relations()
1142 memset(d0_entry, 0, sizeof(*d0_entry)); in hv_pci_enter_d0()
1155 if (comp_pkt.completion_status < 0) { in hv_pci_enter_d0()
1159 ret = 0; in hv_pci_enter_d0()
1180 int ret = 0; in hv_send_resources_allocated()
1188 for (wslot = 0; wslot < 256; wslot++) { in hv_send_resources_allocated()
1195 memset(pkt, 0, sizeof(*pkt) + size_res); in hv_send_resources_allocated()
1225 if (comp_pkt.completion_status < 0) { in hv_send_resources_allocated()
1245 for (wslot = 0; wslot < 256; wslot++) { in hv_send_resources_released()
1254 VMBUS_CHANPKT_TYPE_INBAND, 0, &pkt, sizeof(pkt), 0); in hv_send_resources_released()
1259 return (0); in hv_send_resources_released()
1307 *val = 0; in _hv_pcifront_read_config()
1315 *val = 0; in _hv_pcifront_read_config()
1320 hv_cfg_write_4(hbus, 0, hpdev->desc.wslot.val); in _hv_pcifront_read_config()
1346 memset(val, 0, size); in _hv_pcifront_read_config()
1365 hv_cfg_write_4(hbus, 0, hpdev->desc.wslot.val); in _hv_pcifront_write_config()
1414 for (i = 0; i < 6; i++) { in vmbus_pcib_prepopulate_bars()
1416 if (hpdev->probed_bar[i] == 0) in vmbus_pcib_prepopulate_bars()
1419 uint32_t bar_val = 0; in vmbus_pcib_prepopulate_bars()
1430 4, 0xffffffff); in vmbus_pcib_prepopulate_bars()
1454 TASK_INIT(&task, 0, vmbus_pcib_set_detaching, hbus); in vmbus_pcib_pre_detach()
1474 &g_pass_through_dev_type) == 0) { in vmbus_pcib_probe()
1493 int rid = 0; in vmbus_pcib_attach()
1510 0, RM_MAX_END, PCI_CONFIG_MMIO_LENGTH, in vmbus_pcib_attach()
1541 NULL, 0, vmbus_pcib_on_channel_callback, sc); in vmbus_pcib_attach()
1578 return (0); in vmbus_pcib_attach()
1587 bus_release_resource(dev, SYS_RES_MEMORY, 0, hbus->cfg_res); in vmbus_pcib_attach()
1613 memset(&relations, 0, sizeof(relations)); in vmbus_pcib_detach()
1621 ret = vmbus_chan_send(sc->chan, VMBUS_CHANPKT_TYPE_INBAND, 0, in vmbus_pcib_detach()
1622 &teardown_packet, sizeof(struct pci_message), 0); in vmbus_pcib_detach()
1632 bus_release_resource(dev, SYS_RES_MEMORY, 0, hbus->cfg_res); in vmbus_pcib_detach()
1638 return (0); in vmbus_pcib_detach()
1649 return (0); in vmbus_pcib_read_ivar()
1652 /* There is only bus 0. */ in vmbus_pcib_read_ivar()
1653 *val = 0; in vmbus_pcib_read_ivar()
1654 return (0); in vmbus_pcib_read_ivar()
1696 end = ulmin(end, 0xFFFFFFFF); in vmbus_pcib_alloc_resource()
1777 uint32_t data = 0; in vmbus_pcib_read_config()
1779 KASSERT(bus == 0, ("bus should be 0, but is %u", bus)); in vmbus_pcib_read_config()
1783 return (~0); in vmbus_pcib_read_config()
1798 KASSERT(bus == 0, ("bus should be 0, but is %u", bus)); in vmbus_pcib_write_config()
1866 #define MSI_INTEL_ADDR_DEST 0x00000000
1867 #define MSI_INTEL_DATA_DELFIXED 0x0
1870 #define MSI_INTEL_ADDR_DEST 0x000ff000
1923 cpu = 0; in vmbus_pcib_map_msi()
1937 "vcpu_id %u overflowed on PCI VMBus version 0x%x\n", in vmbus_pcib_map_msi()
1944 memset(&ctxt, 0, sizeof(ctxt)); in vmbus_pcib_map_msi()
1966 ctxt.int_pkts.v3.int_desc.reserved = 0; in vmbus_pcib_map_msi()
1970 ctxt.int_pkts.v3.int_desc.processor_array[0] = vcpu_id; in vmbus_pcib_map_msi()
1985 if (comp.comp_pkt.completion_status < 0) { in vmbus_pcib_map_msi()
2000 return (0); in vmbus_pcib_map_msi()
2041 DRIVER_MODULE(vmbus_pcib, vmbus, vmbus_pcib_driver, 0, 0);