Lines Matching +full:1 +full:- +full:cpu
1 /*-
11 * 1. Redistributions of source code must retain the above copyright
36 #include <machine/cpu.h>
50 * Per-processor information.
66 reg = (1 << pmc); in arm64_interrupt_enable()
80 reg = (1 << pmc); in arm64_interrupt_disable()
94 reg = (1 << pmc); in arm64_counter_enable()
108 reg = (1 << pmc); in arm64_counter_disable()
165 arm64_allocate_pmc(int cpu, int ri, struct pmc *pm, in arm64_allocate_pmc() argument
171 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in arm64_allocate_pmc()
172 ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); in arm64_allocate_pmc()
176 if (a->pm_class != PMC_CLASS_ARMV8) { in arm64_allocate_pmc()
179 pe = a->pm_ev; in arm64_allocate_pmc()
181 if ((a->pm_flags & PMC_F_EV_PMU) != 0) { in arm64_allocate_pmc()
182 config = a->pm_md.pm_md_config; in arm64_allocate_pmc()
184 config = (uint32_t)pe - PMC_EV_ARMV8_FIRST; in arm64_allocate_pmc()
185 if (config > (PMC_EV_ARMV8_LAST - PMC_EV_ARMV8_FIRST)) in arm64_allocate_pmc()
189 switch (a->pm_caps & (PMC_CAP_SYSTEM | PMC_CAP_USER)) { in arm64_allocate_pmc()
217 pm->pm_md.pm_arm64.pm_arm64_evsel = config; in arm64_allocate_pmc()
218 PMCDBG2(MDP, ALL, 2, "arm64-allocate ri=%d -> config=0x%lx", ri, in arm64_allocate_pmc()
226 arm64_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) in arm64_read_pmc() argument
232 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in arm64_read_pmc()
233 ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); in arm64_read_pmc()
242 reg = (1 << ri); in arm64_read_pmc()
246 pm->pm_pcpu_state[cpu].pps_overflowcnt++; in arm64_read_pmc()
252 * If the counter is 32-bit increment the upper bits of the counter. in arm64_read_pmc()
253 * It it is 64-bit then there is nothing we can do as tmp is already in arm64_read_pmc()
254 * 64-bit. in arm64_read_pmc()
258 tmp += (uint64_t)pm->pm_pcpu_state[cpu].pps_overflowcnt << 32; in arm64_read_pmc()
262 PMCDBG2(MDP, REA, 2, "arm64-read id=%d -> %jd", ri, tmp); in arm64_read_pmc()
269 if ((tmp & (1ull << 63)) == 0) in arm64_read_pmc()
280 arm64_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) in arm64_write_pmc() argument
283 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in arm64_write_pmc()
284 ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); in arm64_write_pmc()
286 ("[arm64,%d] illegal row-index %d", __LINE__, ri)); in arm64_write_pmc()
291 PMCDBG3(MDP, WRI, 1, "arm64-write cpu=%d ri=%d v=%jx", cpu, ri, v); in arm64_write_pmc()
294 pm->pm_pcpu_state[cpu].pps_overflowcnt = v >> 32; in arm64_write_pmc()
303 arm64_config_pmc(int cpu, int ri, struct pmc *pm) in arm64_config_pmc() argument
307 PMCDBG3(MDP, CFG, 1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); in arm64_config_pmc()
309 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in arm64_config_pmc()
310 ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); in arm64_config_pmc()
312 ("[arm64,%d] illegal row-index %d", __LINE__, ri)); in arm64_config_pmc()
314 phw = &arm64_pcpu[cpu]->pc_arm64pmcs[ri]; in arm64_config_pmc()
316 KASSERT(pm == NULL || phw->phw_pmc == NULL, in arm64_config_pmc()
317 ("[arm64,%d] pm=%p phw->pm=%p hwpmc not unconfigured", in arm64_config_pmc()
318 __LINE__, pm, phw->phw_pmc)); in arm64_config_pmc()
320 phw->phw_pmc = pm; in arm64_config_pmc()
326 arm64_start_pmc(int cpu, int ri, struct pmc *pm) in arm64_start_pmc() argument
330 config = pm->pm_md.pm_arm64.pm_arm64_evsel; in arm64_start_pmc()
350 arm64_stop_pmc(int cpu, int ri, struct pmc *pm __unused) in arm64_stop_pmc() argument
362 arm64_release_pmc(int cpu, int ri, struct pmc *pmc) in arm64_release_pmc() argument
366 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in arm64_release_pmc()
367 ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); in arm64_release_pmc()
369 ("[arm64,%d] illegal row-index %d", __LINE__, ri)); in arm64_release_pmc()
371 phw = &arm64_pcpu[cpu]->pc_arm64pmcs[ri]; in arm64_release_pmc()
372 KASSERT(phw->phw_pmc == NULL, in arm64_release_pmc()
373 ("[arm64,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); in arm64_release_pmc()
384 int reg, cpu; in arm64_intr() local
386 cpu = curcpu; in arm64_intr()
387 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in arm64_intr()
388 ("[arm64,%d] CPU %d out of range", __LINE__, cpu)); in arm64_intr()
390 PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *)tf, in arm64_intr()
396 pm = arm64_pcpu[cpu]->pc_arm64pmcs[ri].phw_pmc; in arm64_intr()
400 reg = (1 << ri); in arm64_intr()
408 retval = 1; /* Found an interrupting PMC. */ in arm64_intr()
410 pm->pm_pcpu_state[cpu].pps_overflowcnt += 1; in arm64_intr()
415 if (pm->pm_state != PMC_STATE_RUNNING) in arm64_intr()
420 arm64_stop_pmc(cpu, ri, pm); in arm64_intr()
423 arm64_write_pmc(cpu, ri, pm, pm->pm_sc.pm_reloadcount); in arm64_intr()
430 arm64_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) in arm64_describe() argument
434 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in arm64_describe()
435 ("[arm64,%d], illegal CPU %d", __LINE__, cpu)); in arm64_describe()
437 ("[arm64,%d] row-index %d out of range", __LINE__, ri)); in arm64_describe()
439 phw = &arm64_pcpu[cpu]->pc_arm64pmcs[ri]; in arm64_describe()
441 snprintf(pi->pm_name, sizeof(pi->pm_name), "ARMV8-%d", ri); in arm64_describe()
442 pi->pm_class = PMC_CLASS_ARMV8; in arm64_describe()
444 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { in arm64_describe()
445 pi->pm_enabled = TRUE; in arm64_describe()
446 *ppmc = phw->phw_pmc; in arm64_describe()
448 pi->pm_enabled = FALSE; in arm64_describe()
456 arm64_get_config(int cpu, int ri, struct pmc **ppm) in arm64_get_config() argument
459 *ppm = arm64_pcpu[cpu]->pc_arm64pmcs[ri].phw_pmc; in arm64_get_config()
465 arm64_pcpu_init(struct pmc_mdep *md, int cpu) in arm64_pcpu_init() argument
474 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), in arm64_pcpu_init()
475 ("[arm64,%d] wrong cpu number %d", __LINE__, cpu)); in arm64_pcpu_init()
476 PMCDBG0(MDP, INI, 1, "arm64-pcpu-init"); in arm64_pcpu_init()
478 arm64_pcpu[cpu] = pac = malloc(sizeof(struct arm64_cpu), M_PMC, in arm64_pcpu_init()
481 pac->pc_arm64pmcs = malloc(sizeof(struct pmc_hw) * arm64_npmcs, in arm64_pcpu_init()
483 pc = pmc_pcpu[cpu]; in arm64_pcpu_init()
484 first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_ARMV8].pcd_ri; in arm64_pcpu_init()
485 KASSERT(pc != NULL, ("[arm64,%d] NULL per-cpu pointer", __LINE__)); in arm64_pcpu_init()
487 for (i = 0, phw = pac->pc_arm64pmcs; i < arm64_npmcs; i++, phw++) { in arm64_pcpu_init()
488 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | in arm64_pcpu_init()
489 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i); in arm64_pcpu_init()
490 phw->phw_pmc = NULL; in arm64_pcpu_init()
491 pc->pc_hwpmcs[i + first_ri] = phw; in arm64_pcpu_init()
514 arm64_pcpu_fini(struct pmc_mdep *md, int cpu) in arm64_pcpu_fini() argument
518 PMCDBG0(MDP, INI, 1, "arm64-pcpu-fini"); in arm64_pcpu_fini()
524 free(arm64_pcpu[cpu]->pc_arm64pmcs, M_PMC); in arm64_pcpu_fini()
525 free(arm64_pcpu[cpu], M_PMC); in arm64_pcpu_fini()
526 arm64_pcpu[cpu] = NULL; in arm64_pcpu_fini()
546 PMCDBG1(MDP, INI, 1, "arm64-init npmcs=%d", arm64_npmcs); in pmc_arm64_initialize()
549 * Write the CPU model to kern.hwpmc.cpuid. in pmc_arm64_initialize()
554 * For now, just use MIDR from CPU 0. in pmc_arm64_initialize()
556 midr = (uint64_t)(pcpu_find(0)->pc_midr); in pmc_arm64_initialize()
560 /* Check if we have 64-bit counters */ in pmc_arm64_initialize()
573 /* One AArch64 CPU class */ in pmc_arm64_initialize()
574 classes = 1; in pmc_arm64_initialize()
591 pmc_mdep->pmd_cputype = PMC_CPU_ARMV8_CORTEX_A76; in pmc_arm64_initialize()
595 pmc_mdep->pmd_cputype = PMC_CPU_ARMV8_CORTEX_A57; in pmc_arm64_initialize()
599 pmc_mdep->pmd_cputype = PMC_CPU_ARMV8_CORTEX_A53; in pmc_arm64_initialize()
604 pmc_mdep->pmd_cputype = PMC_CPU_ARMV8_CORTEX_A53; in pmc_arm64_initialize()
608 pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_ARMV8]; in pmc_arm64_initialize()
609 pcd->pcd_caps = ARMV8_PMC_CAPS; in pmc_arm64_initialize()
610 pcd->pcd_class = PMC_CLASS_ARMV8; in pmc_arm64_initialize()
611 pcd->pcd_num = arm64_npmcs; in pmc_arm64_initialize()
612 pcd->pcd_ri = pmc_mdep->pmd_npmc; in pmc_arm64_initialize()
613 pcd->pcd_width = 64; in pmc_arm64_initialize()
615 pcd->pcd_allocate_pmc = arm64_allocate_pmc; in pmc_arm64_initialize()
616 pcd->pcd_config_pmc = arm64_config_pmc; in pmc_arm64_initialize()
617 pcd->pcd_pcpu_fini = arm64_pcpu_fini; in pmc_arm64_initialize()
618 pcd->pcd_pcpu_init = arm64_pcpu_init; in pmc_arm64_initialize()
619 pcd->pcd_describe = arm64_describe; in pmc_arm64_initialize()
620 pcd->pcd_get_config = arm64_get_config; in pmc_arm64_initialize()
621 pcd->pcd_read_pmc = arm64_read_pmc; in pmc_arm64_initialize()
622 pcd->pcd_release_pmc = arm64_release_pmc; in pmc_arm64_initialize()
623 pcd->pcd_start_pmc = arm64_start_pmc; in pmc_arm64_initialize()
624 pcd->pcd_stop_pmc = arm64_stop_pmc; in pmc_arm64_initialize()
625 pcd->pcd_write_pmc = arm64_write_pmc; in pmc_arm64_initialize()
627 pmc_mdep->pmd_intr = arm64_intr; in pmc_arm64_initialize()
628 pmc_mdep->pmd_npmc += arm64_npmcs; in pmc_arm64_initialize()
645 PMCDBG0(MDP, INI, 1, "arm64-finalize"); in pmc_arm64_finalize()
649 ("[arm64,%d] non-null pcpu cpu %d", __LINE__, i)); in pmc_arm64_finalize()