Lines Matching +full:0 +full:xf000000
63 int hpt_dbg_level = 0;
99 __DRIVER_MODULE(PROC_DIR_NAME, pci, hpt_pci_driver, 0, 0);
150 UCHAR DPC_Request_Nums = 0;
152 static int DpcQueue_First=0;
153 static int DpcQueue_Last = 0;
181 pVDev->u.disk.df_on_line = 0;
182 pVDev->vf_online = 0;
240 * Return: 0 on success, otherwise on failure
267 KdPrint(("requestQueue addr is 0x%llX", (HPT_U64)(ULONG_PTR)req_dma_addr));
270 if (req_dma_addr & 0x3ff)
278 pMvSataChannel->requestQueuePciHiAddress = 0;
279 KdPrint(("RR18xx[%d,%d]: request queue allocated: 0x%p",
287 if (rsp_dma_addr & 0xff)
295 pMvSataChannel->responseQueuePciHiAddress = 0;
296 KdPrint(("RR18xx[%d,%d]: response queue allocated: 0x%p",
301 return 0;
313 * Returns: =0 ->success, < 0 ->failure.
322 if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x200))
332 if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x100))
342 if ((iden[IDEN_VALID] & 2) == 0)
347 KdPrint(("%25s - 0x%02x\n", "PIO modes supported",
348 iden[IDEN_PIO_MODE_SPPORTED] & 0xff));
351 if ((iden[IDEN_VALID] & 4) == 0)
358 if ((iden[IDEN_SUPPORTED_COMMANDS2] & 0x400))
368 return 0;
378 pMvSataChannel->outstandingCommands = 0;
402 if (pAdapter->mvChannel[channel].maxUltraDmaModeSupported!=0xFF) {
433 for(iMember = 0; iMember < pVDev->pParent->u.array.bArnMember; iMember++)
445 pAdapter->beeping = 0;
513 MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO, 0,
514 0, 0, 0) == MV_FALSE)
523 if (pMvSataChannel->identifyDevice[82] & 0x20)
525 if (!(pMvSataChannel->identifyDevice[85] & 0x20)) /* if not enabled by default */
528 MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0,
529 0, 0, 0) == MV_FALSE)
546 if (pMvSataChannel->identifyDevice[85] & 0x20)
551 MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0,
552 0, 0, 0) == MV_FALSE)
569 MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) ==
596 pioMode, 0, 0, 0) == MV_FALSE)
604 if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x40)
608 else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x20)
612 else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x10)
626 pMvSataAdapter->adapterId, udmaMode & 0xf));
631 0, 0, 0) == MV_FALSE)
637 if (pChannelInfo->maxUltraDmaModeSupported == 0xFF)
645 0, 0, 0) == MV_FALSE)
653 0x11c, /* command reg */
672 if (pMvSataChannel->identifyDevice[82] & 0x40)
674 if (!(pMvSataChannel->identifyDevice[85] & 0x40)) /* if not enabled by default */
677 MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0,
678 0, 0) == MV_FALSE)
695 if (pMvSataChannel->identifyDevice[86] & 0x20)
700 MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0,
701 0, 0) == MV_FALSE)
719 MV_EDMA_MODE_NOT_QUEUED, 0) == MV_FALSE)
737 set_fail_led(pMvSataAdapter, channelNum, 0);
739 return 0;
751 for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; channelIndex++)
787 if (flag == 0)
803 if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
825 #define EVENT_DISCONNECT 0
830 hptmv_handle_event (data, 0);
896 M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
922 M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
948 return 0;
987 for(i=0;i<MV_SATA_CHANNELS_NUM;i++) {
991 if (pLogical->vf_online==0) {
992 pPhysical->vf_bootmark = pLogical->vf_bootmark = 0;
1001 j=0;
1007 if (j>0 && pLogical->vf_bootmark) {
1008 if (pVBus->pVDevice[0]->vf_bootmark) {
1013 pVBus->pVDevice[0] = pLogical;
1030 for(i=0;i<MV_SATA_CHANNELS_NUM;i++)
1082 mvMode, 0, 0, 0) == MV_FALSE)
1099 int ret = 0;
1108 (pSataChannel->identifyDevice[IDEN_SUPPORTED_COMMANDS2] & (0x2))) {
1109 UCHAR depth = ((pSataChannel->identifyDevice[IDEN_QUEUE_DEPTH]) & 0x1f) + 1;
1119 mvSataConfigEdmaMode(pSataAdapter, channelIndex, MV_EDMA_MODE_NOT_QUEUED, 0);
1131 return 0;
1142 int ret = 0;
1149 if ((pSataChannel->identifyDevice[82] & (0x20))) {
1152 MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0, 0, 0, 0))
1160 MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0, 0, 0, 0))
1181 int ret = 0;
1188 if ((pSataChannel->identifyDevice[82] & (0x40))) {
1191 MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0, 0, 0))
1199 MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0, 0, 0))
1245 static int num_adapters = 0;
1256 callout_init_mtx(&pAdapter->event_timer_connect, &pAdapter->lock, 0);
1257 callout_init_mtx(&pAdapter->event_timer_disconnect, &pAdapter->lock, 0);
1260 pAdapter->next = 0;
1272 pAdapter->outstandingCommands = 0;
1286 0x10000, /* maxsegsize */
1303 rid = 0x10;
1315 KdPrint(("RR18xx: io base address 0x%p\n", pMvSataAdapter->adapterIoBaseAddress));
1324 pMvSataAdapter->intCoalThre[0]= 1;
1326 pMvSataAdapter->intTimeThre[0] = 1;
1328 pMvSataAdapter->pciCommand = 0x0107E371;
1329 pMvSataAdapter->pciSerrMask = 0xd77fe6ul;
1330 pMvSataAdapter->pciInterruptMask = 0xd77fe6ul;
1345 set_fail_leds(pMvSataAdapter, 0);
1350 _vbus_(pFreeCommands) = 0;
1359 for (i=0; i<MAX_COMMAND_BLOCKS_FOR_EACH_VBUS; i++) {
1371 memset((void *)pAdapter->pbus_dmamap, 0, sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM);
1372 pAdapter->pbus_dmamap_list = 0;
1373 for (i=0; i < MAX_QUEUE_COMM; i++) {
1378 if(bus_dmamap_create(pAdapter->io_dma_parent, 0, &pmap->dma_map)) {
1384 callout_init_mtx(&pmap->timeout, &pAdapter->lock, 0);
1388 pAdapter->pFreePRDLink = 0;
1391 (PRD_ENTRIES_SIZE*PRD_TABLES_FOR_VBUS + 32), M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
1398 pAdapter->prdTableAlignedAddr = (PUCHAR)(((ULONG_PTR)pAdapter->prdTableAddr + 0x1f) & ~(ULONG_PTR)0x1fL);
1401 for (i=0; i<PRD_TABLES_FOR_VBUS; i++)
1412 for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++)
1421 if (hptmv_init_channel(pAdapter, channel) == 0)
1450 for(i = MAX_ARRAY_DEVICE - 1; i >= 0; i--) {
1457 for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) {
1470 for (channel=0;channel<MV_SATA_CHANNELS_NUM;channel++) {
1483 return 0;
1526 0, /* count */
1527 0, /*features*/
1529 0,
1530 0, /* lbaLow */
1531 0, /* lbaMid */
1533 0,
1534 0, /* device */
1536 0x10))
1542 MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) == MV_FALSE) ||
1545 pAdapter->mvChannel[channel].maxPioModeSupported, 0, 0, 0) == MV_FALSE) ||
1548 pAdapter->mvChannel[channel].maxUltraDmaModeSupported, 0, 0, 0) == MV_FALSE) )
1562 return 0;
1570 for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
1574 return 0;
1580 ULONG ticks = 0;
1587 cont = 0;
1593 for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
1606 ticks = 0;
1704 MV_SATA_EDMA_PRD_ENTRY *pPRDTable = 0;
1719 int i=0;
1747 * to access sector 0xfffffff.
1761 pUdmaParams->highLBAAddress = 0;
1762 pUdmaParams->prdHighAddr = 0;
1772 do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1775 if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 0)) {
1780 if (pCmd->pSgTable && pCmd->cf_physical_sg==0) {
1782 do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1792 ULONG size = tmpSg->wSgSize? tmpSg->wSgSize : 0x10000;
1794 if (size & 0x1ff) {
1803 0, /* features N/A */
1805 (MV_U16)( (is48bit? (MV_U16)((Lba >> 16) & 0xFF00) : 0 ) | (UCHAR)(Lba & 0xFF) ), /*lbalow*/
1806 (MV_U16)((Lba >> 8) & 0xFF), /* lbaMid */
1807 (MV_U16)((Lba >> 16) & 0xFF),/* lbaHigh */
1808 (MV_U8)(0x40 | (is48bit ? 0 : (UCHAR)(Lba >> 24) & 0xFF )),/* device */
1816 if(Lba & 0xF0000000) is48bit = MV_TRUE;
1818 while ((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
1832 HPT_ASSERT(0);
1837 pPRDTable[i].highBaseAddr = (sizeof(tmpSg->dSgAddress)>4 ? (MV_U32)(tmpSg->dSgAddress>>32) : 0);
1841 pPRDTable[i].reserved = 0;
1843 }while((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
1847 pUdmaParams->numOfSectors = 0;
1861 "LBA[31:0](0x%08x)\n", pUdmaParams->lowLBAAddress);
1900 pNoUdmaParams->count = 0;
1901 pNoUdmaParams->features = 0;
1908 pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
1909 pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
1911 (MV_U16)(((Lba & 0xff000000) >> 16)| (Lba & 0xff));
1913 pNoUdmaParams->device = 0x40;
1923 pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
1924 pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
1925 pNoUdmaParams->lbaLow = (MV_U16)(Lba & 0xff);
1926 pNoUdmaParams->sectorCount = 0xff & nSector;
1927 pNoUdmaParams->device = (MV_U8)(0x40 |
1928 ((Lba & 0xf000000) >> 24));
1989 rid = 0;
2031 if (xpt_bus_register(hpt_vsim, dev, 0) != CAM_SUCCESS)
2059 if (device_get_unit(dev) == 0) {
2064 return 0;
2144 for (i=0; i<MAX_VDEVICE_PER_VBUS; i++) {
2163 return 0;
2177 for(i = 0; i < MAX_ARRAY_PER_VBUS; i++){
2178 if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
2182 pArray->u.array.rf_auto_rebuild = 0;
2211 if (pAdapter->outstandingCommands == 0)
2213 if(DPC_Request_Nums == 0)
2249 pAdapter->VBus.pVDevice[ccb->ccb_h.target_id]==0) {
2255 if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
2261 memset((void *)pmap->psg, 0, sizeof(pmap->psg));
2304 cpi->target_sprt = 0;
2307 cpi->hba_eng_cnt = 0;
2310 cpi->max_lun = 0;
2396 if (DPC_Request_Nums==0) {
2397 if (p.pAdapter->outstandingCommands == 0) {
2421 for (i=0;i<MAX_ARRAY_PER_VBUS;i++)
2423 if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
2475 for(i = 0; i < MAX_ARRAY_PER_VBUS; i++)
2476 if ((pVDev=ArrayTables(i))->u.array.dArStamp==0)
2511 HPT_ASSERT(0);
2521 * when our driver starts (ticks==0, it's a invalid stamp value)
2524 do { stamp = random(); } while (stamp==0);
2546 if ((pVDev->u.disk.df_removable_drive) || (pIdentify->GeneralConfiguration & 0x80))
2550 for (i = 0; i < 20; i += 2) {
2557 for (i = 0; i < 4; i++) inquiryData->ProductId[12+i] = ' ';
2560 for (i = 0; i < 4; i += 2)
2571 if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2573 memcpy(&inquiryData->ProductId, "RAID 1/0 Array ", 16);
2575 memcpy(&inquiryData->ProductId, "RAID 0 Array ", 16);
2578 if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2580 memcpy(&inquiryData->ProductId, "RAID 0/1 Array ", 16);
2628 if (nsegs != 0) {
2629 for (idx = 0; idx < nsegs; idx++, psg++) {
2632 psg->wSgFlag = (idx == nsegs-1)? SG_FLAG_EOT: 0;
2665 *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[0],
2672 if (pVDev == NULL || pVDev->vf_online == 0) {
2678 switch(ccb->csio.cdb_io.cdb_bytes[0])
2698 if (pVDev->VDeviceCapacity > 0xfffffffful) {
2699 cap = 0xfffffffful;
2704 rbuf[0] = (UCHAR)(cap>>24);
2709 rbuf[4] = 0;
2710 rbuf[5] = 0;
2712 rbuf[7] = 0;
2718 case 0x9e: /*SERVICE_ACTION_IN*/
2723 rbuf[0] = (UCHAR)(cap>>56);
2731 rbuf[8] = 0;
2732 rbuf[9] = 0;
2734 rbuf[11] = 0;
2744 case 0x88: /* READ_16 */
2745 case 0x8a: /* WRITE_16 */
2746 case 0x13:
2747 case 0x2f:
2757 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0)
2759 if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0)
2781 switch (Cdb[0])
2785 case 0x13:
2790 case 0x88: /* READ_16 */
2791 case 0x8a: /* WRITE_16 */
2810 switch (Cdb[0])
2814 case 0x88: /* READ_16 */
2821 case 0x8a: /* WRITE_16 */
2825 case 0x13:
2826 case 0x2f:
2845 if (pAdapter->outstandingCommands == 0)
2930 return 0;
2941 return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
2947 return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
2966 for (i = 0; i < nBytes / 4; i++) *p0++ = *p1++ ^ *p2++;
2973 for (i = 0; i < nBytes / 4; i++) *p0++ ^= *p2++;