Lines Matching +full:0 +full:x4001
29 #define HDMI_DESIGN_ID 0x0000
30 #define HDMI_REVISION_ID 0x0001
31 #define HDMI_PRODUCT_ID0 0x0002
32 #define HDMI_PRODUCT_ID1 0x0003
35 #define HDMI_IH_FC_STAT0 0x0100
36 #define HDMI_IH_FC_STAT1 0x0101
37 #define HDMI_IH_FC_STAT2 0x0102
38 #define HDMI_IH_AS_STAT0 0x0103
39 #define HDMI_IH_PHY_STAT0 0x0104
40 #define HDMI_IH_PHY_STAT0_HPD (1 << 0)
41 #define HDMI_IH_I2CM_STAT0 0x0105
42 #define HDMI_IH_CEC_STAT0 0x0106
43 #define HDMI_IH_VP_STAT0 0x0107
44 #define HDMI_IH_I2CMPHY_STAT0 0x0108
46 #define HDMI_IH_I2CMPHY_STAT0_ERROR (1 << 0)
47 #define HDMI_IH_AHBDMAAUD_STAT0 0x0109
49 #define HDMI_IH_MUTE_FC_STAT0 0x0180
50 #define HDMI_IH_MUTE_FC_STAT1 0x0181
51 #define HDMI_IH_MUTE_FC_STAT2 0x0182
52 #define HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK (0x3)
53 #define HDMI_IH_MUTE_AS_STAT0 0x0183
54 #define HDMI_IH_MUTE_PHY_STAT0 0x0184
55 #define HDMI_IH_MUTE_I2CM_STAT0 0x0185
56 #define HDMI_IH_MUTE_CEC_STAT0 0x0186
57 #define HDMI_IH_MUTE_VP_STAT0 0x0187
58 #define HDMI_IH_MUTE_I2CMPHY_STAT0 0x0188
59 #define HDMI_IH_MUTE_AHBDMAAUD_STAT0 0x0189
60 #define HDMI_IH_MUTE 0x01FF
62 #define HDMI_IH_MUTE_MUTE_ALL_INTERRUPT (1<<0)
65 #define HDMI_TX_INVID0 0x0200
66 #define HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK 0x80
67 #define HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE 0x80
68 #define HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE 0x00
69 #define HDMI_TX_INVID0_VIDEO_MAPPING_MASK 0x1F
70 #define HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET 0
71 #define HDMI_TX_INSTUFFING 0x0201
72 #define HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK 0x4
73 #define HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE 0x4
74 #define HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE 0x0
75 #define HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK 0x2
76 #define HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE 0x2
77 #define HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE 0x0
78 #define HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK 0x1
79 #define HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE 0x1
80 #define HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE 0x0
81 #define HDMI_TX_GYDATA0 0x0202
82 #define HDMI_TX_GYDATA1 0x0203
83 #define HDMI_TX_RCRDATA0 0x0204
84 #define HDMI_TX_RCRDATA1 0x0205
85 #define HDMI_TX_BCBDATA0 0x0206
86 #define HDMI_TX_BCBDATA1 0x0207
89 #define HDMI_VP_STATUS 0x0800
90 #define HDMI_VP_PR_CD 0x0801
91 #define HDMI_VP_PR_CD_COLOR_DEPTH_MASK 0xF0
93 #define HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK 0x0F
94 #define HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET 0
96 #define HDMI_VP_STUFF 0x0802
97 #define HDMI_VP_STUFF_IDEFAULT_PHASE_MASK 0x20
99 #define HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK 0x10
101 #define HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK 0x8
103 #define HDMI_VP_STUFF_YCC422_STUFFING_MASK 0x4
104 #define HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE 0x4
105 #define HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE 0x0
106 #define HDMI_VP_STUFF_PP_STUFFING_MASK 0x2
107 #define HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE 0x2
108 #define HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE 0x0
109 #define HDMI_VP_STUFF_PR_STUFFING_MASK 0x1
110 #define HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE 0x1
111 #define HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE 0x0
112 #define HDMI_VP_REMAP 0x0803
113 #define HDMI_VP_REMAP_MASK 0x3
114 #define HDMI_VP_REMAP_YCC422_24BIT 0x2
115 #define HDMI_VP_REMAP_YCC422_20BIT 0x1
116 #define HDMI_VP_REMAP_YCC422_16BIT 0x0
117 #define HDMI_VP_CONF 0x0804
118 #define HDMI_VP_CONF_BYPASS_EN_MASK 0x40
119 #define HDMI_VP_CONF_BYPASS_EN_ENABLE 0x40
120 #define HDMI_VP_CONF_BYPASS_EN_DISABLE 0x00
121 #define HDMI_VP_CONF_PP_EN_ENMASK 0x20
122 #define HDMI_VP_CONF_PP_EN_ENABLE 0x20
123 #define HDMI_VP_CONF_PP_EN_DISABLE 0x00
124 #define HDMI_VP_CONF_PR_EN_MASK 0x10
125 #define HDMI_VP_CONF_PR_EN_ENABLE 0x10
126 #define HDMI_VP_CONF_PR_EN_DISABLE 0x00
127 #define HDMI_VP_CONF_YCC422_EN_MASK 0x8
128 #define HDMI_VP_CONF_YCC422_EN_ENABLE 0x8
129 #define HDMI_VP_CONF_YCC422_EN_DISABLE 0x0
130 #define HDMI_VP_CONF_BYPASS_SELECT_MASK 0x4
131 #define HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER 0x4
132 #define HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER 0x0
133 #define HDMI_VP_CONF_OUTPUT_SELECTOR_MASK 0x3
134 #define HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS 0x3
135 #define HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422 0x1
136 #define HDMI_VP_CONF_OUTPUT_SELECTOR_PP 0x0
137 #define HDMI_VP_STAT 0x0805
138 #define HDMI_VP_INT 0x0806
139 #define HDMI_VP_MASK 0x0807
140 #define HDMI_VP_POL 0x0808
143 #define HDMI_FC_INVIDCONF 0x1000
144 #define HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH 0x40
145 #define HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW 0x00
146 #define HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH 0x20
147 #define HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW 0x00
148 #define HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH 0x10
149 #define HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW 0x00
150 #define HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE 0x8
151 #define HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE 0x0
152 #define HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH 0x2
153 #define HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW 0x0
154 #define HDMI_FC_INVIDCONF_IN_I_P_INTERLACED 0x1
155 #define HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE 0x0
156 #define HDMI_FC_INHACTV0 0x1001
157 #define HDMI_FC_INHACTV1 0x1002
158 #define HDMI_FC_INHBLANK0 0x1003
159 #define HDMI_FC_INHBLANK1 0x1004
160 #define HDMI_FC_INVACTV0 0x1005
161 #define HDMI_FC_INVACTV1 0x1006
162 #define HDMI_FC_INVBLANK 0x1007
163 #define HDMI_FC_HSYNCINDELAY0 0x1008
164 #define HDMI_FC_HSYNCINDELAY1 0x1009
165 #define HDMI_FC_HSYNCINWIDTH0 0x100A
166 #define HDMI_FC_HSYNCINWIDTH1 0x100B
167 #define HDMI_FC_VSYNCINDELAY 0x100C
168 #define HDMI_FC_VSYNCINWIDTH 0x100D
169 #define HDMI_FC_INFREQ0 0x100E
170 #define HDMI_FC_INFREQ1 0x100F
171 #define HDMI_FC_INFREQ2 0x1010
172 #define HDMI_FC_CTRLDUR 0x1011
173 #define HDMI_FC_EXCTRLDUR 0x1012
174 #define HDMI_FC_EXCTRLSPAC 0x1013
175 #define HDMI_FC_CH0PREAM 0x1014
176 #define HDMI_FC_CH1PREAM 0x1015
177 #define HDMI_FC_CH2PREAM 0x1016
178 #define HDMI_FC_AVICONF3 0x1017
179 #define HDMI_FC_GCP 0x1018
180 #define HDMI_FC_AVICONF0 0x1019
181 #define HDMI_FC_AVICONF1 0x101A
182 #define HDMI_FC_AVICONF2 0x101B
183 #define HDMI_FC_AVIVID 0x101C
184 #define HDMI_FC_AVIETB0 0x101D
185 #define HDMI_FC_AVIETB1 0x101E
186 #define HDMI_FC_AVISBB0 0x101F
187 #define HDMI_FC_AVISBB1 0x1020
188 #define HDMI_FC_AVIELB0 0x1021
189 #define HDMI_FC_AVIELB1 0x1022
190 #define HDMI_FC_AVISRB0 0x1023
191 #define HDMI_FC_AVISRB1 0x1024
192 #define HDMI_FC_AUDICONF0 0x1025
193 #define HDMI_FC_AUDICONF1 0x1026
194 #define HDMI_FC_AUDICONF2 0x1027
195 #define HDMI_FC_AUDICONF3 0x1028
196 #define HDMI_FC_VSDIEEEID0 0x1029
197 #define HDMI_FC_VSDSIZE 0x102A
198 #define HDMI_FC_VSDIEEEID1 0x1030
199 #define HDMI_FC_VSDIEEEID2 0x1031
200 #define HDMI_FC_VSDPAYLOAD0 0x1032
201 #define HDMI_FC_VSDPAYLOAD1 0x1033
202 #define HDMI_FC_VSDPAYLOAD2 0x1034
203 #define HDMI_FC_VSDPAYLOAD3 0x1035
204 #define HDMI_FC_VSDPAYLOAD4 0x1036
205 #define HDMI_FC_VSDPAYLOAD5 0x1037
206 #define HDMI_FC_VSDPAYLOAD6 0x1038
207 #define HDMI_FC_VSDPAYLOAD7 0x1039
208 #define HDMI_FC_VSDPAYLOAD8 0x103A
209 #define HDMI_FC_VSDPAYLOAD9 0x103B
210 #define HDMI_FC_VSDPAYLOAD10 0x103C
211 #define HDMI_FC_VSDPAYLOAD11 0x103D
212 #define HDMI_FC_VSDPAYLOAD12 0x103E
213 #define HDMI_FC_VSDPAYLOAD13 0x103F
214 #define HDMI_FC_VSDPAYLOAD14 0x1040
215 #define HDMI_FC_VSDPAYLOAD15 0x1041
216 #define HDMI_FC_VSDPAYLOAD16 0x1042
217 #define HDMI_FC_VSDPAYLOAD17 0x1043
218 #define HDMI_FC_VSDPAYLOAD18 0x1044
219 #define HDMI_FC_VSDPAYLOAD19 0x1045
220 #define HDMI_FC_VSDPAYLOAD20 0x1046
221 #define HDMI_FC_VSDPAYLOAD21 0x1047
222 #define HDMI_FC_VSDPAYLOAD22 0x1048
223 #define HDMI_FC_VSDPAYLOAD23 0x1049
224 #define HDMI_FC_SPDVENDORNAME0 0x104A
225 #define HDMI_FC_SPDVENDORNAME1 0x104B
226 #define HDMI_FC_SPDVENDORNAME2 0x104C
227 #define HDMI_FC_SPDVENDORNAME3 0x104D
228 #define HDMI_FC_SPDVENDORNAME4 0x104E
229 #define HDMI_FC_SPDVENDORNAME5 0x104F
230 #define HDMI_FC_SPDVENDORNAME6 0x1050
231 #define HDMI_FC_SPDVENDORNAME7 0x1051
232 #define HDMI_FC_SDPPRODUCTNAME0 0x1052
233 #define HDMI_FC_SDPPRODUCTNAME1 0x1053
234 #define HDMI_FC_SDPPRODUCTNAME2 0x1054
235 #define HDMI_FC_SDPPRODUCTNAME3 0x1055
236 #define HDMI_FC_SDPPRODUCTNAME4 0x1056
237 #define HDMI_FC_SDPPRODUCTNAME5 0x1057
238 #define HDMI_FC_SDPPRODUCTNAME6 0x1058
239 #define HDMI_FC_SDPPRODUCTNAME7 0x1059
240 #define HDMI_FC_SDPPRODUCTNAME8 0x105A
241 #define HDMI_FC_SDPPRODUCTNAME9 0x105B
242 #define HDMI_FC_SDPPRODUCTNAME10 0x105C
243 #define HDMI_FC_SDPPRODUCTNAME11 0x105D
244 #define HDMI_FC_SDPPRODUCTNAME12 0x105E
245 #define HDMI_FC_SDPPRODUCTNAME13 0x105F
246 #define HDMI_FC_SDPPRODUCTNAME14 0x1060
247 #define HDMI_FC_SPDPRODUCTNAME15 0x1061
248 #define HDMI_FC_SPDDEVICEINF 0x1062
249 #define HDMI_FC_AUDSCONF 0x1063
250 #define HDMI_FC_AUDSSTAT 0x1064
251 #define HDMI_FC_AUDSV 0x1065
252 #define HDMI_FC_DATACH0FILL 0x1070
253 #define HDMI_FC_DATACH1FILL 0x1071
254 #define HDMI_FC_DATACH2FILL 0x1072
255 #define HDMI_FC_CTRLQHIGH 0x1073
256 #define HDMI_FC_CTRLQLOW 0x1074
257 #define HDMI_FC_ACP0 0x1075
258 #define HDMI_FC_ACP28 0x1076
259 #define HDMI_FC_ACP27 0x1077
260 #define HDMI_FC_ACP26 0x1078
261 #define HDMI_FC_ACP25 0x1079
262 #define HDMI_FC_ACP24 0x107A
263 #define HDMI_FC_ACP23 0x107B
264 #define HDMI_FC_ACP22 0x107C
265 #define HDMI_FC_ACP21 0x107D
266 #define HDMI_FC_ACP20 0x107E
267 #define HDMI_FC_ACP19 0x107F
268 #define HDMI_FC_ACP18 0x1080
269 #define HDMI_FC_ACP17 0x1081
270 #define HDMI_FC_ACP16 0x1082
271 #define HDMI_FC_ACP15 0x1083
272 #define HDMI_FC_ACP14 0x1084
273 #define HDMI_FC_ACP13 0x1085
274 #define HDMI_FC_ACP12 0x1086
275 #define HDMI_FC_ACP11 0x1087
276 #define HDMI_FC_ACP10 0x1088
277 #define HDMI_FC_ACP9 0x1089
278 #define HDMI_FC_ACP8 0x108A
279 #define HDMI_FC_ACP7 0x108B
280 #define HDMI_FC_ACP6 0x108C
281 #define HDMI_FC_ACP5 0x108D
282 #define HDMI_FC_ACP4 0x108E
283 #define HDMI_FC_ACP3 0x108F
284 #define HDMI_FC_ACP2 0x1090
285 #define HDMI_FC_ACP1 0x1091
286 #define HDMI_FC_ISCR1_0 0x1092
287 #define HDMI_FC_ISCR1_16 0x1093
288 #define HDMI_FC_ISCR1_15 0x1094
289 #define HDMI_FC_ISCR1_14 0x1095
290 #define HDMI_FC_ISCR1_13 0x1096
291 #define HDMI_FC_ISCR1_12 0x1097
292 #define HDMI_FC_ISCR1_11 0x1098
293 #define HDMI_FC_ISCR1_10 0x1099
294 #define HDMI_FC_ISCR1_9 0x109A
295 #define HDMI_FC_ISCR1_8 0x109B
296 #define HDMI_FC_ISCR1_7 0x109C
297 #define HDMI_FC_ISCR1_6 0x109D
298 #define HDMI_FC_ISCR1_5 0x109E
299 #define HDMI_FC_ISCR1_4 0x109F
300 #define HDMI_FC_ISCR1_3 0x10A0
301 #define HDMI_FC_ISCR1_2 0x10A1
302 #define HDMI_FC_ISCR1_1 0x10A2
303 #define HDMI_FC_ISCR2_15 0x10A3
304 #define HDMI_FC_ISCR2_14 0x10A4
305 #define HDMI_FC_ISCR2_13 0x10A5
306 #define HDMI_FC_ISCR2_12 0x10A6
307 #define HDMI_FC_ISCR2_11 0x10A7
308 #define HDMI_FC_ISCR2_10 0x10A8
309 #define HDMI_FC_ISCR2_9 0x10A9
310 #define HDMI_FC_ISCR2_8 0x10AA
311 #define HDMI_FC_ISCR2_7 0x10AB
312 #define HDMI_FC_ISCR2_6 0x10AC
313 #define HDMI_FC_ISCR2_5 0x10AD
314 #define HDMI_FC_ISCR2_4 0x10AE
315 #define HDMI_FC_ISCR2_3 0x10AF
316 #define HDMI_FC_ISCR2_2 0x10B0
317 #define HDMI_FC_ISCR2_1 0x10B1
318 #define HDMI_FC_ISCR2_0 0x10B2
319 #define HDMI_FC_DATAUTO0 0x10B3
320 #define HDMI_FC_DATAUTO1 0x10B4
321 #define HDMI_FC_DATAUTO2 0x10B5
322 #define HDMI_FC_DATMAN 0x10B6
323 #define HDMI_FC_DATAUTO3 0x10B7
324 #define HDMI_FC_RDRB0 0x10B8
325 #define HDMI_FC_RDRB1 0x10B9
326 #define HDMI_FC_RDRB2 0x10BA
327 #define HDMI_FC_RDRB3 0x10BB
328 #define HDMI_FC_RDRB4 0x10BC
329 #define HDMI_FC_RDRB5 0x10BD
330 #define HDMI_FC_RDRB6 0x10BE
331 #define HDMI_FC_RDRB7 0x10BF
332 #define HDMI_FC_STAT0 0x10D0
333 #define HDMI_FC_INT0 0x10D1
334 #define HDMI_FC_MASK0 0x10D2
335 #define HDMI_FC_POL0 0x10D3
336 #define HDMI_FC_STAT1 0x10D4
337 #define HDMI_FC_INT1 0x10D5
338 #define HDMI_FC_MASK1 0x10D6
339 #define HDMI_FC_POL1 0x10D7
340 #define HDMI_FC_STAT2 0x10D8
341 #define HDMI_FC_INT2 0x10D9
342 #define HDMI_FC_MASK2 0x10DA
344 #define HDMI_FC_MASK2_HIGH_PRI (1 << 0)
345 #define HDMI_FC_POL2 0x10DB
346 #define HDMI_FC_PRCONF 0x10E0
348 #define HDMI_FC_GMD_STAT 0x1100
349 #define HDMI_FC_GMD_EN 0x1101
350 #define HDMI_FC_GMD_UP 0x1102
351 #define HDMI_FC_GMD_CONF 0x1103
352 #define HDMI_FC_GMD_HB 0x1104
353 #define HDMI_FC_GMD_PB0 0x1105
354 #define HDMI_FC_GMD_PB1 0x1106
355 #define HDMI_FC_GMD_PB2 0x1107
356 #define HDMI_FC_GMD_PB3 0x1108
357 #define HDMI_FC_GMD_PB4 0x1109
358 #define HDMI_FC_GMD_PB5 0x110A
359 #define HDMI_FC_GMD_PB6 0x110B
360 #define HDMI_FC_GMD_PB7 0x110C
361 #define HDMI_FC_GMD_PB8 0x110D
362 #define HDMI_FC_GMD_PB9 0x110E
363 #define HDMI_FC_GMD_PB10 0x110F
364 #define HDMI_FC_GMD_PB11 0x1110
365 #define HDMI_FC_GMD_PB12 0x1111
366 #define HDMI_FC_GMD_PB13 0x1112
367 #define HDMI_FC_GMD_PB14 0x1113
368 #define HDMI_FC_GMD_PB15 0x1114
369 #define HDMI_FC_GMD_PB16 0x1115
370 #define HDMI_FC_GMD_PB17 0x1116
371 #define HDMI_FC_GMD_PB18 0x1117
372 #define HDMI_FC_GMD_PB19 0x1118
373 #define HDMI_FC_GMD_PB20 0x1119
374 #define HDMI_FC_GMD_PB21 0x111A
375 #define HDMI_FC_GMD_PB22 0x111B
376 #define HDMI_FC_GMD_PB23 0x111C
377 #define HDMI_FC_GMD_PB24 0x111D
378 #define HDMI_FC_GMD_PB25 0x111E
379 #define HDMI_FC_GMD_PB26 0x111F
380 #define HDMI_FC_GMD_PB27 0x1120
382 #define HDMI_FC_DBGFORCE 0x1200
383 #define HDMI_FC_DBGAUD0CH0 0x1201
384 #define HDMI_FC_DBGAUD1CH0 0x1202
385 #define HDMI_FC_DBGAUD2CH0 0x1203
386 #define HDMI_FC_DBGAUD0CH1 0x1204
387 #define HDMI_FC_DBGAUD1CH1 0x1205
388 #define HDMI_FC_DBGAUD2CH1 0x1206
389 #define HDMI_FC_DBGAUD0CH2 0x1207
390 #define HDMI_FC_DBGAUD1CH2 0x1208
391 #define HDMI_FC_DBGAUD2CH2 0x1209
392 #define HDMI_FC_DBGAUD0CH3 0x120A
393 #define HDMI_FC_DBGAUD1CH3 0x120B
394 #define HDMI_FC_DBGAUD2CH3 0x120C
395 #define HDMI_FC_DBGAUD0CH4 0x120D
396 #define HDMI_FC_DBGAUD1CH4 0x120E
397 #define HDMI_FC_DBGAUD2CH4 0x120F
398 #define HDMI_FC_DBGAUD0CH5 0x1210
399 #define HDMI_FC_DBGAUD1CH5 0x1211
400 #define HDMI_FC_DBGAUD2CH5 0x1212
401 #define HDMI_FC_DBGAUD0CH6 0x1213
402 #define HDMI_FC_DBGAUD1CH6 0x1214
403 #define HDMI_FC_DBGAUD2CH6 0x1215
404 #define HDMI_FC_DBGAUD0CH7 0x1216
405 #define HDMI_FC_DBGAUD1CH7 0x1217
406 #define HDMI_FC_DBGAUD2CH7 0x1218
407 #define HDMI_FC_DBGTMDS0 0x1219
408 #define HDMI_FC_DBGTMDS1 0x121A
409 #define HDMI_FC_DBGTMDS2 0x121B
411 #define HDMI_PHY_CONF0 0x3000
412 #define HDMI_PHY_CONF0_PDZ_MASK 0x80
414 #define HDMI_PHY_CONF0_ENTMDS_MASK 0x40
416 #define HDMI_PHY_CONF0_SPARECTRL 0x20
417 #define HDMI_PHY_CONF0_GEN2_PDDQ_MASK 0x10
419 #define HDMI_PHY_CONF0_GEN2_TXPWRON_MASK 0x8
421 #define HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK 0x4
423 #define HDMI_PHY_CONF0_SELDATAENPOL_MASK 0x2
425 #define HDMI_PHY_CONF0_SELDIPIF_MASK 0x1
426 #define HDMI_PHY_CONF0_SELDIPIF_OFFSET 0
427 #define HDMI_PHY_TST0 0x3001
428 #define HDMI_PHY_TST0_TSTCLR_MASK 0x20
430 #define HDMI_PHY_TST0_TSTEN_MASK 0x10
432 #define HDMI_PHY_TST0_TSTCLK_MASK 0x1
433 #define HDMI_PHY_TST0_TSTCLK_OFFSET 0
434 #define HDMI_PHY_TST1 0x3002
435 #define HDMI_PHY_TST2 0x3003
436 #define HDMI_PHY_STAT0 0x3004
437 #define HDMI_PHY_STAT0_RX_SENSE3 0x80
438 #define HDMI_PHY_STAT0_RX_SENSE2 0x40
439 #define HDMI_PHY_STAT0_RX_SENSE1 0x20
440 #define HDMI_PHY_STAT0_RX_SENSE0 0x10
441 #define HDMI_PHY_STAT0_RX_SENSE 0xf0
442 #define HDMI_PHY_STAT0_HPD 0x02
443 #define HDMI_PHY_TX_PHY_LOCK 0x01
444 #define HDMI_PHY_INT0 0x3005
445 #define HDMI_PHY_MASK0 0x3006
446 #define HDMI_PHY_POL0 0x3007
447 #define HDMI_PHY_POL0_HPD 0x02
450 #define HDMI_PHY_I2CM_SLAVE_ADDR 0x3020
451 #define HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 0x69
452 #define HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY 0x49
453 #define HDMI_PHY_I2CM_ADDRESS_ADDR 0x3021
454 #define HDMI_PHY_I2CM_DATAO_1_ADDR 0x3022
455 #define HDMI_PHY_I2CM_DATAO_0_ADDR 0x3023
456 #define HDMI_PHY_I2CM_DATAI_1_ADDR 0x3024
457 #define HDMI_PHY_I2CM_DATAI_0_ADDR 0x3025
458 #define HDMI_PHY_I2CM_OPERATION_ADDR 0x3026
459 #define HDMI_PHY_I2CM_INT_ADDR 0x3027
460 #define HDMI_PHY_I2CM_CTLINT_ADDR 0x3028
461 #define HDMI_PHY_I2CM_DIV_ADDR 0x3029
462 #define HDMI_PHY_I2CM_SOFTRSTZ_ADDR 0x302a
463 #define HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR 0x302b
464 #define HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR 0x302c
465 #define HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR 0x302d
466 #define HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR 0x302e
467 #define HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR 0x302f
468 #define HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR 0x3030
469 #define HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR 0x3031
470 #define HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR 0x3032
473 #define HDMI_AUD_CONF0 0x3100
474 #define HDMI_AUD_CONF0_INTERFACE_MASK 0x20
475 #define HDMI_AUD_CONF0_INTERFACE_IIS 0x20
476 #define HDMI_AUD_CONF0_INTERFACE_SPDIF 0x00
477 #define HDMI_AUD_CONF0_I2SINEN_MASK 0x0f
478 #define HDMI_AUD_CONF0_I2SINEN_CH2 0x01
479 #define HDMI_AUD_CONF0_I2SINEN_CH4 0x03
480 #define HDMI_AUD_CONF0_I2SINEN_CH6 0x07
481 #define HDMI_AUD_CONF0_I2SINEN_CH8 0x0f
482 #define HDMI_AUD_CONF1 0x3101
483 #define HDMI_AUD_CONF1_DATAMODE_MASK 0xe0
484 #define HDMI_AUD_CONF1_DATAMODE_IIS 0x00
485 #define HDMI_AUD_CONF1_DATAMODE_RIGHT_J 0x20
486 #define HDMI_AUD_CONF1_DATAMODE_LEFT_J 0x40
487 #define HDMI_AUD_CONF1_DATAMODE_BURST_1 0x60
488 #define HDMI_AUD_CONF1_DATAMDOE_BURST_2 0x80
489 #define HDMI_AUD_CONF1_DATWIDTH_MASK 0x1f
492 #define HDMI_AUD_INT 0x3102
493 #define HDMI_AUD_CONF2 0x3103
494 #define HDMI_AUD_N1 0x3200
495 #define HDMI_AUD_N2 0x3201
496 #define HDMI_AUD_N3 0x3202
497 #define HDMI_AUD_CTS1 0x3203
498 #define HDMI_AUD_CTS2 0x3204
499 #define HDMI_AUD_CTS3 0x3205
500 #define HDMI_AUD_CTS3_N_SHIFT_MASK 0xe0
501 #define HDMI_AUD_CTS3_CTS_MANUAL 0x10
502 #define HDMI_AUD_INPUTCLKFS 0x3206
503 #define HDMI_AUD_INPUTCLKFS_128 0
508 #define HDMI_AUD_SPDIFINT 0x3302
509 #define HDMI_AUD_CONF0_HBR 0x3400
510 #define HDMI_AUD_HBR_STATUS 0x3401
511 #define HDMI_AUD_HBR_INT 0x3402
512 #define HDMI_AUD_HBR_POL 0x3403
513 #define HDMI_AUD_HBR_MASK 0x3404
519 #define HDMI_GP_CONF0 0x3500
520 #define HDMI_GP_CONF1 0x3501
521 #define HDMI_GP_CONF2 0x3502
522 #define HDMI_GP_STAT 0x3503
523 #define HDMI_GP_INT 0x3504
524 #define HDMI_GP_MASK 0x3505
525 #define HDMI_GP_POL 0x3506
528 #define HDMI_MC_SFRDIV 0x4000
529 #define HDMI_MC_CLKDIS 0x4001
536 #define HDMI_MC_CLKDIS_PIXELCLK_DISABLE (1 << 0)
538 #define HDMI_MC_SWRSTZ 0x4002
539 #define HDMI_MC_SWRSTZ_TMDSSWRST_REQ 0x02
540 #define HDMI_MC_OPCTRL 0x4003
541 #define HDMI_MC_FLOWCTRL 0x4004
542 #define HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK 0x1
543 #define HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH 0x1
544 #define HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS 0x0
545 #define HDMI_MC_PHYRSTZ 0x4005
546 #define HDMI_MC_PHYRSTZ_ASSERT 0x0
547 #define HDMI_MC_PHYRSTZ_DEASSERT 0x1
548 #define HDMI_MC_LOCKONCLOCK 0x4006
549 #define HDMI_MC_HEACPHY_RST 0x4007
550 #define HDMI_MC_HEACPHY_RST_ASSERT 0x1
551 #define HDMI_MC_HEACPHY_RST_DEASSERT 0x0
554 #define HDMI_A_HDCPCFG0 0x5000
555 #define HDMI_A_HDCPCFG0_RXDETECT_MASK 0x4
556 #define HDMI_A_HDCPCFG0_RXDETECT_ENABLE 0x4
557 #define HDMI_A_HDCPCFG0_RXDETECT_DISABLE 0x0
558 #define HDMI_A_HDCPCFG1 0x5001
559 #define HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK 0x2
560 #define HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE 0x2
561 #define HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE 0x0
562 #define HDMI_A_HDCPOBS0 0x5002
563 #define HDMI_A_HDCPOBS1 0x5003
564 #define HDMI_A_HDCPOBS2 0x5004
565 #define HDMI_A_HDCPOBS3 0x5005
566 #define HDMI_A_APIINTCLR 0x5006
567 #define HDMI_A_APIINTSTAT 0x5007
568 #define HDMI_A_APIINTMSK 0x5008
569 #define HDMI_A_VIDPOLCFG 0x5009
570 #define HDMI_A_VIDPOLCFG_DATAENPOL_MASK 0x10
571 #define HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH 0x10
572 #define HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW 0x0
573 #define HDMI_A_OESSWCFG 0x500A
574 #define HDMI_A_TIMER1SETUP0 0x500B
575 #define HDMI_A_TIMER1SETUP1 0x500C
576 #define HDMI_A_TIMER2SETUP0 0x500D
577 #define HDMI_A_TIMER2SETUP1 0x500E
578 #define HDMI_A_100MSCFG 0x500F
579 #define HDMI_A_2SCFG0 0x5010
580 #define HDMI_A_2SCFG1 0x5011
581 #define HDMI_A_5SCFG0 0x5012
582 #define HDMI_A_5SCFG1 0x5013
583 #define HDMI_A_SRMVERLSB 0x5014
584 #define HDMI_A_SRMVERMSB 0x5015
585 #define HDMI_A_SRMCTRL 0x5016
586 #define HDMI_A_SFRSETUP 0x5017
587 #define HDMI_A_I2CHSETUP 0x5018
588 #define HDMI_A_INTSETUP 0x5019
589 #define HDMI_A_PRESETUP 0x501A
590 #define HDMI_A_SRM_BASE 0x5020
593 #define HDMI_CEC_CTRL 0x7D00
594 #define HDMI_CEC_STAT 0x7D01
595 #define HDMI_CEC_MASK 0x7D02
596 #define HDMI_CEC_POLARITY 0x7D03
597 #define HDMI_CEC_INT 0x7D04
598 #define HDMI_CEC_ADDR_L 0x7D05
599 #define HDMI_CEC_ADDR_H 0x7D06
600 #define HDMI_CEC_TX_CNT 0x7D07
601 #define HDMI_CEC_RX_CNT 0x7D08
602 #define HDMI_CEC_TX_DATA0 0x7D10
603 #define HDMI_CEC_TX_DATA1 0x7D11
604 #define HDMI_CEC_TX_DATA2 0x7D12
605 #define HDMI_CEC_TX_DATA3 0x7D13
606 #define HDMI_CEC_TX_DATA4 0x7D14
607 #define HDMI_CEC_TX_DATA5 0x7D15
608 #define HDMI_CEC_TX_DATA6 0x7D16
609 #define HDMI_CEC_TX_DATA7 0x7D17
610 #define HDMI_CEC_TX_DATA8 0x7D18
611 #define HDMI_CEC_TX_DATA9 0x7D19
612 #define HDMI_CEC_TX_DATA10 0x7D1a
613 #define HDMI_CEC_TX_DATA11 0x7D1b
614 #define HDMI_CEC_TX_DATA12 0x7D1c
615 #define HDMI_CEC_TX_DATA13 0x7D1d
616 #define HDMI_CEC_TX_DATA14 0x7D1e
617 #define HDMI_CEC_TX_DATA15 0x7D1f
618 #define HDMI_CEC_RX_DATA0 0x7D20
619 #define HDMI_CEC_RX_DATA1 0x7D21
620 #define HDMI_CEC_RX_DATA2 0x7D22
621 #define HDMI_CEC_RX_DATA3 0x7D23
622 #define HDMI_CEC_RX_DATA4 0x7D24
623 #define HDMI_CEC_RX_DATA5 0x7D25
624 #define HDMI_CEC_RX_DATA6 0x7D26
625 #define HDMI_CEC_RX_DATA7 0x7D27
626 #define HDMI_CEC_RX_DATA8 0x7D28
627 #define HDMI_CEC_RX_DATA9 0x7D29
628 #define HDMI_CEC_RX_DATA10 0x7D2a
629 #define HDMI_CEC_RX_DATA11 0x7D2b
630 #define HDMI_CEC_RX_DATA12 0x7D2c
631 #define HDMI_CEC_RX_DATA13 0x7D2d
632 #define HDMI_CEC_RX_DATA14 0x7D2e
633 #define HDMI_CEC_RX_DATA15 0x7D2f
634 #define HDMI_CEC_LOCK 0x7D30
635 #define HDMI_CEC_WKUPCTRL 0x7D31
638 #define HDMI_I2CM_SLAVE 0x7E00
639 #define HDMI_I2CMESS 0x7E01
640 #define HDMI_I2CM_DATAO 0x7E02
641 #define HDMI_I2CM_DATAI 0x7E03
642 #define HDMI_I2CM_OPERATION 0x7E04
643 #define HDMI_PHY_I2CM_OPERATION_ADDR_WRITE 0x10
644 #define HDMI_PHY_I2CM_OPERATION_ADDR_READ 0x1
645 #define HDMI_I2CM_INT 0x7E05
646 #define HDMI_I2CM_CTLINT 0x7E06
647 #define HDMI_I2CM_DIV 0x7E07
648 #define HDMI_I2CM_SEGADDR 0x7E08
649 #define HDMI_I2CM_SOFTRSTZ 0x7E09
650 #define HDMI_I2CM_SEGPTR 0x7E0A
651 #define HDMI_I2CM_SS_SCL_HCNT_1_ADDR 0x7E0B
652 #define HDMI_I2CM_SS_SCL_HCNT_0_ADDR 0x7E0C
653 #define HDMI_I2CM_SS_SCL_LCNT_1_ADDR 0x7E0D
654 #define HDMI_I2CM_SS_SCL_LCNT_0_ADDR 0x7E0E
655 #define HDMI_I2CM_FS_SCL_HCNT_1_ADDR 0x7E0F
656 #define HDMI_I2CM_FS_SCL_HCNT_0_ADDR 0x7E10
657 #define HDMI_I2CM_FS_SCL_LCNT_1_ADDR 0x7E11
658 #define HDMI_I2CM_FS_SCL_LCNT_0_ADDR 0x7E12
661 #define HDMI_PHY_I2C_CKCALCTRL 0x5
663 #define HDMI_PHY_I2C_CPCE_CTRL 0x6
667 #define CPCE_CTRL_370 ((0 << 7) | (0 << 5))
668 #define HDMI_PHY_I2C_CKSYMTXCTRL 0x9
673 #define CKSYMTXCTRL_TX_CK_SYMON (1 << 0)
674 #define HDMI_PHY_I2C_VLEVCTRL 0x0E
675 #define HDMI_PHY_I2C_CURRCTRL 0x10
676 #define HDMI_PHY_I2C_PLLPHBYCTRL 0x13
679 #define HDMI_PHY_I2C_GMPCTRL 0x15
680 #define GMPCTRL_45_25 0x00
681 #define GMPCTRL_92_50 0x05
682 #define GMPCTRL_185 0x0a
683 #define GMPCTRL_370 0x0f
684 #define HDMI_PHY_I2C_MSM_CTRL 0x17
685 #define MSM_CTRL_FB_CLK (0x3 << 1)
686 #define HDMI_PHY_I2C_TXTERM 0x19
687 #define TXTERM_133 0x5