120 	inv_val = ((sc->sc_mode.flags & VID_PVSYNC) ?  in dwc_hdmi_av_composer()
124 	inv_val |= ((sc->sc_mode.flags & VID_PHSYNC) ?  in dwc_hdmi_av_composer()
130 	inv_val |= ((sc->sc_mode.flags & VID_INTERLACE) ?  in dwc_hdmi_av_composer()
134 	inv_val |= ((sc->sc_mode.flags & VID_INTERLACE) ?  in dwc_hdmi_av_composer()
147 	WR1(sc, HDMI_FC_INHACTV1, sc->sc_mode.hdisplay >> 8);  in dwc_hdmi_av_composer()
148 	WR1(sc, HDMI_FC_INHACTV0, sc->sc_mode.hdisplay);  in dwc_hdmi_av_composer()
151 	WR1(sc, HDMI_FC_INVACTV1, sc->sc_mode.vdisplay >> 8);  in dwc_hdmi_av_composer()
152 	WR1(sc, HDMI_FC_INVACTV0, sc->sc_mode.vdisplay);  in dwc_hdmi_av_composer()
155 	hblank = sc->sc_mode.htotal - sc->sc_mode.hdisplay;  in dwc_hdmi_av_composer()
160 	vblank = sc->sc_mode.vtotal - sc->sc_mode.vdisplay;  in dwc_hdmi_av_composer()
164 	hfp = sc->sc_mode.hsync_start - sc->sc_mode.hdisplay;  in dwc_hdmi_av_composer()
169 	vfp = sc->sc_mode.vsync_start - sc->sc_mode.vdisplay;  in dwc_hdmi_av_composer()
172 	hsync_len = (sc->sc_mode.hsync_end - sc->sc_mode.hsync_start);  in dwc_hdmi_av_composer()
178 	WR1(sc, HDMI_FC_VSYNCINWIDTH, (sc->sc_mode.vsync_end - sc->sc_mode.vsync_start));  in dwc_hdmi_av_composer()
306 	if (sc->sc_mode.dot_clock*1000 <= 45250000) {  in dwc_hdmi_phy_configure()
309 	} else if (sc->sc_mode.dot_clock*1000 <= 92500000) {  in dwc_hdmi_phy_configure()
312 	} else if (sc->sc_mode.dot_clock*1000 <= 185000000) {  in dwc_hdmi_phy_configure()
324 	if (sc->sc_mode.dot_clock*1000 <= 54000000) {  in dwc_hdmi_phy_configure()
326 	} else if (sc->sc_mode.dot_clock*1000 <= 58400000) {  in dwc_hdmi_phy_configure()
328 	} else if (sc->sc_mode.dot_clock*1000 <= 72000000) {  in dwc_hdmi_phy_configure()
330 	} else if (sc->sc_mode.dot_clock*1000 <= 74250000) {  in dwc_hdmi_phy_configure()
332 	} else if (sc->sc_mode.dot_clock*1000 <= 118800000) {  in dwc_hdmi_phy_configure()
334 	} else if (sc->sc_mode.dot_clock*1000 <= 216000000) {  in dwc_hdmi_phy_configure()
348 	if (sc->sc_mode.dot_clock*1000 > 148500000) {  in dwc_hdmi_phy_configure()
445 	switch (sc->sc_mode.dot_clock) {  in dwc_hdmi_configure_audio()
847 	memcpy(&sc->sc_mode, mode, sizeof(*mode));  in dwc_hdmi_set_videomode()