Lines Matching +full:enable +full:- +full:remote +full:- +full:sense

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
40 /* Note: Reading the status reg clears bits 0-6. */
69  * Bits 0-6 auto-clear when read.
78 #define	GEM_INTR_PCS		0x00002000	/* Physical Code Sub-layer */
106 #define	GEM_PCI_BIF_CNF_HOST_64	0x00000002	/* 64-bit host */
107 #define	GEM_PCI_BIF_CNF_B64D_DS	0x00000004	/* no 64-bit data cycle */
116 /* GEM_RESET register bits -- TX and RX self clear when complete. */
147 #define	GEM_TX_CONFIG_TXDMA_EN	0x00000001	/* TX DMA enable */
167 #define	GEM_RX_RING_PTR_LO	0x4004		/* 64-bits unaligned GAK! */
168 #define	GEM_RX_RING_PTR_HI	0x4008		/* 64-bits unaligned GAK! */
193 #define	GEM_RX_CONFIG_RXDMA_EN	0x00000001	/* RX DMA enable */
211 /* GEM_RX_PAUSE_THRESH register bits -- sizes in multiples of 64 bytes */
238 #define	GEM_MAC_SLOT_TIME	0x604c		/* slot time, bits 0-7 */
329 #define	GEM_MAC_XIF_TX_MII_ENA	0x00000001	/* Enable XIF output drivers */
330 #define	GEM_MAC_XIF_MII_LOOPBK	0x00000002	/* Enable MII loopback mode */
333 #define	GEM_MAC_XIF_MII_BUF_ENA	0x00000010	/* Enable MII recv buffers */
349 #define	GEM_MAC_TX_ENABLE	0x00000001	/* TX enable */
350 #define	GEM_MAC_TX_IGN_CARRIER	0x00000002	/* Ignore carrier sense */
352 #define	GEM_MAC_TX_ENA_IPG0	0x00000008	/* extend RX-to-TX IPG */
367 #define	GEM_MAC_RX_ENABLE	0x00000001	/* RX enable */
372 #define	GEM_MAC_RX_HASH_FILTER	0x00000020	/* enable hash filter */
373 #define	GEM_MAC_RX_ADDR_FILTER	0x00000040	/* enable address filter */
398 #define	GEM_MIF_FRAME		0x620c		/* MIF frame - ctl and data */
410 #define	GEM_MIF_FRAME_OP	0x30000000	/* operation - write/read */
421 #define	GEM_MIF_CONFIG_POLL_ENA	0x00000002	/* poll enable */
422 #define	GEM_MIF_CONFIG_BB_ENA	0x00000004	/* bit bang enable */
455 /* GEM_MII_CONTROL bits - PCS "BMCR" (Basic Mode Control Reg) */
458 #define	GEM_MII_CONTROL_FDUPLEX	0x00000100	/* full-duplex, always 0 */
459 #define	GEM_MII_CONTROL_RAN	0x00000200	/* restart auto-negotiation */
462 #define	GEM_MII_CONTROL_AUTONEG	0x00001000	/* auto-negotiation enable */
464 #define	GEM_MII_CONTROL_LOOPBK	0x00004000	/* 10-bit i/f loopback */
470 /* GEM_MII_STATUS reg - PCS "BMSR" (Basic Mode Status Reg) */
474 #define	GEM_MII_STATUS_ACFG	0x00000008	/* can auto-negotiate */
475 #define	GEM_MII_STATUS_REM_FLT	0x00000010	/* remote fault detected */
476 #define	GEM_MII_STATUS_ANEG_CPT	0x00000020	/* auto-negotiate complete */
482 #define	GEM_MII_ANEG_FDUPLX	0x00000020	/* full-duplex */
483 #define	GEM_MII_ANEG_HDUPLX	0x00000040	/* half-duplex */
486 #define	GEM_MII_ANEG_RFLT_FAIL	0x00001000	/* remote fault - fail */
487 #define	GEM_MII_ANEG_RFLT_OFF	0x00002000	/* remote fault - off-line */
497 #define	GEM_MII_CONFIG_ENABLE	0x00000001	/* Enable PCS. */
499 #define	GEM_MII_CONFIG_SDL	0x00000004	/* signal detect active-low */
500 #define	GEM_MII_CONFIG_JS_NORM	0x00000000	/* jitter study - normal op. */
501 #define	GEM_MII_CONFIG_JS_HF	0x00000008	/* jitter study - HF test */
502 #define	GEM_MII_CONFIG_JS_LF	0x00000010	/* jitter study - LF test */
505 #define	GEM_MII_CONFIG_ANTO	0x00000020	/* auto-neg. timer override */
516 #define	GEM_MII_DATAPATH_SERDES	0x00000002	/* SERDES via 10-bit */
523 #define	GEM_MII_SLINK_LOOPBACK	0x00000001	/* enable loopback at SL, logic
525 #define	GEM_MII_SLINK_EN_SYNC_D	0x00000002	/* enable sync detection */
527 #define	GEM_MII_SLINK_EMPHASIS	0x00000018	/* enable emphasis */
528 #define	GEM_MII_SLINK_SELFTEST	0x000001c0	/* self-test */
574 #define	GEM_TD_CXSUM_ENABLE	0x0000000020000000ULL	/* Cxsum generation enable */
583 #define	GEM_RD_OWN		0x0000000080000000ULL	/* 1 - owned by h/w */