Lines Matching +full:micro +full:- +full:frames
1 /*-
2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 1999-2001, Intel Corporation
42 This file contains the loadable micro code arrays to implement receive bundling on the
43 D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
44 D102 B-step with TCO work around, D102 C-step and D102 E-step.
46 Each controller has its own specific micro code array. The array for one controller
48 cause the controller to lock up and stop responding to the driver. Each micro
60 * All CPUSaver parameters are 16-bit literals that are part of a
65 * CPUSAVER_DWORD - This is the location of the instruction that loads
66 * the dead-man timer with its initial value. By writing a 16-bit
70 * range of x200 - x1000.
72 * CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction
73 * that sets the maximum number of frames that will be bundled. In
82 * CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction
83 * that contains a bit-mask describing the minimum size frame that
89 * to provide immediate indication of ACK frames in a TCP environment.
103 * standard Ethernet frames are <= 2047 bytes in length.
109 /* CPUSaver micro code for the D101A */
226 /* CPUSaver micro code for the D101B */
339 /* CPUSaver micro code for the D101M (B-step only) */
344 /* Parameter values for the D101M B-step */
490 /* CPUSaver micro code for the D101S */
641 /* CPUSaver micro code for the D102 B-step */
649 fixes for bugs in the B-step hardware (specifically, bugs
651 Thus, when CPUSaver is disabled, this micro code image will
658 /* Parameter values for the D102 B-step */
806 /* TCO micro code for the D102 B-step */
959 /* Micro code for the D102 C-step */
962 /* Parameter values for the D102 C-step */
1114 /* Micro code for the D102 E-step */
1117 /* Parameter values for the D102 E-step */