Lines Matching +full:interrupt +full:- +full:less

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
58 	(sc->fxp_desc.cbl_addr + (uintptr_t)addr -			\
59 	(uintptr_t)sc->fxp_desc.cbl_list)
62  * Number of completed TX commands at which point an interrupt
64  * Must be at least one less than FXP_NTXCB, and should be
65  * enough less so that the transmitter doesn't becomes idle
71  * TxCB list index mask. This is used to do list wrap-around.
73 #define FXP_TXCB_MASK   (FXP_NTXCB - 1)
88  * multicast filter. This is part of a work-around for a bug in the
94  * Default maximum time, in microseconds, that an interrupt may be delayed
102  * Default number of packets that will be bundled, before an interrupt is
110 #define	FXP_LOCK(_sc)		mtx_lock(&(_sc)->sc_mtx)
111 #define	FXP_UNLOCK(_sc)		mtx_unlock(&(_sc)->sc_mtx)
112 #define	FXP_LOCK_ASSERT(_sc, _what)	mtx_assert(&(_sc)->sc_mtx, (_what))
148 	int16_t		revid;		/* -1 matches anything */
182 	void *ifp;			/* per-interface network data */
185 	void *ih;			/* interrupt handler cookie */
212 	int tunable_int_delay;		/* interrupt delay value for ucode */
213 	int tunable_bundle_max;		/* max # frames per interrupt (ucode) */
240 #define FXP_FLAG_RXBUG		0x8000	/* Rx lock-up bug */
244 #define	CSR_READ_1(sc, reg)		bus_read_1(sc->fxp_res[0], reg)
245 #define	CSR_READ_2(sc, reg)		bus_read_2(sc->fxp_res[0], reg)
246 #define	CSR_READ_4(sc, reg)		bus_read_4(sc->fxp_res[0], reg)
247 #define	CSR_WRITE_1(sc, reg, val)	bus_write_1(sc->fxp_res[0], reg, val)
248 #define	CSR_WRITE_2(sc, reg, val)	bus_write_2(sc->fxp_res[0], reg, val)
249 #define	CSR_WRITE_4(sc, reg, val)	bus_write_4(sc->fxp_res[0], reg, val)