Lines Matching +full:pme +full:- +full:active +full:- +full:high
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
94 * the first thing in the packet is a 14-byte Ethernet header.
97 * alignes the packet after the Ethernet header at a 32-bit
156 * sub-vendor and sub-device field are extensively used to identify
161 { 0x8086, 0x1029, -1, 0, "Intel 82559 PCI/CardBus Pro/100" },
162 { 0x8086, 0x1030, -1, 0, "Intel 82559 Pro/100 Ethernet" },
163 { 0x8086, 0x1031, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" },
164 { 0x8086, 0x1032, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" },
165 { 0x8086, 0x1033, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" },
166 { 0x8086, 0x1034, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" },
167 { 0x8086, 0x1035, -1, 3, "Intel 82801CAM (ICH3) Pro/100 Ethernet" },
168 { 0x8086, 0x1036, -1, 3, "Intel 82801CAM (ICH3) Pro/100 Ethernet" },
169 { 0x8086, 0x1037, -1, 3, "Intel 82801CAM (ICH3) Pro/100 Ethernet" },
170 { 0x8086, 0x1038, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" },
171 { 0x8086, 0x1039, -1, 4, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" },
172 { 0x8086, 0x103A, -1, 4, "Intel 82801DB (ICH4) Pro/100 Ethernet" },
173 { 0x8086, 0x103B, -1, 4, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" },
174 { 0x8086, 0x103C, -1, 4, "Intel 82801DB (ICH4) Pro/100 Ethernet" },
175 { 0x8086, 0x103D, -1, 4, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" },
176 { 0x8086, 0x103E, -1, 4, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" },
177 { 0x8086, 0x1050, -1, 5, "Intel 82801BA (D865) Pro/100 VE Ethernet" },
178 { 0x8086, 0x1051, -1, 5, "Intel 82562ET (ICH5/ICH5R) Pro/100 VE Ethernet" },
179 { 0x8086, 0x1059, -1, 0, "Intel 82551QM Pro/100 M Mobile Connection" },
180 { 0x8086, 0x1064, -1, 6, "Intel 82562EZ (ICH6)" },
181 { 0x8086, 0x1065, -1, 6, "Intel 82562ET/EZ/GT/GZ PRO/100 VE Ethernet" },
182 { 0x8086, 0x1068, -1, 6, "Intel 82801FBM (ICH6-M) Pro/100 VE Ethernet" },
183 { 0x8086, 0x1069, -1, 6, "Intel 82562EM/EX/GX Pro/100 Ethernet" },
184 { 0x8086, 0x1091, -1, 7, "Intel 82562GX Pro/100 Ethernet" },
185 { 0x8086, 0x1092, -1, 7, "Intel Pro/100 VE Network Connection" },
186 { 0x8086, 0x1093, -1, 7, "Intel Pro/100 VM Network Connection" },
187 { 0x8086, 0x1094, -1, 7, "Intel Pro/100 946GZ (ICH7) Network Connection" },
188 { 0x8086, 0x1209, -1, 0, "Intel 82559ER Embedded 10/100 Ethernet" },
203 { 0x8086, 0x1229, -1, 0, "Intel 82557/8/9 Pro/100 Ethernet" },
204 { 0x8086, 0x2449, -1, 2, "Intel 82801BA/CAM (ICH2/3) Pro/100 Ethernet" },
205 { 0x8086, 0x27dc, -1, 7, "Intel 82801GB (ICH7) 10/100 Ethernet" },
206 { 0, 0, -1, 0, NULL },
272 int low, int high);
306 nitems(fxp_ident_table) - 1);
312 { -1, 0 }
318 { -1, 0 }
334 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i) in fxp_scb_wait()
339 device_printf(sc->dev, "SCB timeout: 0x%x 0x%x 0x%x 0x%x\n", in fxp_scb_wait()
350 if (cmd == FXP_SCB_COMMAND_CU_RESUME && sc->cu_resume_bug) { in fxp_scb_cmd()
363 for (i = 10000; i > 0; i--) { in fxp_dma_wait()
371 device_printf(sc->dev, "DMA timeout\n"); in fxp_dma_wait()
385 for (ident = fxp_ident_table; ident->name != NULL; ident++) { in fxp_find_ident()
386 if (ident->vendor == vendor && ident->device == device && in fxp_find_ident()
387 (ident->revid == revid || ident->revid == -1)) { in fxp_find_ident()
404 device_set_desc(dev, ident->name); in fxp_probe()
420 *addr = segs->ds_addr; in fxp_dma_map_addr()
438 sc->dev = dev; in fxp_attach()
439 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, in fxp_attach()
441 callout_init_mtx(&sc->stat_ch, &sc->sc_mtx, 0); in fxp_attach()
442 ifmedia_init(&sc->sc_media, 0, fxp_serial_ifmedia_upd, in fxp_attach()
445 ifp = sc->ifp = if_gethandle(IFT_ETHER); in fxp_attach()
453 * Figure out which we should try first - memory mapping or i/o mapping? in fxp_attach()
461 sc->fxp_spec = fxp_res_spec_io; in fxp_attach()
463 sc->fxp_spec = fxp_res_spec_mem; in fxp_attach()
465 error = bus_alloc_resources(dev, sc->fxp_spec, sc->fxp_res); in fxp_attach()
467 if (sc->fxp_spec == fxp_res_spec_mem) in fxp_attach()
468 sc->fxp_spec = fxp_res_spec_io; in fxp_attach()
470 sc->fxp_spec = fxp_res_spec_mem; in fxp_attach()
471 error = bus_alloc_resources(dev, sc->fxp_spec, sc->fxp_res); in fxp_attach()
481 sc->fxp_spec == fxp_res_spec_mem ? "memory" : "I/O"); in fxp_attach()
503 sc->ident = fxp_find_ident(dev); in fxp_attach()
504 if (sc->ident->ich > 0) { in fxp_attach()
506 sc->revision = FXP_REV_82559_A0; in fxp_attach()
508 data = sc->eeprom[FXP_EEPROM_MAP_CNTR]; in fxp_attach()
510 sc->revision = FXP_REV_82557; in fxp_attach()
512 sc->revision = pci_get_revid(dev); in fxp_attach()
518 if (sc->revision >= FXP_REV_82558_A4 && in fxp_attach()
519 sc->revision != FXP_REV_82559S_A) { in fxp_attach()
520 data = sc->eeprom[FXP_EEPROM_MAP_ID]; in fxp_attach()
522 pci_find_cap(sc->dev, PCIY_PMG, &pmc) == 0) in fxp_attach()
523 sc->flags |= FXP_FLAG_WOLCAP; in fxp_attach()
526 if (sc->revision == FXP_REV_82550_C) { in fxp_attach()
530 * microcode is used for client-only featured 82550C in fxp_attach()
533 data = sc->eeprom[FXP_EEPROM_MAP_COMPAT]; in fxp_attach()
535 sc->flags |= FXP_FLAG_NO_UCODE; in fxp_attach()
538 /* Receiver lock-up workaround detection. */ in fxp_attach()
539 if (sc->revision < FXP_REV_82558_A4) { in fxp_attach()
540 data = sc->eeprom[FXP_EEPROM_MAP_COMPAT]; in fxp_attach()
542 sc->flags |= FXP_FLAG_RXBUG; in fxp_attach()
543 device_printf(dev, "Enabling Rx lock-up workaround\n"); in fxp_attach()
550 data = sc->eeprom[FXP_EEPROM_MAP_PRI_PHY]; in fxp_attach()
551 if (sc->revision == FXP_REV_82557 && (data & FXP_PHY_DEVICE_MASK) != 0 in fxp_attach()
553 sc->flags |= FXP_FLAG_SERIAL_MEDIA; in fxp_attach()
559 * Systems based on the ICH2/ICH2-M chip from Intel, and possibly in fxp_attach()
564 * deasserts CLKRUN#, and always remains in an active state. in fxp_attach()
568 if ((sc->ident->ich >= 2 && sc->ident->ich <= 3) || in fxp_attach()
569 (sc->ident->ich == 0 && sc->revision >= FXP_REV_82559_A0)) { in fxp_attach()
570 data = sc->eeprom[FXP_EEPROM_MAP_ID]; in fxp_attach()
578 sc->eeprom[FXP_EEPROM_MAP_ID] = data; in fxp_attach()
582 for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) in fxp_attach()
583 cksum += sc->eeprom[i]; in fxp_attach()
584 i = (1 << sc->eeprom_size) - 1; in fxp_attach()
585 cksum = 0xBABA - cksum; in fxp_attach()
588 "EEPROM checksum @ 0x%x: 0x%x -> 0x%x\n", in fxp_attach()
589 i, sc->eeprom[i], cksum); in fxp_attach()
590 sc->eeprom[i] = cksum; in fxp_attach()
595 sc->flags |= FXP_FLAG_CU_RESUME_BUG; in fxp_attach()
602 if (sc->revision != FXP_REV_82557) { in fxp_attach()
611 sc->flags |= FXP_FLAG_MWI_ENABLE; in fxp_attach()
614 sc->flags |= FXP_FLAG_EXT_TXCB; in fxp_attach()
617 sc->flags |= FXP_FLAG_LONG_PKT_EN; in fxp_attach()
620 sc->flags |= FXP_FLAG_SAVE_BAD; in fxp_attach()
624 if (sc->revision >= FXP_REV_82559_A0) { in fxp_attach()
626 if (sc->ident->device != 0x1209) in fxp_attach()
627 sc->flags |= FXP_FLAG_82559_RXCSUM; in fxp_attach()
635 if (sc->revision == FXP_REV_82550 || sc->revision == FXP_REV_82550_C || in fxp_attach()
636 sc->revision == FXP_REV_82551_E || sc->revision == FXP_REV_82551_F in fxp_attach()
637 || sc->revision == FXP_REV_82551_10) { in fxp_attach()
638 sc->rfa_size = sizeof (struct fxp_rfa); in fxp_attach()
639 sc->tx_cmd = FXP_CB_COMMAND_IPCBXMIT; in fxp_attach()
640 sc->flags |= FXP_FLAG_EXT_RFA; in fxp_attach()
642 sc->flags &= ~FXP_FLAG_82559_RXCSUM; in fxp_attach()
644 sc->rfa_size = sizeof (struct fxp_rfa) - FXP_RFAX_LEN; in fxp_attach()
645 sc->tx_cmd = FXP_CB_COMMAND_XMIT; in fxp_attach()
651 sc->maxtxseg = FXP_NTXSEG; in fxp_attach()
652 sc->maxsegsize = MCLBYTES; in fxp_attach()
653 if (sc->flags & FXP_FLAG_EXT_RFA) { in fxp_attach()
654 sc->maxtxseg--; in fxp_attach()
655 sc->maxsegsize = FXP_TSO_SEGSIZE; in fxp_attach()
659 sc->maxsegsize * sc->maxtxseg + sizeof(struct ether_vlan_header), in fxp_attach()
660 sc->maxtxseg, sc->maxsegsize, 0, NULL, NULL, &sc->fxp_txmtag); in fxp_attach()
668 MCLBYTES, 1, MCLBYTES, 0, NULL, NULL, &sc->fxp_rxmtag); in fxp_attach()
677 NULL, NULL, &sc->fxp_stag); in fxp_attach()
683 error = bus_dmamem_alloc(sc->fxp_stag, (void **)&sc->fxp_stats, in fxp_attach()
684 BUS_DMA_NOWAIT | BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->fxp_smap); in fxp_attach()
689 error = bus_dmamap_load(sc->fxp_stag, sc->fxp_smap, sc->fxp_stats, in fxp_attach()
690 sizeof(struct fxp_stats), fxp_dma_map_addr, &sc->stats_addr, in fxp_attach()
699 FXP_TXCB_SZ, 1, FXP_TXCB_SZ, 0, NULL, NULL, &sc->cbl_tag); in fxp_attach()
705 error = bus_dmamem_alloc(sc->cbl_tag, (void **)&sc->fxp_desc.cbl_list, in fxp_attach()
706 BUS_DMA_NOWAIT | BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->cbl_map); in fxp_attach()
712 error = bus_dmamap_load(sc->cbl_tag, sc->cbl_map, in fxp_attach()
713 sc->fxp_desc.cbl_list, FXP_TXCB_SZ, fxp_dma_map_addr, in fxp_attach()
714 &sc->fxp_desc.cbl_addr, BUS_DMA_NOWAIT); in fxp_attach()
723 NULL, NULL, &sc->mcs_tag); in fxp_attach()
730 error = bus_dmamem_alloc(sc->mcs_tag, (void **)&sc->mcsp, in fxp_attach()
731 BUS_DMA_NOWAIT | BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->mcs_map); in fxp_attach()
737 error = bus_dmamap_load(sc->mcs_tag, sc->mcs_map, sc->mcsp, in fxp_attach()
738 sizeof(struct fxp_cb_mcs), fxp_dma_map_addr, &sc->mcs_addr, in fxp_attach()
747 * Pre-allocate the TX DMA maps and setup the pointers to in fxp_attach()
750 txp = sc->fxp_desc.tx_list; in fxp_attach()
751 tcbp = sc->fxp_desc.cbl_list; in fxp_attach()
754 error = bus_dmamap_create(sc->fxp_txmtag, 0, &txp[i].tx_map); in fxp_attach()
760 error = bus_dmamap_create(sc->fxp_rxmtag, 0, &sc->spare_map); in fxp_attach()
767 * Pre-allocate our receive buffers. in fxp_attach()
769 sc->fxp_desc.rx_head = sc->fxp_desc.rx_tail = NULL; in fxp_attach()
771 rxp = &sc->fxp_desc.rx_list[i]; in fxp_attach()
772 error = bus_dmamap_create(sc->fxp_rxmtag, 0, &rxp->rx_map); in fxp_attach()
787 eaddr[0] = sc->eeprom[FXP_EEPROM_MAP_IA0] & 0xff; in fxp_attach()
788 eaddr[1] = sc->eeprom[FXP_EEPROM_MAP_IA0] >> 8; in fxp_attach()
789 eaddr[2] = sc->eeprom[FXP_EEPROM_MAP_IA1] & 0xff; in fxp_attach()
790 eaddr[3] = sc->eeprom[FXP_EEPROM_MAP_IA1] >> 8; in fxp_attach()
791 eaddr[4] = sc->eeprom[FXP_EEPROM_MAP_IA2] & 0xff; in fxp_attach()
792 eaddr[5] = sc->eeprom[FXP_EEPROM_MAP_IA2] >> 8; in fxp_attach()
799 sc->eeprom[FXP_EEPROM_MAP_ID] & 0x02 ? "enabled" : in fxp_attach()
812 if (sc->flags & FXP_FLAG_SERIAL_MEDIA) { in fxp_attach()
813 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); in fxp_attach()
814 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); in fxp_attach()
820 if (sc->revision >= FXP_REV_82558_A4) in fxp_attach()
822 error = mii_attach(dev, &sc->miibus, ifp, in fxp_attach()
844 if (sc->flags & FXP_FLAG_EXT_RFA) { in fxp_attach()
850 if (sc->flags & FXP_FLAG_82559_RXCSUM) { in fxp_attach()
855 if (sc->flags & FXP_FLAG_WOLCAP) { in fxp_attach()
878 if ((sc->flags & FXP_FLAG_EXT_RFA) != 0) { in fxp_attach()
889 if_setsendqlen(ifp, FXP_NTXCB - 1); in fxp_attach()
895 error = bus_setup_intr(dev, sc->fxp_res[1], INTR_TYPE_NET | INTR_MPSAFE, in fxp_attach()
896 NULL, fxp_intr, sc, &sc->ih); in fxp_attach()
899 ether_ifdetach(sc->ifp); in fxp_attach()
907 if ((sc->flags & FXP_FLAG_WOLCAP) != 0) { in fxp_attach()
934 KASSERT(sc->ih == NULL, in fxp_release()
935 ("fxp_release() called with intr handle still active")); in fxp_release()
936 bus_generic_detach(sc->dev); in fxp_release()
937 ifmedia_removeall(&sc->sc_media); in fxp_release()
938 if (sc->fxp_desc.cbl_list) { in fxp_release()
939 bus_dmamap_unload(sc->cbl_tag, sc->cbl_map); in fxp_release()
940 bus_dmamem_free(sc->cbl_tag, sc->fxp_desc.cbl_list, in fxp_release()
941 sc->cbl_map); in fxp_release()
943 if (sc->fxp_stats) { in fxp_release()
944 bus_dmamap_unload(sc->fxp_stag, sc->fxp_smap); in fxp_release()
945 bus_dmamem_free(sc->fxp_stag, sc->fxp_stats, sc->fxp_smap); in fxp_release()
947 if (sc->mcsp) { in fxp_release()
948 bus_dmamap_unload(sc->mcs_tag, sc->mcs_map); in fxp_release()
949 bus_dmamem_free(sc->mcs_tag, sc->mcsp, sc->mcs_map); in fxp_release()
951 bus_release_resources(sc->dev, sc->fxp_spec, sc->fxp_res); in fxp_release()
952 if (sc->fxp_rxmtag) { in fxp_release()
954 rxp = &sc->fxp_desc.rx_list[i]; in fxp_release()
955 if (rxp->rx_mbuf != NULL) { in fxp_release()
956 bus_dmamap_sync(sc->fxp_rxmtag, rxp->rx_map, in fxp_release()
958 bus_dmamap_unload(sc->fxp_rxmtag, rxp->rx_map); in fxp_release()
959 m_freem(rxp->rx_mbuf); in fxp_release()
961 bus_dmamap_destroy(sc->fxp_rxmtag, rxp->rx_map); in fxp_release()
963 bus_dmamap_destroy(sc->fxp_rxmtag, sc->spare_map); in fxp_release()
964 bus_dma_tag_destroy(sc->fxp_rxmtag); in fxp_release()
966 if (sc->fxp_txmtag) { in fxp_release()
968 txp = &sc->fxp_desc.tx_list[i]; in fxp_release()
969 if (txp->tx_mbuf != NULL) { in fxp_release()
970 bus_dmamap_sync(sc->fxp_txmtag, txp->tx_map, in fxp_release()
972 bus_dmamap_unload(sc->fxp_txmtag, txp->tx_map); in fxp_release()
973 m_freem(txp->tx_mbuf); in fxp_release()
975 bus_dmamap_destroy(sc->fxp_txmtag, txp->tx_map); in fxp_release()
977 bus_dma_tag_destroy(sc->fxp_txmtag); in fxp_release()
979 if (sc->fxp_stag) in fxp_release()
980 bus_dma_tag_destroy(sc->fxp_stag); in fxp_release()
981 if (sc->cbl_tag) in fxp_release()
982 bus_dma_tag_destroy(sc->cbl_tag); in fxp_release()
983 if (sc->mcs_tag) in fxp_release()
984 bus_dma_tag_destroy(sc->mcs_tag); in fxp_release()
985 if (sc->ifp) in fxp_release()
986 if_free(sc->ifp); in fxp_release()
988 mtx_destroy(&sc->sc_mtx); in fxp_release()
1000 if (if_getcapenable(sc->ifp) & IFCAP_POLLING) in fxp_detach()
1001 ether_poll_deregister(sc->ifp); in fxp_detach()
1011 callout_drain(&sc->stat_ch); in fxp_detach()
1016 ether_ifdetach(sc->ifp); in fxp_detach()
1022 bus_teardown_intr(sc->dev, sc->fxp_res[1], sc->ih); in fxp_detach()
1023 sc->ih = NULL; in fxp_detach()
1062 ifp = sc->ifp; in fxp_suspend()
1063 if (pci_find_cap(sc->dev, PCIY_PMG, &pmc) == 0) { in fxp_suspend()
1064 pmstat = pci_read_config(sc->dev, pmc + PCIR_POWER_STATUS, 2); in fxp_suspend()
1067 /* Request PME. */ in fxp_suspend()
1069 sc->flags |= FXP_FLAG_WOL; in fxp_suspend()
1074 pci_write_config(sc->dev, pmc + PCIR_POWER_STATUS, pmstat, 2); in fxp_suspend()
1078 sc->suspended = 1; in fxp_suspend()
1085 * Device resume routine. re-enable busmastering, and restart the interface if
1092 if_t ifp = sc->ifp; in fxp_resume()
1098 if (pci_find_cap(sc->dev, PCIY_PMG, &pmc) == 0) { in fxp_resume()
1099 sc->flags &= ~FXP_FLAG_WOL; in fxp_resume()
1100 pmstat = pci_read_config(sc->dev, pmc + PCIR_POWER_STATUS, 2); in fxp_resume()
1101 /* Disable PME and clear PME status. */ in fxp_resume()
1103 pci_write_config(sc->dev, pmc + PCIR_POWER_STATUS, pmstat, 2); in fxp_resume()
1104 if ((sc->flags & FXP_FLAG_WOLCAP) != 0) in fxp_resume()
1116 sc->suspended = 0; in fxp_resume()
1131 for (x = 1 << (length - 1); x; x >>= 1) { in fxp_eeprom_shiftin()
1167 for (x = 1 << (sc->eeprom_size - 1); x; x >>= 1) { in fxp_eeprom_getword()
1181 sc->eeprom_size = data; in fxp_eeprom_getword()
1214 fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size); in fxp_eeprom_putword()
1222 fxp_eeprom_shiftin(sc, offset, sc->eeprom_size); in fxp_eeprom_putword()
1243 fxp_eeprom_shiftin(sc, 0, sc->eeprom_size); in fxp_eeprom_putword()
1253 * 559's can have either 64-word or 256-word EEPROMs, the 558
1254 * datasheet only talks about 64-word EEPROMs, and the 557 datasheet
1260 * The address is shifted in msb-to-lsb, and after the last
1261 * address-bit the EEPROM is supposed to output a `dummy zero' bit,
1263 * probing the data-out bit in the EEPROM control register just after
1265 * shifted enough address bits. The data-out should be tri-state,
1273 sc->eeprom_size = 8; in fxp_autosize_eeprom()
1303 fxp_read_eeprom(sc, sc->eeprom, 0, 1 << sc->eeprom_size); in fxp_load_eeprom()
1305 for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) in fxp_load_eeprom()
1306 cksum += sc->eeprom[i]; in fxp_load_eeprom()
1307 cksum = 0xBABA - cksum; in fxp_load_eeprom()
1308 if (cksum != sc->eeprom[(1 << sc->eeprom_size) - 1]) in fxp_load_eeprom()
1309 device_printf(sc->dev, in fxp_load_eeprom()
1310 "EEPROM checksum mismatch! (0x%04x -> 0x%04x)\n", in fxp_load_eeprom()
1311 cksum, sc->eeprom[(1 << sc->eeprom_size) - 1]); in fxp_load_eeprom()
1345 if (sc->tx_queued > FXP_NTXCB_HIWAT) in fxp_start_body()
1354 while (!if_sendq_empty(ifp) && sc->tx_queued < FXP_NTXCB - 1) { in fxp_start_body()
1381 bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, in fxp_start_body()
1389 sc->watchdog_timer = 5; in fxp_start_body()
1410 txp = sc->fxp_desc.tx_last->tx_next; in fxp_encap()
1425 if (sc->flags & FXP_FLAG_EXT_RFA) in fxp_encap()
1426 txp->tx_cb->ipcb_ip_activation_high = in fxp_encap()
1430 if (m->m_pkthdr.csum_flags & CSUM_TSO) { in fxp_encap()
1433 * contained in the first active transmit buffer. in fxp_encap()
1457 if (eh->ether_type == htons(ETHERTYPE_VLAN)) { in fxp_encap()
1471 poff = ip_off + (ip->ip_hl << 2); in fxp_encap()
1478 m = m_pullup(m, poff + (tcp->th_off << 2)); in fxp_encap()
1490 ip->ip_sum = 0; in fxp_encap()
1491 ip->ip_len = htons(m->m_pkthdr.tso_segsz + (ip->ip_hl << 2) + in fxp_encap()
1492 (tcp->th_off << 2)); in fxp_encap()
1493 tcp->th_sum = in_pseudo(ip->ip_src.s_addr, ip->ip_dst.s_addr, in fxp_encap()
1494 htons(IPPROTO_TCP + (tcp->th_off << 2) + in fxp_encap()
1495 m->m_pkthdr.tso_segsz)); in fxp_encap()
1497 tcp_payload = m->m_pkthdr.len - ip_off - (ip->ip_hl << 2); in fxp_encap()
1498 tcp_payload -= tcp->th_off << 2; in fxp_encap()
1500 } else if (m->m_pkthdr.csum_flags & FXP_CSUM_FEATURES) { in fxp_encap()
1509 txp->tx_cb->ipcb_ip_schedule = FXP_IPCB_TCPUDP_CHECKSUM_ENABLE; in fxp_encap()
1510 if (m->m_pkthdr.csum_flags & CSUM_TCP) in fxp_encap()
1511 txp->tx_cb->ipcb_ip_schedule |= FXP_IPCB_TCP_PACKET; in fxp_encap()
1522 * botch the header checksum on the 1-byte fragment. in fxp_encap()
1536 if (m->m_pkthdr.csum_flags & CSUM_IP) { in fxp_encap()
1537 if (m->m_pkthdr.len < 38) { in fxp_encap()
1539 m->m_data += ETHER_HDR_LEN; in fxp_encap()
1541 ip->ip_sum = in_cksum(m, ip->ip_hl << 2); in fxp_encap()
1542 m->m_data -= ETHER_HDR_LEN; in fxp_encap()
1543 m->m_pkthdr.csum_flags &= ~CSUM_IP; in fxp_encap()
1545 txp->tx_cb->ipcb_ip_activation_high = in fxp_encap()
1547 txp->tx_cb->ipcb_ip_schedule |= in fxp_encap()
1554 error = bus_dmamap_load_mbuf_sg(sc->fxp_txmtag, txp->tx_map, *m_head, in fxp_encap()
1557 m = m_collapse(*m_head, M_NOWAIT, sc->maxtxseg); in fxp_encap()
1564 error = bus_dmamap_load_mbuf_sg(sc->fxp_txmtag, txp->tx_map, in fxp_encap()
1579 KASSERT(nseg <= sc->maxtxseg, ("too many DMA segments")); in fxp_encap()
1580 bus_dmamap_sync(sc->fxp_txmtag, txp->tx_map, BUS_DMASYNC_PREWRITE); in fxp_encap()
1582 cbp = txp->tx_cb; in fxp_encap()
1597 if (sc->flags & FXP_FLAG_EXT_RFA) { in fxp_encap()
1598 cbp->tbd[i + 1].tb_addr = htole32(segs[i].ds_addr); in fxp_encap()
1599 cbp->tbd[i + 1].tb_size = htole32(segs[i].ds_len); in fxp_encap()
1601 cbp->tbd[i].tb_addr = htole32(segs[i].ds_addr); in fxp_encap()
1602 cbp->tbd[i].tb_size = htole32(segs[i].ds_len); in fxp_encap()
1605 if (sc->flags & FXP_FLAG_EXT_RFA) { in fxp_encap()
1607 cbp->tbd_number = 0xFF; in fxp_encap()
1608 cbp->tbd[nseg].tb_size |= htole32(0x8000); in fxp_encap()
1610 cbp->tbd_number = nseg; in fxp_encap()
1612 if (m->m_pkthdr.csum_flags & CSUM_TSO) { in fxp_encap()
1613 cbp->tbdtso.tb_size = htole32(m->m_pkthdr.tso_segsz << 16); in fxp_encap()
1614 cbp->tbd[1].tb_size |= htole32(tcp_payload << 16); in fxp_encap()
1615 cbp->ipcb_ip_schedule |= FXP_IPCB_LARGESEND_ENABLE | in fxp_encap()
1621 if ((m->m_flags & M_VLANTAG) != 0) { in fxp_encap()
1622 cbp->ipcb_vlan_id = htons(m->m_pkthdr.ether_vtag); in fxp_encap()
1623 txp->tx_cb->ipcb_ip_activation_high |= in fxp_encap()
1627 txp->tx_mbuf = m; in fxp_encap()
1628 txp->tx_cb->cb_status = 0; in fxp_encap()
1629 txp->tx_cb->byte_count = 0; in fxp_encap()
1630 if (sc->tx_queued != FXP_CXINT_THRESH - 1) in fxp_encap()
1631 txp->tx_cb->cb_command = in fxp_encap()
1632 htole16(sc->tx_cmd | FXP_CB_COMMAND_SF | in fxp_encap()
1635 txp->tx_cb->cb_command = in fxp_encap()
1636 htole16(sc->tx_cmd | FXP_CB_COMMAND_SF | in fxp_encap()
1638 if ((m->m_pkthdr.csum_flags & CSUM_TSO) == 0) in fxp_encap()
1639 txp->tx_cb->tx_threshold = tx_threshold; in fxp_encap()
1644 sc->fxp_desc.tx_last->tx_cb->cb_command &= htole16(~FXP_CB_COMMAND_S); in fxp_encap()
1645 sc->fxp_desc.tx_last = txp; in fxp_encap()
1652 if (sc->tx_queued == 0) in fxp_encap()
1653 sc->fxp_desc.tx_first = txp; in fxp_encap()
1655 sc->tx_queued++; in fxp_encap()
1705 if_t ifp = sc->ifp; in fxp_intr()
1709 if (sc->suspended) { in fxp_intr()
1737 fxp_intr_body(sc, ifp, statack, -1); in fxp_intr()
1748 ifp = sc->ifp; in fxp_txeof()
1749 bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, in fxp_txeof()
1751 for (txp = sc->fxp_desc.tx_first; sc->tx_queued && in fxp_txeof()
1752 (le16toh(txp->tx_cb->cb_status) & FXP_CB_STATUS_C) != 0; in fxp_txeof()
1753 txp = txp->tx_next) { in fxp_txeof()
1754 if (txp->tx_mbuf != NULL) { in fxp_txeof()
1755 bus_dmamap_sync(sc->fxp_txmtag, txp->tx_map, in fxp_txeof()
1757 bus_dmamap_unload(sc->fxp_txmtag, txp->tx_map); in fxp_txeof()
1758 m_freem(txp->tx_mbuf); in fxp_txeof()
1759 txp->tx_mbuf = NULL; in fxp_txeof()
1761 txp->tx_cb->tbd[0].tb_addr = 0; in fxp_txeof()
1763 sc->tx_queued--; in fxp_txeof()
1766 sc->fxp_desc.tx_first = txp; in fxp_txeof()
1767 bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, in fxp_txeof()
1769 if (sc->tx_queued == 0) in fxp_txeof()
1770 sc->watchdog_timer = 0; in fxp_txeof()
1783 if ((sc->flags & FXP_FLAG_82559_RXCSUM) == 0) { in fxp_rxcsum()
1786 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; in fxp_rxcsum()
1788 m->m_pkthdr.csum_flags |= CSUM_IP_VALID; in fxp_rxcsum()
1791 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID | in fxp_rxcsum()
1793 m->m_pkthdr.csum_data = 0xffff; in fxp_rxcsum()
1799 pktlen = m->m_pkthdr.len; in fxp_rxcsum()
1803 if (eh->ether_type != htons(ETHERTYPE_IP)) in fxp_rxcsum()
1806 if (ip->ip_v != IPVERSION) in fxp_rxcsum()
1809 hlen = ip->ip_hl << 2; in fxp_rxcsum()
1810 pktlen -= sizeof(struct ether_header); in fxp_rxcsum()
1813 if (ntohs(ip->ip_len) < hlen) in fxp_rxcsum()
1815 if (ntohs(ip->ip_len) != pktlen) in fxp_rxcsum()
1817 if (ip->ip_off & htons(IP_MF | IP_OFFMASK)) in fxp_rxcsum()
1820 switch (ip->ip_p) { in fxp_rxcsum()
1829 if (uh->uh_sum == 0) in fxp_rxcsum()
1838 len = hlen - sizeof(struct ip); in fxp_rxcsum()
1841 for (; len > 0; len -= sizeof(uint16_t), opts++) { in fxp_rxcsum()
1842 temp32 = csum - *opts; in fxp_rxcsum()
1847 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; in fxp_rxcsum()
1848 m->m_pkthdr.csum_data = csum; in fxp_rxcsum()
1866 sc->rnr++; in fxp_intr_body()
1869 if (sc->flags & FXP_FLAG_DEFERRED_RNR) { in fxp_intr_body()
1870 sc->flags &= ~FXP_FLAG_DEFERRED_RNR; in fxp_intr_body()
1904 * Process receiver interrupts. If a no-resource (RNR) in fxp_intr_body()
1906 * re-start the receiver. in fxp_intr_body()
1916 rxp = sc->fxp_desc.rx_head; in fxp_intr_body()
1917 m = rxp->rx_mbuf; in fxp_intr_body()
1918 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + in fxp_intr_body()
1920 bus_dmamap_sync(sc->fxp_rxmtag, rxp->rx_map, in fxp_intr_body()
1924 if (count >= 0 && count-- == 0) { in fxp_intr_body()
1927 sc->flags |= FXP_FLAG_DEFERRED_RNR; in fxp_intr_body()
1934 status = le16toh(rfa->rfa_status); in fxp_intr_body()
1943 sc->fxp_desc.rx_head = rxp->rx_next; in fxp_intr_body()
1959 total_len = le16toh(rfa->actual_size) & 0x3fff; in fxp_intr_body()
1960 if ((sc->flags & FXP_FLAG_82559_RXCSUM) != 0 && in fxp_intr_body()
1963 total_len -= 2; in fxp_intr_body()
1966 total_len > (MCLBYTES - RFA_ALIGNMENT_FUDGE - in fxp_intr_body()
1967 sc->rfa_size) || in fxp_intr_body()
1975 m->m_pkthdr.len = m->m_len = total_len; in fxp_intr_body()
1983 m->m_pkthdr.ether_vtag = in fxp_intr_body()
1984 ntohs(rfa->rfax_vlan_id); in fxp_intr_body()
1985 m->m_flags |= M_VLANTAG; in fxp_intr_body()
1989 * may re-enter fxp_start() in the netisr case. in fxp_intr_body()
2011 sc->fxp_desc.rx_head->rx_addr); in fxp_intr_body()
2020 if_t ifp = sc->ifp; in fxp_update_stats()
2021 struct fxp_stats *sp = sc->fxp_stats; in fxp_update_stats()
2027 bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, in fxp_update_stats()
2030 if (sc->revision >= FXP_REV_82559_A0) in fxp_update_stats()
2031 status = &sp->completion_status; in fxp_update_stats()
2032 else if (sc->revision >= FXP_REV_82558_A4) in fxp_update_stats()
2033 status = (uint32_t *)&sp->tx_tco; in fxp_update_stats()
2035 status = &sp->tx_pause; in fxp_update_stats()
2037 hsp = &sc->fxp_hwstats; in fxp_update_stats()
2038 hsp->tx_good += le32toh(sp->tx_good); in fxp_update_stats()
2039 hsp->tx_maxcols += le32toh(sp->tx_maxcols); in fxp_update_stats()
2040 hsp->tx_latecols += le32toh(sp->tx_latecols); in fxp_update_stats()
2041 hsp->tx_underruns += le32toh(sp->tx_underruns); in fxp_update_stats()
2042 hsp->tx_lostcrs += le32toh(sp->tx_lostcrs); in fxp_update_stats()
2043 hsp->tx_deffered += le32toh(sp->tx_deffered); in fxp_update_stats()
2044 hsp->tx_single_collisions += le32toh(sp->tx_single_collisions); in fxp_update_stats()
2045 hsp->tx_multiple_collisions += in fxp_update_stats()
2046 le32toh(sp->tx_multiple_collisions); in fxp_update_stats()
2047 hsp->tx_total_collisions += le32toh(sp->tx_total_collisions); in fxp_update_stats()
2048 hsp->rx_good += le32toh(sp->rx_good); in fxp_update_stats()
2049 hsp->rx_crc_errors += le32toh(sp->rx_crc_errors); in fxp_update_stats()
2050 hsp->rx_alignment_errors += le32toh(sp->rx_alignment_errors); in fxp_update_stats()
2051 hsp->rx_rnr_errors += le32toh(sp->rx_rnr_errors); in fxp_update_stats()
2052 hsp->rx_overrun_errors += le32toh(sp->rx_overrun_errors); in fxp_update_stats()
2053 hsp->rx_cdt_errors += le32toh(sp->rx_cdt_errors); in fxp_update_stats()
2054 hsp->rx_shortframes += le32toh(sp->rx_shortframes); in fxp_update_stats()
2055 hsp->tx_pause += le32toh(sp->tx_pause); in fxp_update_stats()
2056 hsp->rx_pause += le32toh(sp->rx_pause); in fxp_update_stats()
2057 hsp->rx_controls += le32toh(sp->rx_controls); in fxp_update_stats()
2058 hsp->tx_tco += le16toh(sp->tx_tco); in fxp_update_stats()
2059 hsp->rx_tco += le16toh(sp->rx_tco); in fxp_update_stats()
2061 if_inc_counter(ifp, IFCOUNTER_OPACKETS, le32toh(sp->tx_good)); in fxp_update_stats()
2063 le32toh(sp->tx_total_collisions)); in fxp_update_stats()
2064 if (sp->rx_good) { in fxp_update_stats()
2066 le32toh(sp->rx_good)); in fxp_update_stats()
2067 sc->rx_idle_secs = 0; in fxp_update_stats()
2068 } else if (sc->flags & FXP_FLAG_RXBUG) { in fxp_update_stats()
2072 sc->rx_idle_secs++; in fxp_update_stats()
2075 le32toh(sp->rx_crc_errors) + in fxp_update_stats()
2076 le32toh(sp->rx_alignment_errors) + in fxp_update_stats()
2077 le32toh(sp->rx_rnr_errors) + in fxp_update_stats()
2078 le32toh(sp->rx_overrun_errors)); in fxp_update_stats()
2083 if (sp->tx_underruns) { in fxp_update_stats()
2085 le32toh(sp->tx_underruns)); in fxp_update_stats()
2090 bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, in fxp_update_stats()
2100 * counters in the kernel are updated from the previous dump-stats
2101 * DMA and then a new dump-stats DMA is started. The on-chip
2103 * the DMA immediately, we don't wait - we just prepare to read
2110 if_t ifp = sc->ifp; in fxp_tick()
2130 * a work-around for a bug in the 82557 where the receiver locks in fxp_tick()
2136 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { in fxp_tick()
2137 sc->rx_idle_secs = 0; in fxp_tick()
2154 if (sc->miibus != NULL) in fxp_tick()
2155 mii_tick(device_get_softc(sc->miibus)); in fxp_tick()
2165 callout_reset(&sc->stat_ch, hz, fxp_tick, sc); in fxp_tick()
2175 if_t ifp = sc->ifp; in fxp_stop()
2180 sc->watchdog_timer = 0; in fxp_stop()
2185 callout_stop(&sc->stat_ch); in fxp_stop()
2201 txp = sc->fxp_desc.tx_list; in fxp_stop()
2204 bus_dmamap_sync(sc->fxp_txmtag, txp[i].tx_map, in fxp_stop()
2206 bus_dmamap_unload(sc->fxp_txmtag, txp[i].tx_map); in fxp_stop()
2210 txp[i].tx_cb->tbd[0].tb_addr = 0; in fxp_stop()
2213 bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, in fxp_stop()
2215 sc->tx_queued = 0; in fxp_stop()
2227 if_t ifp = sc->ifp; in fxp_watchdog()
2231 if (sc->watchdog_timer == 0 || --sc->watchdog_timer) in fxp_watchdog()
2234 device_printf(sc->dev, "device timeout\n"); in fxp_watchdog()
2263 if_t ifp = sc->ifp; in fxp_init_body()
2284 sc->flags &= ~FXP_FLAG_UCODE; in fxp_init_body()
2301 * Initialize base of dump-stats buffer. in fxp_init_body()
2304 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); in fxp_init_body()
2305 bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, in fxp_init_body()
2307 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->stats_addr); in fxp_init_body()
2314 if (sc->ident->ich == 0) { in fxp_init_body()
2316 (sc->flags & FXP_FLAG_UCODE) == 0) in fxp_init_body()
2331 cbp = (struct fxp_cb_config *)sc->fxp_desc.cbl_list; in fxp_init_body()
2340 cbp->cb_status = 0; in fxp_init_body()
2341 cbp->cb_command = htole16(FXP_CB_COMMAND_CONFIG | in fxp_init_body()
2343 cbp->link_addr = 0xffffffff; /* (no) next command */ in fxp_init_body()
2344 cbp->byte_count = sc->flags & FXP_FLAG_EXT_RFA ? 32 : 22; in fxp_init_body()
2345 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ in fxp_init_body()
2346 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ in fxp_init_body()
2347 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ in fxp_init_body()
2348 cbp->mwi_enable = sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0; in fxp_init_body()
2349 cbp->type_enable = 0; /* actually reserved */ in fxp_init_body()
2350 cbp->read_align_en = sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0; in fxp_init_body()
2351 cbp->end_wr_on_cl = sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0; in fxp_init_body()
2352 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ in fxp_init_body()
2353 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ in fxp_init_body()
2354 cbp->dma_mbce = 0; /* (disable) dma max counters */ in fxp_init_body()
2355 cbp->late_scb = 0; /* (don't) defer SCB update */ in fxp_init_body()
2356 cbp->direct_dma_dis = 1; /* disable direct rcv dma mode */ in fxp_init_body()
2357 cbp->tno_int_or_tco_en =0; /* (disable) tx not okay interrupt */ in fxp_init_body()
2358 cbp->ci_int = 1; /* interrupt on CU idle */ in fxp_init_body()
2359 cbp->ext_txcb_dis = sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1; in fxp_init_body()
2360 cbp->ext_stats_dis = 1; /* disable extended counters */ in fxp_init_body()
2361 cbp->keep_overrun_rx = 0; /* don't pass overrun frames to host */ in fxp_init_body()
2362 cbp->save_bf = sc->flags & FXP_FLAG_SAVE_BAD ? 1 : prm; in fxp_init_body()
2363 cbp->disc_short_rx = !prm; /* discard short packets */ in fxp_init_body()
2364 cbp->underrun_retry = 1; /* retry mode (once) on DMA underrun */ in fxp_init_body()
2365 cbp->two_frames = 0; /* do not limit FIFO to 2 frames */ in fxp_init_body()
2366 cbp->dyn_tbd = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; in fxp_init_body()
2367 cbp->ext_rfa = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; in fxp_init_body()
2368 cbp->mediatype = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1; in fxp_init_body()
2369 cbp->csma_dis = 0; /* (don't) disable link */ in fxp_init_body()
2370 cbp->tcp_udp_cksum = ((sc->flags & FXP_FLAG_82559_RXCSUM) != 0 && in fxp_init_body()
2372 cbp->vlan_tco = 0; /* (don't) enable vlan wakeup */ in fxp_init_body()
2373 cbp->link_wake_en = 0; /* (don't) assert PME# on link change */ in fxp_init_body()
2374 cbp->arp_wake_en = 0; /* (don't) assert PME# on arp */ in fxp_init_body()
2375 cbp->mc_wake_en = 0; /* (don't) enable PME# on mcmatch */ in fxp_init_body()
2376 cbp->nsai = 1; /* (don't) disable source addr insert */ in fxp_init_body()
2377 cbp->preamble_length = 2; /* (7 byte) preamble */ in fxp_init_body()
2378 cbp->loopback = 0; /* (don't) loopback */ in fxp_init_body()
2379 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ in fxp_init_body()
2380 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ in fxp_init_body()
2381 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ in fxp_init_body()
2382 cbp->promiscuous = prm; /* promiscuous mode */ in fxp_init_body()
2383 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ in fxp_init_body()
2384 cbp->wait_after_win = 0; /* (don't) enable modified backoff alg*/ in fxp_init_body()
2385 cbp->ignore_ul = 0; /* consider U/L bit in IA matching */ in fxp_init_body()
2386 cbp->crc16_en = 0; /* (don't) enable crc-16 algorithm */ in fxp_init_body()
2387 cbp->crscdt = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0; in fxp_init_body()
2389 cbp->stripping = !prm; /* truncate rx packet to byte count */ in fxp_init_body()
2390 cbp->padding = 1; /* (do) pad short tx packets */ in fxp_init_body()
2391 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ in fxp_init_body()
2392 cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0; in fxp_init_body()
2393 cbp->ia_wake_en = 0; /* (don't) wake up on address match */ in fxp_init_body()
2394 cbp->magic_pkt_dis = sc->flags & FXP_FLAG_WOL ? 0 : 1; in fxp_init_body()
2395 cbp->force_fdx = 0; /* (don't) force full duplex */ in fxp_init_body()
2396 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ in fxp_init_body()
2397 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ in fxp_init_body()
2398 cbp->mc_all = if_getflags(ifp) & IFF_ALLMULTI ? 1 : prm; in fxp_init_body()
2399 cbp->gamla_rx = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; in fxp_init_body()
2400 cbp->vlan_strip_en = ((sc->flags & FXP_FLAG_EXT_RFA) != 0 && in fxp_init_body()
2403 if (sc->revision == FXP_REV_82557) { in fxp_init_body()
2408 cbp->fc_delay_lsb = 0; in fxp_init_body()
2409 cbp->fc_delay_msb = 0x40; in fxp_init_body()
2410 cbp->pri_fc_thresh = 3; in fxp_init_body()
2411 cbp->tx_fc_dis = 0; in fxp_init_body()
2412 cbp->rx_fc_restop = 0; in fxp_init_body()
2413 cbp->rx_fc_restart = 0; in fxp_init_body()
2414 cbp->fc_filter = 0; in fxp_init_body()
2415 cbp->pri_fc_loc = 1; in fxp_init_body()
2420 cbp->fc_delay_lsb = 0xff; in fxp_init_body()
2421 cbp->fc_delay_msb = 0xff; in fxp_init_body()
2422 cbp->pri_fc_thresh = 3; in fxp_init_body()
2423 mii = device_get_softc(sc->miibus); in fxp_init_body()
2424 if ((IFM_OPTIONS(mii->mii_media_active) & in fxp_init_body()
2427 cbp->tx_fc_dis = 0; in fxp_init_body()
2430 cbp->tx_fc_dis = 1; in fxp_init_body()
2431 if ((IFM_OPTIONS(mii->mii_media_active) & in fxp_init_body()
2434 cbp->rx_fc_restart = 1; in fxp_init_body()
2435 cbp->rx_fc_restop = 1; in fxp_init_body()
2438 cbp->rx_fc_restart = 0; in fxp_init_body()
2439 cbp->rx_fc_restop = 0; in fxp_init_body()
2441 cbp->fc_filter = !prm; /* drop FC frames to host */ in fxp_init_body()
2442 cbp->pri_fc_loc = 1; /* FC pri location (byte31) */ in fxp_init_body()
2446 if (sc->revision >= FXP_REV_82558_A4) { in fxp_init_body()
2447 if (sc->revision >= FXP_REV_82559_A0) { in fxp_init_body()
2452 cbp->byte_count = 32; in fxp_init_body()
2453 cbp->ext_stats_dis = 1; in fxp_init_body()
2455 cbp->tno_int_or_tco_en = 1; in fxp_init_body()
2456 cbp->gamla_rx = 1; in fxp_init_body()
2458 cbp->ext_stats_dis = 0; in fxp_init_body()
2465 bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, in fxp_init_body()
2467 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); in fxp_init_body()
2470 fxp_dma_wait(sc, &cbp->cb_status, sc->cbl_tag, sc->cbl_map); in fxp_init_body()
2476 cb_ias = (struct fxp_cb_ias *)sc->fxp_desc.cbl_list; in fxp_init_body()
2477 cb_ias->cb_status = 0; in fxp_init_body()
2478 cb_ias->cb_command = htole16(FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL); in fxp_init_body()
2479 cb_ias->link_addr = 0xffffffff; in fxp_init_body()
2480 bcopy(if_getlladdr(sc->ifp), cb_ias->macaddr, ETHER_ADDR_LEN); in fxp_init_body()
2486 bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, in fxp_init_body()
2488 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); in fxp_init_body()
2491 fxp_dma_wait(sc, &cb_ias->cb_status, sc->cbl_tag, sc->cbl_map); in fxp_init_body()
2501 txp = sc->fxp_desc.tx_list; in fxp_init_body()
2502 tcbp = sc->fxp_desc.cbl_list; in fxp_init_body()
2508 tcbp[i].link_addr = htole32(sc->fxp_desc.cbl_addr + in fxp_init_body()
2510 if (sc->flags & FXP_FLAG_EXT_TXCB) in fxp_init_body()
2522 tcbp->cb_command = htole16(FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S); in fxp_init_body()
2523 bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, in fxp_init_body()
2525 sc->fxp_desc.tx_first = sc->fxp_desc.tx_last = txp; in fxp_init_body()
2526 sc->tx_queued = 1; in fxp_init_body()
2529 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); in fxp_init_body()
2533 * Initialize receiver buffer area - RFA. in fxp_init_body()
2536 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.rx_head->rx_addr); in fxp_init_body()
2539 if (sc->miibus != NULL && setmedia != 0) in fxp_init_body()
2540 mii_mediachg(device_get_softc(sc->miibus)); in fxp_init_body()
2561 callout_reset(&sc->stat_ch, hz, fxp_tick, sc); in fxp_init_body()
2575 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; in fxp_serial_ifmedia_sts()
2588 mii = device_get_softc(sc->miibus); in fxp_ifmedia_upd()
2590 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) in fxp_ifmedia_upd()
2606 mii = device_get_softc(sc->miibus); in fxp_ifmedia_sts()
2609 ifmr->ifm_active = mii->mii_media_active; in fxp_ifmedia_sts()
2610 ifmr->ifm_status = mii->mii_media_status; in fxp_ifmedia_sts()
2635 * will be 32-bit aligned. in fxp_new_rfabuf()
2637 m->m_data += RFA_ALIGNMENT_FUDGE; in fxp_new_rfabuf()
2644 m->m_data += sc->rfa_size; in fxp_new_rfabuf()
2645 rfa->size = htole16(MCLBYTES - sc->rfa_size - RFA_ALIGNMENT_FUDGE); in fxp_new_rfabuf()
2647 rfa->rfa_status = 0; in fxp_new_rfabuf()
2648 rfa->rfa_control = htole16(FXP_RFA_CONTROL_EL); in fxp_new_rfabuf()
2649 rfa->actual_size = 0; in fxp_new_rfabuf()
2650 m->m_len = m->m_pkthdr.len = MCLBYTES - RFA_ALIGNMENT_FUDGE - in fxp_new_rfabuf()
2651 sc->rfa_size; in fxp_new_rfabuf()
2657 * is also alignment-safe. in fxp_new_rfabuf()
2659 le32enc(&rfa->link_addr, 0xffffffff); in fxp_new_rfabuf()
2660 le32enc(&rfa->rbd_addr, 0xffffffff); in fxp_new_rfabuf()
2663 error = bus_dmamap_load(sc->fxp_rxmtag, sc->spare_map, rfa, in fxp_new_rfabuf()
2664 MCLBYTES - RFA_ALIGNMENT_FUDGE, fxp_dma_map_addr, in fxp_new_rfabuf()
2665 &rxp->rx_addr, BUS_DMA_NOWAIT); in fxp_new_rfabuf()
2671 if (rxp->rx_mbuf != NULL) in fxp_new_rfabuf()
2672 bus_dmamap_unload(sc->fxp_rxmtag, rxp->rx_map); in fxp_new_rfabuf()
2673 tmp_map = sc->spare_map; in fxp_new_rfabuf()
2674 sc->spare_map = rxp->rx_map; in fxp_new_rfabuf()
2675 rxp->rx_map = tmp_map; in fxp_new_rfabuf()
2676 rxp->rx_mbuf = m; in fxp_new_rfabuf()
2678 bus_dmamap_sync(sc->fxp_rxmtag, rxp->rx_map, in fxp_new_rfabuf()
2693 if (sc->fxp_desc.rx_head != NULL) { in fxp_add_rfabuf()
2694 p_rx = sc->fxp_desc.rx_tail; in fxp_add_rfabuf()
2696 (p_rx->rx_mbuf->m_ext.ext_buf + RFA_ALIGNMENT_FUDGE); in fxp_add_rfabuf()
2697 p_rx->rx_next = rxp; in fxp_add_rfabuf()
2698 le32enc(&p_rfa->link_addr, rxp->rx_addr); in fxp_add_rfabuf()
2699 p_rfa->rfa_control = 0; in fxp_add_rfabuf()
2700 bus_dmamap_sync(sc->fxp_rxmtag, p_rx->rx_map, in fxp_add_rfabuf()
2703 rxp->rx_next = NULL; in fxp_add_rfabuf()
2704 sc->fxp_desc.rx_head = rxp; in fxp_add_rfabuf()
2706 sc->fxp_desc.rx_tail = rxp; in fxp_add_rfabuf()
2715 m = rxp->rx_mbuf; in fxp_discard_rfabuf()
2716 m->m_data = m->m_ext.ext_buf; in fxp_discard_rfabuf()
2719 * will be 32-bit aligned. in fxp_discard_rfabuf()
2721 m->m_data += RFA_ALIGNMENT_FUDGE; in fxp_discard_rfabuf()
2728 m->m_data += sc->rfa_size; in fxp_discard_rfabuf()
2729 rfa->size = htole16(MCLBYTES - sc->rfa_size - RFA_ALIGNMENT_FUDGE); in fxp_discard_rfabuf()
2731 rfa->rfa_status = 0; in fxp_discard_rfabuf()
2732 rfa->rfa_control = htole16(FXP_RFA_CONTROL_EL); in fxp_discard_rfabuf()
2733 rfa->actual_size = 0; in fxp_discard_rfabuf()
2739 * is also alignment-safe. in fxp_discard_rfabuf()
2741 le32enc(&rfa->link_addr, 0xffffffff); in fxp_discard_rfabuf()
2742 le32enc(&rfa->rbd_addr, 0xffffffff); in fxp_discard_rfabuf()
2744 bus_dmamap_sync(sc->fxp_rxmtag, rxp->rx_map, in fxp_discard_rfabuf()
2759 && count--) in fxp_miibus_readreg()
2779 count--) in fxp_miibus_writereg()
2795 mii = device_get_softc(sc->miibus); in fxp_miibus_statchg()
2796 ifp = sc->ifp; in fxp_miibus_statchg()
2799 (mii->mii_media_status & (IFM_AVALID | IFM_ACTIVE)) != in fxp_miibus_statchg()
2803 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T && in fxp_miibus_statchg()
2804 sc->flags & FXP_FLAG_CU_RESUME_BUG) in fxp_miibus_statchg()
2805 sc->cu_resume_bug = 1; in fxp_miibus_statchg()
2807 sc->cu_resume_bug = 0; in fxp_miibus_statchg()
2812 if (sc->revision == FXP_REV_82557) in fxp_miibus_statchg()
2832 * XXX If it's up then re-initialize it. This is so flags in fxp_ioctl()
2837 ((if_getflags(ifp) ^ sc->if_flags) & in fxp_ioctl()
2847 sc->if_flags = if_getflags(ifp); in fxp_ioctl()
2863 if (sc->miibus != NULL) { in fxp_ioctl()
2864 mii = device_get_softc(sc->miibus); in fxp_ioctl()
2866 &mii->mii_media, command); in fxp_ioctl()
2868 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); in fxp_ioctl()
2874 mask = if_getcapenable(ifp) ^ ifr->ifr_reqcap; in fxp_ioctl()
2877 if (ifr->ifr_reqcap & IFCAP_POLLING) { in fxp_ioctl()
2908 if ((sc->flags & FXP_FLAG_82559_RXCSUM) != 0) in fxp_ioctl()
2925 if (sc->revision != FXP_REV_82557) in fxp_ioctl()
2929 sc->flags ^= flag; in fxp_ioctl()
2966 struct fxp_cb_mcs *mcsp = sc->mcsp; in fxp_setup_maddr()
2968 if (mcsp->mc_cnt < MAXMCADDR) in fxp_setup_maddr()
2969 bcopy(LLADDR(sdl), mcsp->mc_addr[mcsp->mc_cnt * ETHER_ADDR_LEN], in fxp_setup_maddr()
2971 mcsp->mc_cnt++; in fxp_setup_maddr()
2981 struct fxp_cb_mcs *mcsp = sc->mcsp; in fxp_mc_addrs()
2982 if_t ifp = sc->ifp; in fxp_mc_addrs()
2985 mcsp->mc_cnt = 0; in fxp_mc_addrs()
2986 if_foreach_llmaddr(sc->ifp, fxp_setup_maddr, sc); in fxp_mc_addrs()
2987 if (mcsp->mc_cnt >= MAXMCADDR) { in fxp_mc_addrs()
2989 mcsp->mc_cnt = 0; in fxp_mc_addrs()
2992 mcsp->mc_cnt = htole16(mcsp->mc_cnt * ETHER_ADDR_LEN); in fxp_mc_addrs()
3001 * the pre-initialized command ring (esp. link pointers) by not actually
3002 * inserting the mcsetup command in the ring - i.e. its link pointer
3015 mcsp = sc->mcsp; in fxp_mc_setup()
3016 mcsp->cb_status = 0; in fxp_mc_setup()
3017 mcsp->cb_command = htole16(FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_EL); in fxp_mc_setup()
3018 mcsp->link_addr = 0xffffffff; in fxp_mc_setup()
3027 FXP_SCB_CUS_IDLE && --count) in fxp_mc_setup()
3030 device_printf(sc->dev, "command queue timeout\n"); in fxp_mc_setup()
3038 bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, in fxp_mc_setup()
3040 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->mcs_addr); in fxp_mc_setup()
3043 fxp_dma_wait(sc, &mcsp->cb_status, sc->mcs_tag, sc->mcs_map); in fxp_mc_setup()
3087 if (sc->flags & FXP_FLAG_NO_UCODE) in fxp_load_ucode()
3090 for (uc = ucode_table; uc->ucode != NULL; uc++) in fxp_load_ucode()
3091 if (sc->revision == uc->revision) in fxp_load_ucode()
3093 if (uc->ucode == NULL) in fxp_load_ucode()
3095 cbp = (struct fxp_cb_ucode *)sc->fxp_desc.cbl_list; in fxp_load_ucode()
3096 cbp->cb_status = 0; in fxp_load_ucode()
3097 cbp->cb_command = htole16(FXP_CB_COMMAND_UCODE | FXP_CB_COMMAND_EL); in fxp_load_ucode()
3098 cbp->link_addr = 0xffffffff; /* (no) next command */ in fxp_load_ucode()
3099 for (i = 0; i < uc->length; i++) in fxp_load_ucode()
3100 cbp->ucode[i] = htole32(uc->ucode[i]); in fxp_load_ucode()
3101 if (uc->int_delay_offset) in fxp_load_ucode()
3102 *(uint16_t *)&cbp->ucode[uc->int_delay_offset] = in fxp_load_ucode()
3103 htole16(sc->tunable_int_delay + sc->tunable_int_delay / 2); in fxp_load_ucode()
3104 if (uc->bundle_max_offset) in fxp_load_ucode()
3105 *(uint16_t *)&cbp->ucode[uc->bundle_max_offset] = in fxp_load_ucode()
3106 htole16(sc->tunable_bundle_max); in fxp_load_ucode()
3111 bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, in fxp_load_ucode()
3113 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); in fxp_load_ucode()
3116 fxp_dma_wait(sc, &cbp->cb_status, sc->cbl_tag, sc->cbl_map); in fxp_load_ucode()
3117 device_printf(sc->dev, in fxp_load_ucode()
3119 sc->tunable_int_delay, in fxp_load_ucode()
3120 uc->bundle_max_offset == 0 ? 0 : sc->tunable_bundle_max); in fxp_load_ucode()
3121 sc->flags |= FXP_FLAG_UCODE; in fxp_load_ucode()
3136 ctx = device_get_sysctl_ctx(sc->dev); in fxp_sysctl_node()
3137 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)); in fxp_sysctl_node()
3141 &sc->tunable_int_delay, 0, sysctl_hw_fxp_int_delay, "I", in fxp_sysctl_node()
3145 &sc->tunable_bundle_max, 0, sysctl_hw_fxp_bundle_max, "I", in fxp_sysctl_node()
3147 SYSCTL_ADD_INT(ctx, child,OID_AUTO, "rnr", CTLFLAG_RD, &sc->rnr, 0, in fxp_sysctl_node()
3153 sc->tunable_int_delay = TUNABLE_INT_DELAY; in fxp_sysctl_node()
3154 sc->tunable_bundle_max = TUNABLE_BUNDLE_MAX; in fxp_sysctl_node()
3155 (void) resource_int_value(device_get_name(sc->dev), in fxp_sysctl_node()
3156 device_get_unit(sc->dev), "int_delay", &sc->tunable_int_delay); in fxp_sysctl_node()
3157 (void) resource_int_value(device_get_name(sc->dev), in fxp_sysctl_node()
3158 device_get_unit(sc->dev), "bundle_max", &sc->tunable_bundle_max); in fxp_sysctl_node()
3159 sc->rnr = 0; in fxp_sysctl_node()
3161 hsp = &sc->fxp_hwstats; in fxp_sysctl_node()
3171 &hsp->rx_good, "Good frames"); in fxp_sysctl_node()
3173 &hsp->rx_crc_errors, "CRC errors"); in fxp_sysctl_node()
3175 &hsp->rx_alignment_errors, "Alignment errors"); in fxp_sysctl_node()
3177 &hsp->rx_rnr_errors, "RNR errors"); in fxp_sysctl_node()
3179 &hsp->rx_overrun_errors, "Overrun errors"); in fxp_sysctl_node()
3181 &hsp->rx_cdt_errors, "Collision detect errors"); in fxp_sysctl_node()
3183 &hsp->rx_shortframes, "Short frame errors"); in fxp_sysctl_node()
3184 if (sc->revision >= FXP_REV_82558_A4) { in fxp_sysctl_node()
3186 &hsp->rx_pause, "Pause frames"); in fxp_sysctl_node()
3188 &hsp->rx_controls, "Unsupported control frames"); in fxp_sysctl_node()
3190 if (sc->revision >= FXP_REV_82559_A0) in fxp_sysctl_node()
3192 &hsp->rx_tco, "TCO frames"); in fxp_sysctl_node()
3199 &hsp->tx_good, "Good frames"); in fxp_sysctl_node()
3201 &hsp->tx_maxcols, "Maximum collisions errors"); in fxp_sysctl_node()
3203 &hsp->tx_latecols, "Late collisions errors"); in fxp_sysctl_node()
3205 &hsp->tx_underruns, "Underrun errors"); in fxp_sysctl_node()
3207 &hsp->tx_lostcrs, "Lost carrier sense"); in fxp_sysctl_node()
3209 &hsp->tx_deffered, "Deferred"); in fxp_sysctl_node()
3211 &hsp->tx_single_collisions, "Single collisions"); in fxp_sysctl_node()
3213 &hsp->tx_multiple_collisions, "Multiple collisions"); in fxp_sysctl_node()
3215 &hsp->tx_total_collisions, "Total collisions"); in fxp_sysctl_node()
3216 if (sc->revision >= FXP_REV_82558_A4) in fxp_sysctl_node()
3218 &hsp->tx_pause, "Pause frames"); in fxp_sysctl_node()
3219 if (sc->revision >= FXP_REV_82559_A0) in fxp_sysctl_node()
3221 &hsp->tx_tco, "TCO frames"); in fxp_sysctl_node()
3227 sysctl_int_range(SYSCTL_HANDLER_ARGS, int low, int high) in sysctl_int_range() argument
3233 if (error || !req->newptr) in sysctl_int_range()
3235 if (value < low || value > high) in sysctl_int_range()