Lines Matching +full:0 +full:x1032
117 0x0, 0x0, /* cb_status */
118 0x0, 0x0, /* cb_command */
119 0x0, 0x0, 0x0, 0x0, /* link_addr */
120 0x0, /* 0 */
121 0x0, /* 1 */
122 0x0, /* 2 */
123 0x0, /* 3 */
124 0x0, /* 4 */
125 0x0, /* 5 */
126 0x32, /* 6 */
127 0x0, /* 7 */
128 0x0, /* 8 */
129 0x0, /* 9 */
130 0x6, /* 10 */
131 0x0, /* 11 */
132 0x0, /* 12 */
133 0x0, /* 13 */
134 0xf2, /* 14 */
135 0x48, /* 15 */
136 0x0, /* 16 */
137 0x40, /* 17 */
138 0xf0, /* 18 */
139 0x0, /* 19 */
140 0x3f, /* 20 */
141 0x5, /* 21 */
142 0x0, /* 22 */
143 0x0, /* 23 */
144 0x0, /* 24 */
145 0x0, /* 25 */
146 0x0, /* 26 */
147 0x0, /* 27 */
148 0x0, /* 28 */
149 0x0, /* 29 */
150 0x0, /* 30 */
151 0x0 /* 31 */
161 { 0x8086, 0x1029, -1, 0, "Intel 82559 PCI/CardBus Pro/100" },
162 { 0x8086, 0x1030, -1, 0, "Intel 82559 Pro/100 Ethernet" },
163 { 0x8086, 0x1031, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" },
164 { 0x8086, 0x1032, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" },
165 { 0x8086, 0x1033, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" },
166 { 0x8086, 0x1034, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" },
167 { 0x8086, 0x1035, -1, 3, "Intel 82801CAM (ICH3) Pro/100 Ethernet" },
168 { 0x8086, 0x1036, -1, 3, "Intel 82801CAM (ICH3) Pro/100 Ethernet" },
169 { 0x8086, 0x1037, -1, 3, "Intel 82801CAM (ICH3) Pro/100 Ethernet" },
170 { 0x8086, 0x1038, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" },
171 { 0x8086, 0x1039, -1, 4, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" },
172 { 0x8086, 0x103A, -1, 4, "Intel 82801DB (ICH4) Pro/100 Ethernet" },
173 { 0x8086, 0x103B, -1, 4, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" },
174 { 0x8086, 0x103C, -1, 4, "Intel 82801DB (ICH4) Pro/100 Ethernet" },
175 { 0x8086, 0x103D, -1, 4, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" },
176 { 0x8086, 0x103E, -1, 4, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" },
177 { 0x8086, 0x1050, -1, 5, "Intel 82801BA (D865) Pro/100 VE Ethernet" },
178 { 0x8086, 0x1051, -1, 5, "Intel 82562ET (ICH5/ICH5R) Pro/100 VE Ethernet" },
179 { 0x8086, 0x1059, -1, 0, "Intel 82551QM Pro/100 M Mobile Connection" },
180 { 0x8086, 0x1064, -1, 6, "Intel 82562EZ (ICH6)" },
181 { 0x8086, 0x1065, -1, 6, "Intel 82562ET/EZ/GT/GZ PRO/100 VE Ethernet" },
182 { 0x8086, 0x1068, -1, 6, "Intel 82801FBM (ICH6-M) Pro/100 VE Ethernet" },
183 { 0x8086, 0x1069, -1, 6, "Intel 82562EM/EX/GX Pro/100 Ethernet" },
184 { 0x8086, 0x1091, -1, 7, "Intel 82562GX Pro/100 Ethernet" },
185 { 0x8086, 0x1092, -1, 7, "Intel Pro/100 VE Network Connection" },
186 { 0x8086, 0x1093, -1, 7, "Intel Pro/100 VM Network Connection" },
187 { 0x8086, 0x1094, -1, 7, "Intel Pro/100 946GZ (ICH7) Network Connection" },
188 { 0x8086, 0x1209, -1, 0, "Intel 82559ER Embedded 10/100 Ethernet" },
189 { 0x8086, 0x1229, 0x01, 0, "Intel 82557 Pro/100 Ethernet" },
190 { 0x8086, 0x1229, 0x02, 0, "Intel 82557 Pro/100 Ethernet" },
191 { 0x8086, 0x1229, 0x03, 0, "Intel 82557 Pro/100 Ethernet" },
192 { 0x8086, 0x1229, 0x04, 0, "Intel 82558 Pro/100 Ethernet" },
193 { 0x8086, 0x1229, 0x05, 0, "Intel 82558 Pro/100 Ethernet" },
194 { 0x8086, 0x1229, 0x06, 0, "Intel 82559 Pro/100 Ethernet" },
195 { 0x8086, 0x1229, 0x07, 0, "Intel 82559 Pro/100 Ethernet" },
196 { 0x8086, 0x1229, 0x08, 0, "Intel 82559 Pro/100 Ethernet" },
197 { 0x8086, 0x1229, 0x09, 0, "Intel 82559ER Pro/100 Ethernet" },
198 { 0x8086, 0x1229, 0x0c, 0, "Intel 82550 Pro/100 Ethernet" },
199 { 0x8086, 0x1229, 0x0d, 0, "Intel 82550C Pro/100 Ethernet" },
200 { 0x8086, 0x1229, 0x0e, 0, "Intel 82550 Pro/100 Ethernet" },
201 { 0x8086, 0x1229, 0x0f, 0, "Intel 82551 Pro/100 Ethernet" },
202 { 0x8086, 0x1229, 0x10, 0, "Intel 82551 Pro/100 Ethernet" },
203 { 0x8086, 0x1229, -1, 0, "Intel 82557/8/9 Pro/100 Ethernet" },
204 { 0x8086, 0x2449, -1, 2, "Intel 82801BA/CAM (ICH2/3) Pro/100 Ethernet" },
205 { 0x8086, 0x27dc, -1, 7, "Intel 82801GB (ICH7) 10/100 Ethernet" },
206 { 0, 0, -1, 0, NULL },
311 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
312 { -1, 0 }
317 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
318 { -1, 0 }
336 if (i == 0) { in fxp_scb_wait()
337 flowctl.b[0] = CSR_READ_1(sc, FXP_CSR_FC_THRESH); in fxp_scb_wait()
339 device_printf(sc->dev, "SCB timeout: 0x%x 0x%x 0x%x 0x%x\n", in fxp_scb_wait()
363 for (i = 10000; i > 0; i--) { in fxp_dma_wait()
367 if ((le16toh(*status) & FXP_CB_STATUS_C) != 0) in fxp_dma_wait()
370 if (i == 0) in fxp_dma_wait()
436 error = 0; in fxp_attach()
441 callout_init_mtx(&sc->stat_ch, &sc->sc_mtx, 0); in fxp_attach()
442 ifmedia_init(&sc->sc_media, 0, fxp_serial_ifmedia_upd, in fxp_attach()
457 prefer_iomap = 0; in fxp_attach()
504 if (sc->ident->ich > 0) { in fxp_attach()
521 if ((data & 0x20) != 0 && pci_has_pm(sc->dev)) in fxp_attach()
533 if ((data & 0x0400) == 0) in fxp_attach()
540 if ((data & 0x03) != 0x03) { in fxp_attach()
550 if (sc->revision == FXP_REV_82557 && (data & FXP_PHY_DEVICE_MASK) != 0 in fxp_attach()
568 (sc->ident->ich == 0 && sc->revision >= FXP_REV_82559_A0)) { in fxp_attach()
570 if (data & 0x02) { /* STB enable */ in fxp_attach()
576 data &= ~0x02; in fxp_attach()
579 device_printf(dev, "New EEPROM ID: 0x%x\n", data); in fxp_attach()
580 cksum = 0; in fxp_attach()
581 for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) in fxp_attach()
584 cksum = 0xBABA - cksum; in fxp_attach()
587 "EEPROM checksum @ 0x%x: 0x%x -> 0x%x\n", in fxp_attach()
609 pci_read_config(dev, PCIR_CACHELNSZ, 1) != 0) in fxp_attach()
625 if (sc->ident->device != 0x1209) in fxp_attach()
656 error = bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, in fxp_attach()
659 sc->maxtxseg, sc->maxsegsize, 0, NULL, NULL, &sc->fxp_txmtag); in fxp_attach()
665 error = bus_dma_tag_create(bus_get_dma_tag(dev), 2, 0, in fxp_attach()
667 MCLBYTES, 1, MCLBYTES, 0, NULL, NULL, &sc->fxp_rxmtag); in fxp_attach()
673 error = bus_dma_tag_create(bus_get_dma_tag(dev), 4, 0, in fxp_attach()
675 sizeof(struct fxp_stats), 1, sizeof(struct fxp_stats), 0, in fxp_attach()
696 error = bus_dma_tag_create(bus_get_dma_tag(dev), 4, 0, in fxp_attach()
698 FXP_TXCB_SZ, 1, FXP_TXCB_SZ, 0, NULL, NULL, &sc->cbl_tag); in fxp_attach()
719 error = bus_dma_tag_create(bus_get_dma_tag(dev), 4, 0, in fxp_attach()
721 sizeof(struct fxp_cb_mcs), 1, sizeof(struct fxp_cb_mcs), 0, in fxp_attach()
751 for (i = 0; i < FXP_NTXCB; i++) { in fxp_attach()
753 error = bus_dmamap_create(sc->fxp_txmtag, 0, &txp[i].tx_map); in fxp_attach()
759 error = bus_dmamap_create(sc->fxp_rxmtag, 0, &sc->spare_map); in fxp_attach()
769 for (i = 0; i < FXP_NRFABUFS; i++) { in fxp_attach()
771 error = bus_dmamap_create(sc->fxp_rxmtag, 0, &rxp->rx_map); in fxp_attach()
776 if (fxp_new_rfabuf(sc, rxp) != 0) { in fxp_attach()
786 eaddr[0] = sc->eeprom[FXP_EEPROM_MAP_IA0] & 0xff; in fxp_attach()
788 eaddr[2] = sc->eeprom[FXP_EEPROM_MAP_IA1] & 0xff; in fxp_attach()
790 eaddr[4] = sc->eeprom[FXP_EEPROM_MAP_IA2] & 0xff; in fxp_attach()
798 sc->eeprom[FXP_EEPROM_MAP_ID] & 0x02 ? "enabled" : in fxp_attach()
812 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); in fxp_attach()
825 if (error != 0) { in fxp_attach()
839 if_setcapabilities(ifp, 0); in fxp_attach()
840 if_setcapenable(ifp, 0); in fxp_attach()
845 if_setcapabilitiesbit(ifp, IFCAP_HWCSUM | IFCAP_TSO4, 0); in fxp_attach()
846 if_setcapenablebit(ifp, IFCAP_HWCSUM | IFCAP_TSO4, 0); in fxp_attach()
850 if_setcapabilitiesbit(ifp, IFCAP_RXCSUM, 0); in fxp_attach()
851 if_setcapenablebit(ifp, IFCAP_RXCSUM, 0); in fxp_attach()
855 if_setcapabilitiesbit(ifp, IFCAP_WOL_MAGIC, 0); in fxp_attach()
856 if_setcapenablebit(ifp, IFCAP_WOL_MAGIC, 0); in fxp_attach()
861 if_setcapabilitiesbit(ifp, IFCAP_POLLING, 0); in fxp_attach()
875 if_setcapabilitiesbit(ifp, IFCAP_VLAN_MTU, 0); in fxp_attach()
876 if_setcapenablebit(ifp, IFCAP_VLAN_MTU, 0); in fxp_attach()
877 if ((sc->flags & FXP_FLAG_EXT_RFA) != 0) { in fxp_attach()
879 IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO, 0); in fxp_attach()
881 IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO, 0); in fxp_attach()
906 if ((sc->flags & FXP_FLAG_WOLCAP) != 0) { in fxp_attach()
910 fxp_init_body(sc, 0); in fxp_attach()
952 for (i = 0; i < FXP_NRFABUFS; i++) { in fxp_release()
966 for (i = 0; i < FXP_NTXCB; i++) { in fxp_release()
1026 return (0); in fxp_detach()
1060 if ((if_getcapenable(ifp) & IFCAP_WOL_MAGIC) != 0) { in fxp_suspend()
1065 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in fxp_suspend()
1066 fxp_init_body(sc, 0); in fxp_suspend()
1073 return (0); in fxp_suspend()
1090 if ((sc->flags & FXP_FLAG_WOLCAP) != 0) in fxp_resume()
1102 sc->suspended = 0; in fxp_resume()
1105 return (0); in fxp_resume()
1152 data = 0; in fxp_eeprom_getword()
1166 if (autosize && reg == 0) { in fxp_eeprom_getword()
1174 data = 0; in fxp_eeprom_getword()
1184 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); in fxp_eeprom_getword()
1199 fxp_eeprom_shiftin(sc, 0x4, 3); in fxp_eeprom_putword()
1200 fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size); in fxp_eeprom_putword()
1201 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); in fxp_eeprom_putword()
1210 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); in fxp_eeprom_putword()
1217 for (i = 0; i < 1000; i++) { in fxp_eeprom_putword()
1222 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); in fxp_eeprom_putword()
1228 fxp_eeprom_shiftin(sc, 0x4, 3); in fxp_eeprom_putword()
1229 fxp_eeprom_shiftin(sc, 0, sc->eeprom_size); in fxp_eeprom_putword()
1230 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); in fxp_eeprom_putword()
1262 (void) fxp_eeprom_getword(sc, 0, 1); in fxp_autosize_eeprom()
1270 for (i = 0; i < words; i++) in fxp_read_eeprom()
1271 data[i] = fxp_eeprom_getword(sc, offset + i, 0); in fxp_read_eeprom()
1279 for (i = 0; i < words; i++) in fxp_write_eeprom()
1289 fxp_read_eeprom(sc, sc->eeprom, 0, 1 << sc->eeprom_size); in fxp_load_eeprom()
1290 cksum = 0; in fxp_load_eeprom()
1291 for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) in fxp_load_eeprom()
1293 cksum = 0xBABA - cksum; in fxp_load_eeprom()
1296 "EEPROM checksum mismatch! (0x%04x -> 0x%04x)\n", in fxp_load_eeprom()
1339 txqueued = 0; in fxp_start_body()
1353 if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, 0); in fxp_start_body()
1366 if (txqueued > 0) { in fxp_start_body()
1391 tcp_payload = 0; in fxp_encap()
1425 if (M_WRITABLE(*m_head) == 0) { in fxp_encap()
1476 ip->ip_sum = 0; in fxp_encap()
1541 segs, &nseg, 0); in fxp_encap()
1551 *m_head, segs, &nseg, 0); in fxp_encap()
1552 if (error != 0) { in fxp_encap()
1557 } else if (error != 0) in fxp_encap()
1559 if (nseg == 0) { in fxp_encap()
1569 for (i = 0; i < nseg; i++) { in fxp_encap()
1593 cbp->tbd_number = 0xFF; in fxp_encap()
1594 cbp->tbd[nseg].tb_size |= htole32(0x8000); in fxp_encap()
1607 if ((m->m_flags & M_VLANTAG) != 0) { in fxp_encap()
1614 txp->tx_cb->cb_status = 0; in fxp_encap()
1615 txp->tx_cb->byte_count = 0; in fxp_encap()
1624 if ((m->m_pkthdr.csum_flags & CSUM_TSO) == 0) in fxp_encap()
1638 if (sc->tx_queued == 0) in fxp_encap()
1643 return (0); in fxp_encap()
1654 int rx_npkts = 0; in fxp_poll()
1668 if (tmp == 0xff || tmp == 0) { in fxp_poll()
1674 if (tmp != 0) in fxp_poll()
1706 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { in fxp_intr()
1709 * FXP_SCB_INTR_SWI bit always returns 0 on a read. If in fxp_intr()
1713 if (statack == 0xff) { in fxp_intr()
1722 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) in fxp_intr()
1738 (le16toh(txp->tx_cb->cb_status) & FXP_CB_STATUS_C) != 0; in fxp_txeof()
1747 txp->tx_cb->tbd[0].tb_addr = 0; in fxp_txeof()
1750 if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); in fxp_txeof()
1755 if (sc->tx_queued == 0) in fxp_txeof()
1756 sc->watchdog_timer = 0; in fxp_txeof()
1769 if ((sc->flags & FXP_FLAG_82559_RXCSUM) == 0) { in fxp_rxcsum()
1770 if ((status & FXP_RFA_STATUS_PARSE) != 0) { in fxp_rxcsum()
1779 m->m_pkthdr.csum_data = 0xffff; in fxp_rxcsum()
1815 if (uh->uh_sum == 0) in fxp_rxcsum()
1825 if (len > 0) { in fxp_rxcsum()
1827 for (; len > 0; len -= sizeof(uint16_t), opts++) { in fxp_rxcsum()
1844 int rnr = (statack & FXP_SCB_STATACK_RNR) ? 1 : 0; in fxp_intr_body()
1848 rx_npkts = 0; in fxp_intr_body()
1886 if (!rnr && (statack & FXP_SCB_STATACK_FR) == 0) in fxp_intr_body()
1909 #ifdef DEVICE_POLLING /* loop at most count times if count >=0 */ in fxp_intr_body()
1910 if (count >= 0 && count-- == 0) { in fxp_intr_body()
1914 rnr = 0; in fxp_intr_body()
1921 if ((status & FXP_RFA_STATUS_C) == 0) in fxp_intr_body()
1924 if ((status & FXP_RFA_STATUS_RNR) != 0) in fxp_intr_body()
1936 if (fxp_new_rfabuf(sc, rxp) == 0) { in fxp_intr_body()
1945 total_len = le16toh(rfa->actual_size) & 0x3fff; in fxp_intr_body()
1946 if ((sc->flags & FXP_FLAG_82559_RXCSUM) != 0 && in fxp_intr_body()
1947 (if_getcapenable(ifp) & IFCAP_RXCSUM) != 0) { in fxp_intr_body()
1965 if ((if_getcapenable(ifp) & IFCAP_RXCSUM) != 0) in fxp_intr_body()
1967 if ((if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) != 0 && in fxp_intr_body()
1968 (status & FXP_RFA_STATUS_VLAN) != 0) { in fxp_intr_body()
1985 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) in fxp_intr_body()
2053 sc->rx_idle_secs = 0; in fxp_update_stats()
2075 *status = 0; in fxp_update_stats()
2123 sc->rx_idle_secs = 0; in fxp_tick()
2124 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) { in fxp_tick()
2125 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in fxp_tick()
2134 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { in fxp_tick()
2165 if_setdrvflagbits(ifp, 0, (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)); in fxp_stop()
2166 sc->watchdog_timer = 0; in fxp_stop()
2188 for (i = 0; i < FXP_NTXCB; i++) { in fxp_stop()
2196 txp[i].tx_cb->tbd[0].tb_addr = 0; in fxp_stop()
2201 sc->tx_queued = 0; in fxp_stop()
2217 if (sc->watchdog_timer == 0 || --sc->watchdog_timer) in fxp_watchdog()
2223 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in fxp_watchdog()
2274 prm = (if_getflags(ifp) & IFF_PROMISC) ? 1 : 0; in fxp_init_body()
2280 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); in fxp_init_body()
2300 if (sc->ident->ich == 0) { in fxp_init_body()
2302 (sc->flags & FXP_FLAG_UCODE) == 0) in fxp_init_body()
2326 cbp->cb_status = 0; in fxp_init_body()
2329 cbp->link_addr = 0xffffffff; /* (no) next command */ in fxp_init_body()
2332 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ in fxp_init_body()
2333 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ in fxp_init_body()
2334 cbp->mwi_enable = sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0; in fxp_init_body()
2335 cbp->type_enable = 0; /* actually reserved */ in fxp_init_body()
2336 cbp->read_align_en = sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0; in fxp_init_body()
2337 cbp->end_wr_on_cl = sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0; in fxp_init_body()
2338 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ in fxp_init_body()
2339 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ in fxp_init_body()
2340 cbp->dma_mbce = 0; /* (disable) dma max counters */ in fxp_init_body()
2341 cbp->late_scb = 0; /* (don't) defer SCB update */ in fxp_init_body()
2343 cbp->tno_int_or_tco_en =0; /* (disable) tx not okay interrupt */ in fxp_init_body()
2345 cbp->ext_txcb_dis = sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1; in fxp_init_body()
2347 cbp->keep_overrun_rx = 0; /* don't pass overrun frames to host */ in fxp_init_body()
2351 cbp->two_frames = 0; /* do not limit FIFO to 2 frames */ in fxp_init_body()
2352 cbp->dyn_tbd = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; in fxp_init_body()
2353 cbp->ext_rfa = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; in fxp_init_body()
2354 cbp->mediatype = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1; in fxp_init_body()
2355 cbp->csma_dis = 0; /* (don't) disable link */ in fxp_init_body()
2356 cbp->tcp_udp_cksum = ((sc->flags & FXP_FLAG_82559_RXCSUM) != 0 && in fxp_init_body()
2357 (if_getcapenable(ifp) & IFCAP_RXCSUM) != 0) ? 1 : 0; in fxp_init_body()
2358 cbp->vlan_tco = 0; /* (don't) enable vlan wakeup */ in fxp_init_body()
2359 cbp->link_wake_en = 0; /* (don't) assert PME# on link change */ in fxp_init_body()
2360 cbp->arp_wake_en = 0; /* (don't) assert PME# on arp */ in fxp_init_body()
2361 cbp->mc_wake_en = 0; /* (don't) enable PME# on mcmatch */ in fxp_init_body()
2364 cbp->loopback = 0; /* (don't) loopback */ in fxp_init_body()
2365 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ in fxp_init_body()
2366 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ in fxp_init_body()
2369 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ in fxp_init_body()
2370 cbp->wait_after_win = 0; /* (don't) enable modified backoff alg*/ in fxp_init_body()
2371 cbp->ignore_ul = 0; /* consider U/L bit in IA matching */ in fxp_init_body()
2372 cbp->crc16_en = 0; /* (don't) enable crc-16 algorithm */ in fxp_init_body()
2373 cbp->crscdt = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0; in fxp_init_body()
2377 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ in fxp_init_body()
2378 cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0; in fxp_init_body()
2379 cbp->ia_wake_en = 0; /* (don't) wake up on address match */ in fxp_init_body()
2380 cbp->magic_pkt_dis = sc->flags & FXP_FLAG_WOL ? 0 : 1; in fxp_init_body()
2381 cbp->force_fdx = 0; /* (don't) force full duplex */ in fxp_init_body()
2383 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ in fxp_init_body()
2385 cbp->gamla_rx = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; in fxp_init_body()
2386 cbp->vlan_strip_en = ((sc->flags & FXP_FLAG_EXT_RFA) != 0 && in fxp_init_body()
2387 (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) != 0) ? 1 : 0; in fxp_init_body()
2394 cbp->fc_delay_lsb = 0; in fxp_init_body()
2395 cbp->fc_delay_msb = 0x40; in fxp_init_body()
2397 cbp->tx_fc_dis = 0; in fxp_init_body()
2398 cbp->rx_fc_restop = 0; in fxp_init_body()
2399 cbp->rx_fc_restart = 0; in fxp_init_body()
2400 cbp->fc_filter = 0; in fxp_init_body()
2406 cbp->fc_delay_lsb = 0xff; in fxp_init_body()
2407 cbp->fc_delay_msb = 0xff; in fxp_init_body()
2411 IFM_ETH_TXPAUSE) != 0) in fxp_init_body()
2413 cbp->tx_fc_dis = 0; in fxp_init_body()
2418 IFM_ETH_RXPAUSE) != 0) { in fxp_init_body()
2424 cbp->rx_fc_restart = 0; in fxp_init_body()
2425 cbp->rx_fc_restop = 0; in fxp_init_body()
2444 cbp->ext_stats_dis = 0; in fxp_init_body()
2463 cb_ias->cb_status = 0; in fxp_init_body()
2465 cb_ias->link_addr = 0xffffffff; in fxp_init_body()
2490 for (i = 0; i < FXP_NTXCB; i++) { in fxp_init_body()
2501 htole32(FXP_TXCB_DMA_ADDR(sc, &tcbp[i].tbd[0])); in fxp_init_body()
2525 if (sc->miibus != NULL && setmedia != 0) in fxp_init_body()
2542 CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0); in fxp_init_body()
2554 return (0); in fxp_serial_ifmedia_upd()
2580 return (0); in fxp_ifmedia_upd()
2602 * Return 0 if successful, 1 for failure. A failure results in
2633 rfa->rfa_status = 0; in fxp_new_rfabuf()
2635 rfa->actual_size = 0; in fxp_new_rfabuf()
2645 le32enc(&rfa->link_addr, 0xffffffff); in fxp_new_rfabuf()
2646 le32enc(&rfa->rbd_addr, 0xffffffff); in fxp_new_rfabuf()
2666 return (0); in fxp_new_rfabuf()
2685 p_rfa->rfa_control = 0; in fxp_add_rfabuf()
2717 rfa->rfa_status = 0; in fxp_discard_rfabuf()
2719 rfa->actual_size = 0; in fxp_discard_rfabuf()
2727 le32enc(&rfa->link_addr, 0xffffffff); in fxp_discard_rfabuf()
2728 le32enc(&rfa->rbd_addr, 0xffffffff); in fxp_discard_rfabuf()
2744 while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 in fxp_miibus_readreg()
2748 if (count <= 0) in fxp_miibus_readreg()
2751 return (value & 0xffff); in fxp_miibus_readreg()
2762 (value & 0xffff)); in fxp_miibus_writereg()
2764 while ((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && in fxp_miibus_writereg()
2768 if (count <= 0) in fxp_miibus_writereg()
2770 return (0); in fxp_miibus_writereg()
2784 (if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0 || in fxp_miibus_statchg()
2793 sc->cu_resume_bug = 0; in fxp_miibus_statchg()
2800 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in fxp_miibus_statchg()
2801 fxp_init_body(sc, 0); in fxp_miibus_statchg()
2810 int flag, mask, error = 0, reinit; in fxp_ioctl()
2822 if (((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) && in fxp_ioctl()
2824 (IFF_PROMISC | IFF_ALLMULTI | IFF_LINK0)) != 0) { in fxp_ioctl()
2825 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in fxp_ioctl()
2826 fxp_init_body(sc, 0); in fxp_ioctl()
2827 } else if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) in fxp_ioctl()
2830 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) in fxp_ioctl()
2840 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) { in fxp_ioctl()
2841 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in fxp_ioctl()
2842 fxp_init_body(sc, 0); in fxp_ioctl()
2859 reinit = 0; in fxp_ioctl()
2870 if_setcapenablebit(ifp, IFCAP_POLLING, 0); in fxp_ioctl()
2876 CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0); in fxp_ioctl()
2877 if_setcapenablebit(ifp, 0, IFCAP_POLLING); in fxp_ioctl()
2883 if ((mask & IFCAP_TXCSUM) != 0 && in fxp_ioctl()
2884 (if_getcapabilities(ifp) & IFCAP_TXCSUM) != 0) { in fxp_ioctl()
2886 if ((if_getcapenable(ifp) & IFCAP_TXCSUM) != 0) in fxp_ioctl()
2887 if_sethwassistbits(ifp, FXP_CSUM_FEATURES, 0); in fxp_ioctl()
2889 if_sethwassistbits(ifp, 0, FXP_CSUM_FEATURES); in fxp_ioctl()
2891 if ((mask & IFCAP_RXCSUM) != 0 && in fxp_ioctl()
2892 (if_getcapabilities(ifp) & IFCAP_RXCSUM) != 0) { in fxp_ioctl()
2894 if ((sc->flags & FXP_FLAG_82559_RXCSUM) != 0) in fxp_ioctl()
2897 if ((mask & IFCAP_TSO4) != 0 && in fxp_ioctl()
2898 (if_getcapabilities(ifp) & IFCAP_TSO4) != 0) { in fxp_ioctl()
2900 if ((if_getcapenable(ifp) & IFCAP_TSO4) != 0) in fxp_ioctl()
2901 if_sethwassistbits(ifp, CSUM_TSO, 0); in fxp_ioctl()
2903 if_sethwassistbits(ifp, 0, CSUM_TSO); in fxp_ioctl()
2905 if ((mask & IFCAP_WOL_MAGIC) != 0 && in fxp_ioctl()
2906 (if_getcapabilities(ifp) & IFCAP_WOL_MAGIC) != 0) in fxp_ioctl()
2908 if ((mask & IFCAP_VLAN_MTU) != 0 && in fxp_ioctl()
2909 (if_getcapabilities(ifp) & IFCAP_VLAN_MTU) != 0) { in fxp_ioctl()
2919 if ((mask & IFCAP_VLAN_HWCSUM) != 0 && in fxp_ioctl()
2920 (if_getcapabilities(ifp) & IFCAP_VLAN_HWCSUM) != 0) in fxp_ioctl()
2922 if ((mask & IFCAP_VLAN_HWTSO) != 0 && in fxp_ioctl()
2923 (if_getcapabilities(ifp) & IFCAP_VLAN_HWTSO) != 0) in fxp_ioctl()
2925 if ((mask & IFCAP_VLAN_HWTAGGING) != 0 && in fxp_ioctl()
2926 (if_getcapabilities(ifp) & IFCAP_VLAN_HWTAGGING) != 0) { in fxp_ioctl()
2928 if ((if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) == 0) in fxp_ioctl()
2929 if_setcapenablebit(ifp, 0, IFCAP_VLAN_HWTSO | in fxp_ioctl()
2933 if (reinit > 0 && in fxp_ioctl()
2934 (if_getdrvflags(ifp) & IFF_DRV_RUNNING) != 0) { in fxp_ioctl()
2935 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); in fxp_ioctl()
2936 fxp_init_body(sc, 0); in fxp_ioctl()
2970 if ((if_getflags(ifp) & IFF_ALLMULTI) == 0) { in fxp_mc_addrs()
2971 mcsp->mc_cnt = 0; in fxp_mc_addrs()
2974 if_setflagbits(ifp, IFF_ALLMULTI, 0); in fxp_mc_addrs()
2975 mcsp->mc_cnt = 0; in fxp_mc_addrs()
3002 mcsp->cb_status = 0; in fxp_mc_setup()
3004 mcsp->link_addr = 0xffffffff; in fxp_mc_setup()
3015 if (count == 0) { in fxp_mc_setup()
3049 { FXP_REV_82558_A4, UCODE(fxp_ucode_d101a), D101_CPUSAVER_DWORD, 0 },
3050 { FXP_REV_82558_B0, UCODE(fxp_ucode_d101b0), D101_CPUSAVER_DWORD, 0 },
3063 { 0, NULL, 0, 0, 0 }
3082 cbp->cb_status = 0; in fxp_load_ucode()
3084 cbp->link_addr = 0xffffffff; /* (no) next command */ in fxp_load_ucode()
3085 for (i = 0; i < uc->length; i++) in fxp_load_ucode()
3106 uc->bundle_max_offset == 0 ? 0 : sc->tunable_bundle_max); in fxp_load_ucode()
3112 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
3127 &sc->tunable_int_delay, 0, sysctl_hw_fxp_int_delay, "I", in fxp_sysctl_node()
3131 &sc->tunable_bundle_max, 0, sysctl_hw_fxp_bundle_max, "I", in fxp_sysctl_node()
3133 SYSCTL_ADD_INT(ctx, child,OID_AUTO, "rnr", CTLFLAG_RD, &sc->rnr, 0, in fxp_sysctl_node()
3145 sc->rnr = 0; in fxp_sysctl_node()
3218 error = sysctl_handle_int(oidp, &value, 0, req); in sysctl_int_range()
3224 return (0); in sysctl_int_range()
3242 return (sysctl_int_range(oidp, arg1, arg2, req, 1, 0xffff)); in sysctl_hw_fxp_bundle_max()