858 fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
875 	if (&sc->atrq == dbch) {
877 	} else if (&sc->atrs == dbch) {
883 	if (dbch->flags & FWOHCI_DBCH_FULL)
886 	db_tr = dbch->top;
888 	xfer = STAILQ_FIRST(&dbch->xferq.q);
893 	if (dbch->xferq.queued == 0) {
897 	STAILQ_REMOVE_HEAD(&dbch->xferq.q, link);
934 	if (&sc->atrs == dbch) {
952 			err = bus_dmamap_load(dbch->dmat, db_tr->dma_map,
958 			err = bus_dmamap_load_mbuf(dbch->dmat, db_tr->dma_map,
983 		bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
1005 	if (dbch->pdb_tr != NULL) {
1006 		LAST_DB(dbch->pdb_tr, db);
1009 	dbch->xferq.queued++;
1010 	dbch->pdb_tr = db_tr;
1012 	if (db_tr != dbch->bottom) {
1016 		dbch->flags |= FWOHCI_DBCH_FULL;
1020 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1021 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1023 	if (dbch->xferq.flag & FWXFERQ_RUNNING) {
1029 		OWRITE(sc, OHCI_DMACMD(off), dbch->top->bus_addr | fsegment);
1031 		dbch->xferq.flag |= FWXFERQ_RUNNING;
1034 	dbch->top = db_tr;
1059 fwohci_txd(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1070 	if (&sc->atrq == dbch) {
1073 	} else if (&sc->atrs == dbch) {
1080 	tr = dbch->bottom;
1082 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTREAD);
1083 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTWRITE);
1084 	while (dbch->xferq.queued > 0) {
1092 		bus_dmamap_sync(dbch->dmat, tr->dma_map,
1094 		bus_dmamap_unload(dbch->dmat, tr->dma_map);
1168 		dbch->xferq.queued--;
1174 		dbch->bottom = tr;
1175 		if (dbch->bottom == dbch->top) {
1177 			if (firewire_debug && dbch->xferq.queued > 0)
1183 	if ((dbch->flags & FWOHCI_DBCH_FULL) && packets > 0) {
1185 		dbch->flags &= ~FWOHCI_DBCH_FULL;
1187 		fwohci_start(sc, dbch);
1194 fwohci_db_free(struct fwohci_dbch *dbch)  argument
1199 	if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1202 	for (db_tr = STAILQ_FIRST(&dbch->db_trq), idb = 0; idb < dbch->ndb;
1204 		if ((dbch->xferq.flag & FWXFERQ_EXTBUF) == 0 &&
1206 			fwdma_free_size(dbch->dmat, db_tr->dma_map,
1207 					db_tr->buf, dbch->xferq.psize);
1210 			bus_dmamap_destroy(dbch->dmat, db_tr->dma_map);
1212 	dbch->ndb = 0;
1213 	db_tr = STAILQ_FIRST(&dbch->db_trq);
1214 	fwdma_free_multiseg(dbch->am);
1216 	STAILQ_INIT(&dbch->db_trq);
1217 	dbch->flags &= ~FWOHCI_DBCH_INIT;
1221 fwohci_db_init(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1226 	if ((dbch->flags & FWOHCI_DBCH_INIT) != 0)
1236 			/*maxsize*/ dbch->xferq.psize,
1237 			/*nsegments*/ dbch->ndesc > 3 ? dbch->ndesc - 2 : 1,
1242 			&dbch->dmat))
1247 	STAILQ_INIT(&dbch->db_trq);
1249 		malloc(sizeof(struct fwohcidb_tr) * dbch->ndb,
1253 	dbch->am = fwdma_malloc_multiseg(&sc->fc, sizeof(struct fwohcidb),
1254 		DB_SIZE(dbch), dbch->ndb, BUS_DMA_WAITOK);
1255 	if (dbch->am == NULL) {
1261 	for (idb = 0; idb < dbch->ndb; idb++) {
1263 		db_tr->db = (struct fwohcidb *)fwdma_v_addr(dbch->am, idb);
1264 		db_tr->bus_addr = fwdma_bus_addr(dbch->am, idb);
1268 		if (bus_dmamap_create(dbch->dmat, 0, &db_tr->dma_map) != 0) {
1270 			dbch->flags = FWOHCI_DBCH_INIT; /* XXX fake */
1271 			fwohci_db_free(dbch);
1274 		STAILQ_INSERT_TAIL(&dbch->db_trq, db_tr, link);
1275 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1276 			if (idb % dbch->xferq.bnpacket == 0)
1277 				dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket
1279 			if ((idb + 1) % dbch->xferq.bnpacket == 0)
1280 				dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket
1285 	STAILQ_LAST(&dbch->db_trq, fwohcidb_tr,link)->link.stqe_next
1286 			= STAILQ_FIRST(&dbch->db_trq);
1288 	dbch->xferq.queued = 0;
1289 	dbch->pdb_tr = NULL;
1290 	dbch->top = STAILQ_FIRST(&dbch->db_trq);
1291 	dbch->bottom = dbch->top;
1292 	dbch->flags = FWOHCI_DBCH_INIT;
1336 fwohci_tx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1344 	if (!(dbch->xferq.flag & FWXFERQ_EXTBUF)) {
1348 	z = dbch->ndesc;
1350 		if (&sc->it[dmach] == dbch) {
1359 	if (dbch->xferq.flag & FWXFERQ_RUNNING)
1361 	dbch->xferq.flag |= FWXFERQ_RUNNING;
1362 	for (i = 0, dbch->bottom = dbch->top; i < (dbch->ndb - 1); i++) {
1363 		dbch->bottom = STAILQ_NEXT(dbch->bottom, link);
1365 	db_tr = dbch->top;
1366 	for (idb = 0; idb < dbch->ndb; idb++) {
1367 		fwohci_add_tx_buf(dbch, db_tr, idb);
1376 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1377 			if (((idb + 1) % dbch->xferq.bnpacket) == 0) {
1390 		dbch->bottom->db[dbch->bottom->dbcnt - 1].db.desc.depend, 0xf);
1395 fwohci_rx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1403 	z = dbch->ndesc;
1404 	if (&sc->arrq == dbch) {
1406 	} else if (&sc->arrs == dbch) {
1410 			if (&sc->ir[dmach] == dbch) {
1420 	if (dbch->xferq.flag & FWXFERQ_STREAM) {
1421 		if (dbch->xferq.flag & FWXFERQ_RUNNING)
1424 		if (dbch->xferq.flag & FWXFERQ_RUNNING) {
1429 	dbch->xferq.flag |= FWXFERQ_RUNNING;
1430 	dbch->top = STAILQ_FIRST(&dbch->db_trq);
1431 	for (i = 0, dbch->bottom = dbch->top; i < (dbch->ndb - 1); i++) {
1432 		dbch->bottom = STAILQ_NEXT(dbch->bottom, link);
1434 	db_tr = dbch->top;
1435 	for (idb = 0; idb < dbch->ndb; idb++) {
1436 		fwohci_add_rx_buf(dbch, db_tr, idb, &sc->dummy_dma);
1443 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1444 			if (((idb + 1) % dbch->xferq.bnpacket) == 0) {
1456 		dbch->bottom->db[db_tr->dbcnt - 1].db.desc.depend, 0xf);
1457 	dbch->buf_offset = 0;
1458 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1459 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1460 	if (dbch->xferq.flag & FWXFERQ_STREAM) {
1463 		OWRITE(sc, OHCI_DMACMD(off), dbch->top->bus_addr | z);
1505 	struct fwohci_dbch *dbch;  local
1511 	dbch = &sc->it[dmach];
1512 	it = &dbch->xferq;
1514 	if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) {
1515 		dbch->ndb = it->bnpacket * it->bnchunk;
1516 		dbch->ndesc = 3;
1517 		fwohci_db_init(sc, dbch);
1518 		if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1521 		err = fwohci_tx_enable(sc, dbch);
1526 	ldesc = dbch->ndesc - 1;
1545 				(chunk->start))->bus_addr | dbch->ndesc;
1547 			FWOHCI_DMA_SET(db[0].db.desc.depend, dbch->ndesc);
1548 			FWOHCI_DMA_SET(db[ldesc].db.desc.depend, dbch->ndesc);
1556 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1557 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1576 		((struct fwohcidb_tr *)(first->start))->bus_addr | dbch->ndesc);
1625 	struct fwohci_dbch *dbch;  local
1630 	dbch = &sc->ir[dmach];
1631 	ir = &dbch->xferq;
1639 		dbch->ndb = ir->bnpacket * ir->bnchunk;
1640 		dbch->ndesc = 2;
1641 		fwohci_db_init(sc, dbch);
1642 		if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1644 		err = fwohci_rx_enable(sc, dbch);
1655 	ldesc = dbch->ndesc - 1;
1667 			err = bus_dmamap_load_mbuf(dbch->dmat, db_tr->dma_map,
1680 			FWOHCI_DMA_SET(db[ldesc].db.desc.depend, dbch->ndesc);
1688 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1689 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1708 							| dbch->ndesc);
1924 			struct fwohci_dbch *dbch;  local
1927 				dbch = &sc->ir[i];
1928 				if ((dbch->xferq.flag & FWXFERQ_OPEN) == 0) {
2291 	struct fwohci_dbch *dbch;  local
2304 		dbch = &sc->atrq;
2307 		dbch = &sc->atrs;
2310 		dbch = &sc->arrq;
2313 		dbch = &sc->arrs;
2316 		dbch = &sc->it[ch - ITX_CH];
2319 		dbch = &sc->ir[ch - IRX_CH];
2323 	if (dbch->ndb == 0) {
2327 	pp = dbch->top;
2331 	for (idb = 0; idb < dbch->ndb; idb++) {
2340 		for (jdb = 0; jdb < dbch->ndesc; jdb++) {
2366 		print_db(pp, prev, ch, dbch->ndesc);
2369 		print_db(cp, curr, ch, dbch->ndesc);
2372 		print_db(np, next, ch, dbch->ndesc);
2504 	struct fwohci_dbch *dbch;  local
2513 	dbch = &sc->it[dmach];
2521 	for (idb = 0; idb < dbch->xferq.bnpacket; idb++) {
2543 			= db[dbch->ndesc - 1].db.desc.depend
2544 			= STAILQ_NEXT(db_tr, link)->bus_addr | dbch->ndesc;
2546 		FWOHCI_DMA_SET(db[0].db.desc.depend, dbch->ndesc);
2547 		FWOHCI_DMA_SET(db[dbch->ndesc - 1].db.desc.depend, dbch->ndesc);
2554 	FWOHCI_DMA_CLEAR(db[dbch->ndesc - 1].db.desc.depend, 0xf);
2556 	db[dbch->ndesc - 1].db.desc.control |= OHCI_INTERRUPT_ALWAYS;
2569 fwohci_add_tx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,  argument
2576 	it = &dbch->xferq;
2601 fwohci_add_rx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,  argument
2610 	ir = &dbch->xferq;
2611 	if (ir->buf == NULL && (dbch->xferq.flag & FWXFERQ_EXTBUF) == 0) {
2613 			db_tr->buf = fwdma_malloc_size(dbch->dmat,
2621 		bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
2707 fwohci_get_plen(struct fwohci_softc *sc, struct fwohci_dbch *dbch, struct fw_pkt *fp)  argument
2724 	if (r > dbch->xferq.psize) {
2734 fwohci_arcv_free_buf(struct fwohci_softc *sc, struct fwohci_dbch *dbch,  argument
2740 	FWOHCI_DMA_WRITE(db->db.desc.res, dbch->xferq.psize);
2741 	FWOHCI_DMA_SET(dbch->bottom->db[0].db.desc.depend, 1);
2742 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
2743 	dbch->bottom = db_tr;
2750 fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)  argument
2768 	if (&sc->arrq == dbch) {
2770 	} else if (&sc->arrs == dbch) {
2777 	db_tr = dbch->top;
2782 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTREAD);
2783 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTWRITE);
2793 		len = dbch->xferq.psize - resCount;
2795 		if (dbch->pdb_tr == NULL) {
2796 			len -= dbch->buf_offset;
2797 			ld += dbch->buf_offset;
2800 			bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
2805 			if (dbch->pdb_tr != NULL) {
2809 				offset = dbch->buf_offset;
2812 				buf = dbch->pdb_tr->buf + offset;
2813 				rlen = dbch->xferq.psize - offset;
2816 						rlen, dbch->buf_offset);
2817 				if (dbch->buf_offset < 0) {
2854 					dbch->pdb_tr = db_tr;
2855 					dbch->buf_offset = - dbch->buf_offset;
2867 			plen = fwohci_get_plen(sc, dbch, fp) - offset;
2878 					dbch->pdb_tr = db_tr;
2895 			dbch->buf_offset = ld - (uint8_t *)db_tr->buf;
2938 				    dbch->buf_offset, len,
2949 			if (dbch->pdb_tr != NULL) {
2950 				fwohci_arcv_free_buf(sc, dbch, dbch->pdb_tr,
2952 				dbch->pdb_tr = NULL;
2959 			if (dbch->pdb_tr == NULL) {
2960 				fwohci_arcv_free_buf(sc, dbch, db_tr, off, 1);
2961 				dbch->buf_offset = 0;
2963 				if (dbch->pdb_tr != db_tr)
2971 			dbch->top = db_tr;
2973 			dbch->buf_offset = dbch->xferq.psize - resCount;
2988 	dbch->pdb_tr = NULL;
2993 		fwohci_arcv_free_buf(sc, dbch, db_tr, off, 0);
2999 	dbch->top = db_tr;
3000 	dbch->buf_offset = dbch->xferq.psize - resCount;