Lines Matching +full:rx +full:- +full:watermark
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * Driver for Freescale Fast Ethernet Controller, found on imx-series SoCs among
42 * compatible = "fsl,imxNN-fec";
45 * phy-mode = "rgmii";
46 * phy-disable-preamble; // optional
48 * The second interrupt number is for IEEE-1588, and is not currently used; it
49 * need not be present. phy-mode must be one of: "mii", "rmii", "rgmii".
50 * There is also an optional property, phy-disable-preamble, which if present
52 * (and thus the busy-wait time) in half.
120 {"fsl,imx51-fec", FECTYPE_GENERIC},
121 {"fsl,imx53-fec", FECTYPE_IMX53},
122 {"fsl,imx6q-fec", FECTYPE_IMX6 | FECFLAG_RACC | FECFLAG_GBE },
123 {"fsl,imx6ul-fec", FECTYPE_IMX6 | FECFLAG_RACC },
124 {"fsl,imx6sx-fec", FECTYPE_IMX6 | FECFLAG_RACC | FECFLAG_GBE |
126 {"fsl,imx7d-fec", FECTYPE_IMX6 | FECFLAG_RACC | FECFLAG_GBE |
128 {"fsl,mvf600-fec", FECTYPE_MVF | FECFLAG_RACC },
129 {"fsl,mvf-fec", FECTYPE_MVF},
197 #define FFEC_LOCK(sc) mtx_lock(&(sc)->mtx)
198 #define FFEC_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
199 #define FFEC_LOCK_INIT(sc) mtx_init(&(sc)->mtx, \
200 device_get_nameunit((sc)->dev), MTX_NETWORK_LOCK, MTX_DEF)
201 #define FFEC_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx);
202 #define FFEC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED);
203 #define FFEC_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED);
214 return (bus_read_2(sc->mem_res, off));
221 bus_write_2(sc->mem_res, off, val);
228 return (bus_read_4(sc->mem_res, off));
235 bus_write_4(sc->mem_res, off, val);
242 return ((curidx == RX_DESC_COUNT - 1) ? 0 : curidx + 1);
249 return ((curidx == TX_DESC_COUNT - 1) ? 0 : curidx + 1);
270 switch (sc->fectype)
278 switch (sc->phy_conn_type)
310 for (timeout = 10000; timeout != 0; --timeout)
334 return (-1); /* All-ones is a symptom of bad mdio. */
359 return (-1);
381 mii = sc->mii_softc;
383 if (mii->mii_media_status & IFM_ACTIVE)
384 sc->link_is_up = true;
386 sc->link_is_up = false;
394 switch (sc->phy_conn_type) {
408 switch (IFM_SUBTYPE(mii->mii_media_active)) {
414 /* Not-FEC_ECR_SPEED + not-FEC_RCR_RMII_10T means 100TX */
420 sc->link_is_up = false;
423 sc->link_is_up = false;
425 IFM_SUBTYPE(mii->mii_media_active));
429 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
434 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FLOW) != 0)
450 mii = sc->mii_softc;
453 ifmr->ifm_active = mii->mii_media_active;
454 ifmr->ifm_status = mii->mii_media_status;
462 return (mii_mediachg(sc->mii_softc));
488 * to disable statistics collection, zero the regs, then re-enable.
490 if (sc->fectype == FECTYPE_IMX6 || sc->fectype == FECTYPE_MVF) {
523 ifp = sc->ifp;
526 * - FEC_IEEE_R_DROP is "dropped due to invalid start frame delimiter"
528 * - FEC_IEEE_R_MACERR is "no receive fifo space"; count as input drops.
562 ifp = sc->ifp;
572 if (sc->tx_watchdog_count > 0) {
573 if (--sc->tx_watchdog_count == 0) {
582 link_was_up = sc->link_is_up;
583 mii_tick(sc->mii_softc);
584 if (sc->link_is_up && !link_was_up)
588 callout_reset(&sc->ffec_callout, hz, ffec_tick, sc);
603 --sc->txcount;
606 ++sc->txcount;
612 * The hardware requires 32-bit physical addresses. We set up the dma
616 sc->txdesc_ring[idx].buf_paddr = (uint32_t)paddr;
617 sc->txdesc_ring[idx].flags_len = flags | len; /* Must be set last! */
633 error = bus_dmamap_load_mbuf_sg(sc->txbuf_tag, sc->txbuf_map[idx].map,
638 bus_dmamap_sync(sc->txbuf_tag, sc->txbuf_map[idx].map,
641 sc->txbuf_map[idx].mbuf = m;
657 if (!sc->link_is_up)
660 ifp = sc->ifp;
668 if (sc->txcount == (TX_DESC_COUNT-1)) {
675 if (ffec_setup_txbuf(sc, sc->tx_idx_head, &m) != 0) {
680 sc->tx_idx_head = next_txidx(sc, sc->tx_idx_head);
685 bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_PREWRITE);
687 bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_POSTWRITE);
688 sc->tx_watchdog_count = WATCHDOG_TIMEOUT_SECS;
713 bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_PREREAD);
714 bus_dmamap_sync(sc->txdesc_tag, sc->txdesc_map, BUS_DMASYNC_POSTREAD);
715 ifp = sc->ifp;
717 while (sc->tx_idx_tail != sc->tx_idx_head) {
718 desc = &sc->txdesc_ring[sc->tx_idx_tail];
719 if (desc->flags_len & FEC_TXDESC_READY)
722 bmap = &sc->txbuf_map[sc->tx_idx_tail];
723 bus_dmamap_sync(sc->txbuf_tag, bmap->map,
725 bus_dmamap_unload(sc->txbuf_tag, bmap->map);
726 m_freem(bmap->mbuf);
727 bmap->mbuf = NULL;
728 ffec_setup_txdesc(sc, sc->tx_idx_tail, 0, 0);
729 sc->tx_idx_tail = next_txidx(sc, sc->tx_idx_tail);
742 if (sc->tx_idx_tail == sc->tx_idx_head) {
743 sc->tx_watchdog_count = 0;
753 * The hardware requires 32-bit physical addresses. We set up the dma
758 sc->rxdesc_ring[idx].buf_paddr = (uint32_t)paddr;
759 sc->rxdesc_ring[idx].flags_len = FEC_RXDESC_EMPTY |
771 if (!(sc->fecflags & FECFLAG_RACC)) {
775 * buffer to allow the data to be re-aligned after receiving it
780 m_adj(m, roundup(ETHER_ALIGN, sc->rxbuf_align));
783 error = bus_dmamap_load_mbuf_sg(sc->rxbuf_tag, sc->rxbuf_map[idx].map,
789 bus_dmamap_sync(sc->rxbuf_tag, sc->rxbuf_map[idx].map,
792 sc->rxbuf_map[idx].mbuf = m;
805 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
819 * First try to get a new mbuf to plug into this slot in the rx ring.
824 if_inc_counter(sc->ifp, IFCOUNTER_IQDROPS, 1);
825 ffec_setup_rxdesc(sc, sc->rx_idx,
826 sc->rxdesc_ring[sc->rx_idx].buf_paddr);
832 bmap = &sc->rxbuf_map[sc->rx_idx];
833 len -= ETHER_CRC_LEN;
834 bus_dmamap_sync(sc->rxbuf_tag, bmap->map, BUS_DMASYNC_POSTREAD);
835 bus_dmamap_unload(sc->rxbuf_tag, bmap->map);
836 m = bmap->mbuf;
837 bmap->mbuf = NULL;
838 m->m_len = len;
839 m->m_pkthdr.len = len;
840 m->m_pkthdr.rcvif = sc->ifp;
843 * Align the protocol headers in the receive buffer on a 32-bit
845 * that doesn't support this feature, we have to copy-align the data.
850 * biggest header is, instead of the whole 1530ish-byte frame.
852 if (sc->fecflags & FECFLAG_RACC) {
853 m->m_data = mtod(m, uint8_t *) + 2;
856 dst = src - ETHER_ALIGN;
858 m->m_data = dst;
860 if_input(sc->ifp, m);
864 if ((error = ffec_setup_rxbuf(sc, sc->rx_idx, newmbuf)) != 0) {
865 device_printf(sc->dev, "ffec_setup_rxbuf error %d\n", error);
866 /* XXX Now what? We've got a hole in the rx ring. */
881 bus_dmamap_sync(sc->rxdesc_tag, sc->rxdesc_map, BUS_DMASYNC_PREREAD);
882 bus_dmamap_sync(sc->rxdesc_tag, sc->rxdesc_map, BUS_DMASYNC_POSTREAD);
885 desc = &sc->rxdesc_ring[sc->rx_idx];
886 if (desc->flags_len & FEC_RXDESC_EMPTY)
889 len = (desc->flags_len & FEC_RXDESC_LEN_MASK);
894 ffec_setup_rxdesc(sc, sc->rx_idx,
895 sc->rxdesc_ring[sc->rx_idx].buf_paddr);
896 } else if ((desc->flags_len & FEC_RXDESC_L) == 0) {
906 device_printf(sc->dev,
908 ffec_setup_rxdesc(sc, sc->rx_idx,
909 sc->rxdesc_ring[sc->rx_idx].buf_paddr);
910 } else if (desc->flags_len & FEC_RXDESC_ERROR_BITS) {
915 * same mbuf, which is still dma-mapped, by resetting
916 * the rx descriptor.
918 ffec_setup_rxdesc(sc, sc->rx_idx,
919 sc->rxdesc_ring[sc->rx_idx].buf_paddr);
926 sc->rx_idx = next_rxidx(sc, sc->rx_idx);
930 bus_dmamap_sync(sc->rxdesc_tag, sc->rxdesc_map, BUS_DMASYNC_PREWRITE);
932 bus_dmamap_sync(sc->rxdesc_tag, sc->rxdesc_map, BUS_DMASYNC_POSTWRITE);
943 * something non-zero there, assume the bootloader did the right thing
947 * 'bsd' + random 24 low-order bits. 'b' is 0x62, which has the locally
970 device_printf(sc->dev,
999 ifp = sc->ifp;
1047 ifp = sc->ifp;
1049 sc->tx_watchdog_count = 0;
1060 * Stop the media-check callout. Do not use callout_drain() because
1066 callout_stop(&sc->ffec_callout);
1075 idx = sc->tx_idx_tail;
1076 while (idx != sc->tx_idx_head) {
1077 desc = &sc->txdesc_ring[idx];
1078 bmap = &sc->txbuf_map[idx];
1079 if (desc->buf_paddr != 0) {
1080 bus_dmamap_unload(sc->txbuf_tag, bmap->map);
1081 m_freem(bmap->mbuf);
1082 bmap->mbuf = NULL;
1095 desc = &sc->rxdesc_ring[idx];
1096 ffec_setup_rxdesc(sc, idx, desc->buf_paddr);
1103 if_t ifp = sc->ifp;
1114 * We start with a MCLBYTES-sized cluster, but we have to offset into
1115 * the buffer by ETHER_ALIGN to make room for post-receive re-alignment,
1125 maxbuf = MCLBYTES - roundup(ETHER_ALIGN, sc->rxbuf_align);
1141 * TFWR - Transmit FIFO watermark register.
1143 * Set the transmit fifo watermark register to "store and forward" mode
1146 * supports STRFWD and when that bit is set, the watermark level in the
1152 /* RCR - Receive control register.
1154 * Set max frame length + clean out anything left from u-boot.
1159 * TCR - Transmit control register.
1161 * Clean out anything left from u-boot. Any necessary values are set in
1167 * OPD - Opcode/pause duration.
1169 * XXX These magic numbers come from u-boot.
1174 * FRSR - Fifo receive start register.
1177 * hardware. The u-boot code sets this to a non-default value that's 32
1183 * MRBR - Max RX buffer size.
1188 * receive loop in the hardware, where every rx descriptor in the ring
1192 * the EN1588 flag seems to be the "enable new stuff" vs. "be legacy-
1198 * FTRL - Frame truncation length.
1211 sc->rx_idx = 0;
1212 sc->tx_idx_head = sc->tx_idx_tail = 0;
1213 sc->txcount = 0;
1214 WR4(sc, FEC_RDSR_REG, sc->rxdesc_ring_paddr);
1215 WR4(sc, FEC_TDSR_REG, sc->txdesc_ring_paddr);
1218 * EIM - interrupt mask register.
1227 * MIBC - MIB control (hardware stats); clear all statistics regs, then
1235 if (sc->fecflags & FECFLAG_RACC) {
1237 * RACC - Receive Accelerator Function Configuration.
1244 * ECR - Ethernet control register.
1247 * we're running on little-endian hardware, also set the flag for byte-
1249 * hardware, but it can be safely set -- the bit position it occupies
1265 mii_mediachg(sc->mii_softc);
1266 callout_reset(&sc->ffec_callout, hz, ffec_tick, sc);
1317 device_printf(sc->dev,
1344 if ((if_getflags(ifp) ^ sc->if_flags) &
1348 if (!sc->is_detaching)
1355 sc->if_flags = if_getflags(ifp);
1370 mii = sc->mii_softc;
1371 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, cmd);
1375 mask = if_getcapenable(ifp) ^ ifr->ifr_reqcap;
1404 if (sc->is_attached) {
1406 sc->is_detaching = true;
1409 callout_drain(&sc->ffec_callout);
1410 ether_ifdetach(sc->ifp);
1415 /* Clean up RX DMA resources and free mbufs. */
1417 if ((map = sc->rxbuf_map[idx].map) != NULL) {
1418 bus_dmamap_unload(sc->rxbuf_tag, map);
1419 bus_dmamap_destroy(sc->rxbuf_tag, map);
1420 m_freem(sc->rxbuf_map[idx].mbuf);
1423 if (sc->rxbuf_tag != NULL)
1424 bus_dma_tag_destroy(sc->rxbuf_tag);
1425 if (sc->rxdesc_map != NULL) {
1426 bus_dmamap_unload(sc->rxdesc_tag, sc->rxdesc_map);
1427 bus_dmamem_free(sc->rxdesc_tag, sc->rxdesc_ring,
1428 sc->rxdesc_map);
1430 if (sc->rxdesc_tag != NULL)
1431 bus_dma_tag_destroy(sc->rxdesc_tag);
1435 if ((map = sc->txbuf_map[idx].map) != NULL) {
1437 bus_dmamap_destroy(sc->txbuf_tag, map);
1440 if (sc->txbuf_tag != NULL)
1441 bus_dma_tag_destroy(sc->txbuf_tag);
1442 if (sc->txdesc_map != NULL) {
1443 bus_dmamap_unload(sc->txdesc_tag, sc->txdesc_map);
1444 bus_dmamem_free(sc->txdesc_tag, sc->txdesc_ring,
1445 sc->txdesc_map);
1447 if (sc->txdesc_tag != NULL)
1448 bus_dma_tag_destroy(sc->txdesc_tag);
1452 if (sc->intr_cookie[irq] != NULL) {
1453 bus_teardown_intr(dev, sc->irq_res[irq],
1454 sc->intr_cookie[irq]);
1457 bus_release_resources(dev, irq_res_spec, sc->irq_res);
1459 if (sc->mem_res != NULL)
1460 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
1480 sc->dev = dev;
1488 typeflags = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
1489 sc->fectype = (uint8_t)(typeflags & FECTYPE_MASK);
1490 sc->fecflags = (uint32_t)(typeflags & ~FECTYPE_MASK);
1492 if (sc->fecflags & FECFLAG_AVB) {
1493 sc->rxbuf_align = 64;
1494 sc->txbuf_align = 1;
1496 sc->rxbuf_align = 16;
1497 sc->txbuf_align = 16;
1504 if ((ofw_node = ofw_bus_get_node(dev)) == -1) {
1509 sc->phy_conn_type = mii_fdt_get_contype(ofw_node);
1510 if (sc->phy_conn_type == MII_CONTYPE_UNKNOWN) {
1511 device_printf(sc->dev, "No valid 'phy-mode' "
1517 callout_init_mtx(&sc->ffec_callout, &sc->mtx, 0);
1521 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
1523 if (sc->mem_res == NULL) {
1529 error = bus_alloc_resources(dev, irq_res_spec, sc->irq_res);
1548 &sc->txdesc_tag);
1550 device_printf(sc->dev,
1555 error = bus_dmamem_alloc(sc->txdesc_tag, (void**)&sc->txdesc_ring,
1556 BUS_DMA_COHERENT | BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->txdesc_map);
1558 device_printf(sc->dev,
1563 error = bus_dmamap_load(sc->txdesc_tag, sc->txdesc_map, sc->txdesc_ring,
1564 TX_DESC_SIZE, ffec_get1paddr, &sc->txdesc_ring_paddr, 0);
1566 device_printf(sc->dev,
1573 sc->txbuf_align, 0, /* alignment, boundary */
1581 &sc->txbuf_tag);
1583 device_printf(sc->dev,
1589 error = bus_dmamap_create(sc->txbuf_tag, 0,
1590 &sc->txbuf_map[idx].map);
1592 device_printf(sc->dev,
1600 * Set up RX descriptor ring, descriptors, dma maps, and mbufs.
1612 &sc->rxdesc_tag);
1614 device_printf(sc->dev,
1615 "could not create RX ring DMA tag.\n");
1619 error = bus_dmamem_alloc(sc->rxdesc_tag, (void **)&sc->rxdesc_ring,
1620 BUS_DMA_COHERENT | BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->rxdesc_map);
1622 device_printf(sc->dev,
1623 "could not allocate RX descriptor ring.\n");
1627 error = bus_dmamap_load(sc->rxdesc_tag, sc->rxdesc_map, sc->rxdesc_ring,
1628 RX_DESC_SIZE, ffec_get1paddr, &sc->rxdesc_ring_paddr, 0);
1630 device_printf(sc->dev,
1631 "could not load RX descriptor ring map.\n");
1645 &sc->rxbuf_tag);
1647 device_printf(sc->dev,
1648 "could not create RX buf DMA tag.\n");
1653 error = bus_dmamap_create(sc->rxbuf_tag, 0,
1654 &sc->rxbuf_map[idx].map);
1656 device_printf(sc->dev,
1657 "could not create RX buffer DMA map.\n");
1666 device_printf(sc->dev,
1667 "could not create new RX buffer.\n");
1681 * hardware to complete any in-progress transfers (appending a bad CRC
1686 if (sc->fecflags & FECFLAG_AVB)
1693 if (sc->irq_res[irq] != NULL) {
1694 error = bus_setup_intr(dev, sc->irq_res[irq],
1696 &sc->intr_cookie[irq]);
1711 * XXX - Revisit this...
1728 * speed, then we need a platform-independent get-clock-freq API.
1731 if (OF_hasprop(ofw_node, "phy-disable-preamble")) {
1739 sc->ifp = ifp = if_alloc(IFT_ETHER);
1749 if_setsendqlen(ifp, TX_DESC_COUNT - 1);
1754 if_setlinkmib(ifp, &sc->mibdata);
1755 if_setlinkmiblen(ifp, sizeof(sc->mibdata));
1765 error = mii_attach(dev, &sc->miibus, ifp, ffec_media_change,
1767 (sc->fecflags & FECTYPE_MVF) ? MIIF_FORCEANEG : 0);
1772 sc->mii_softc = device_get_softc(sc->miibus);
1776 sc->is_attached = true;
1795 fectype = ofw_bus_search_compatible(dev, compat_data)->ocd_data;