Lines Matching refs:GDCIDX

1677 	outb(GDCIDX, 0x04); buf[2] = inb(GDCREG);  in set_font_mode()
1678 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); in set_font_mode()
1679 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); in set_font_mode()
1711 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); in set_font_mode()
1712 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); in set_font_mode()
1713 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); in set_font_mode()
1723 outw(GDCIDX, 0x0204); in set_font_mode()
1724 outw(GDCIDX, 0x0005); in set_font_mode()
1725 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ in set_font_mode()
1753 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); in set_normal_mode()
1754 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); in set_normal_mode()
1756 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); in set_normal_mode()
1758 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); in set_normal_mode()
1769 outw(GDCIDX, 0x0004 | (buf[2] << 8)); in set_normal_mode()
1770 outw(GDCIDX, 0x0005 | (buf[3] << 8)); in set_normal_mode()
1772 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); in set_normal_mode()
1774 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); in set_normal_mode()
2141 outb(GDCIDX, i); in vga_save_state()
2219 outb(GDCIDX, i); in vga_load_state()
2496 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ in planar_fill()
2497 outw(GDCIDX, 0x0003); /* data rotate/function select */ in planar_fill()
2498 outw(GDCIDX, 0x0f01); /* set/reset enable */ in planar_fill()
2499 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill()
2500 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ in planar_fill()
2510 outw(GDCIDX, 0x0000); /* set/reset */ in planar_fill()
2511 outw(GDCIDX, 0x0001); /* set/reset enable */ in planar_fill()
2591 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ in planar_fill_rect()
2592 outw(GDCIDX, 0x0003); /* data rotate/function select */ in planar_fill_rect()
2593 outw(GDCIDX, 0x0f01); /* set/reset enable */ in planar_fill_rect()
2594 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill_rect()
2595 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ in planar_fill_rect()
2608 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); in planar_fill_rect()
2617 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill_rect()
2631 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); in planar_fill_rect()
2639 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill_rect()
2645 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill_rect()
2646 outw(GDCIDX, 0x0000); /* set/reset */ in planar_fill_rect()
2647 outw(GDCIDX, 0x0001); /* set/reset enable */ in planar_fill_rect()