Lines Matching +full:0 +full:x4a8
37 #define FB_DEBUG 0
65 #define VGA_DEBUG 0
82 return 0; in vga_probe_unit()
87 return 0; in vga_probe_unit()
136 #define RTC_EQUIPMENT 0x14
145 #define V_STATE_SIG 0x736f6962
151 #define DCC_MONO 0
165 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC,
167 0, 0, 0, 0, 7, 0, },
169 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC,
171 0, 0, 0, 0, 3, 0, },
173 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC,
175 0, 0, 0, 0, 3, 0, },
177 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC,
179 0, 0, 0, 0, 7, 0, },
181 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC,
183 0, 0, 0, 0, 3, 0, },
185 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC,
187 0, 0, 0, 0, 3, 0, },
191 static int biosadapters = 0;
196 #if 0
272 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
274 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
276 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
278 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
281 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
283 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
285 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
287 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
290 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
291 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1,
292 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
294 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
296 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1,
297 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
300 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
302 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
304 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1,
305 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
307 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
308 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1,
309 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
311 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
312 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1,
313 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
315 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
320 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1,
321 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
323 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
324 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1,
325 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
327 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
328 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1,
329 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
331 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
332 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1,
333 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
335 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
336 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1,
337 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
339 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT },
344 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
346 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
348 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA },
351 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
354 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
357 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 ,
360 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
363 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
366 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
370 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
373 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 ,
376 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
379 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0,
397 #define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff))
416 #define COMP_IDENTICAL 0
459 (((pa) <= (u_long)0x1000 - (width)) \
460 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width)))
473 for (i = 0; i < biosadapters; ++i) { in vga_configure()
478 if (vid_register(&biosadapter[i]) < 0) in vga_configure()
498 for(i = 0; i < max; ++i) in map_mode_table()
515 for(i = 0; i < max; ++i) { in clear_mode_map()
556 for (i = 0; i < nitems(mode_map); ++i) { in map_mode_num()
609 for (i = 0; i < nitems(mode_map); ++i) { in map_gen_mode_num()
621 M_B40x25, M_C40x25, /* 0, 1 */ in map_bios_mode_num()
627 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ in map_bios_mode_num()
639 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ in map_bios_mode_num()
698 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) in get_mode_param()
726 if ((code < 0) || (code >= nitems(dcc))) { in fill_adapter_param()
747 writew(buf, 0xA55A); in verify_adapter()
748 if (readw(buf) != 0xA55A) in verify_adapter()
766 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); in verify_adapter()
782 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); in verify_adapter()
791 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); in verify_adapter()
798 return 0; in verify_adapter()
806 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; in update_adapter_info()
812 adp->va_window_orig = 0; in update_adapter_info()
840 adp->va_disp_start.x = 0; in update_adapter_info()
841 adp->va_disp_start.y = 0; in update_adapter_info()
853 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ in comp_adpregs()
854 {0x00}, {0x00}, /* page length */ in comp_adpregs()
855 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ in comp_adpregs()
856 {0xf3}, /* misc register */ in comp_adpregs()
857 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ in comp_adpregs()
858 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, in comp_adpregs()
859 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, in comp_adpregs()
860 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, in comp_adpregs()
861 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, in comp_adpregs()
862 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ in comp_adpregs()
863 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, in comp_adpregs()
864 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, in comp_adpregs()
865 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, in comp_adpregs()
866 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ in comp_adpregs()
867 {0xff}, {0xff}, {0xff}, {0xff}, in comp_adpregs()
875 for (i = 0; i < nitems(params); ++i) { in comp_adpregs()
876 if (params[i].mask == 0) /* don't care */ in comp_adpregs()
931 if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) { in probe_adapters()
933 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, in probe_adapters()
937 case 0: in probe_adapters()
939 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, in probe_adapters()
966 biosadapters = 0; in probe_adapters()
967 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { in probe_adapters()
979 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { in probe_adapters()
984 readb(BIOS_PADDRTOVADDR(0x449)); in probe_adapters()
997 if (biosadapters == 0) in probe_adapters()
1002 #if 0 /* we don't need these... */ in probe_adapters()
1013 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) in probe_adapters()
1016 return (biosadapters = 0); in probe_adapters()
1027 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); in probe_adapters()
1029 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); in probe_adapters()
1103 for (i = 0; i < nitems(bios_vmode); ++i) { in probe_adapters()
1110 for (i = 0; i < nitems(bios_vmode); ++i) { in probe_adapters()
1161 if (biosadapters > 0) { in probe_adapters()
1162 for (i = 0; i < biosadapters; ++i) { in probe_adapters()
1167 V_INFO_COLOR : 0); in probe_adapters()
1183 * needed. Bit 0 in sequencer register 1 is supposed control the width in probe_adapters()
1184 * (set = 8), but this is unreliable too. Trust that 0 in the sequencer in probe_adapters()
1191 for (i = 0; i < nitems(bios_vmode); ++i) { in probe_adapters()
1216 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); in probe_adapters()
1217 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) in probe_adapters()
1218 * ? 0 : V_ADP_COLOR; in probe_adapters()
1219 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); in probe_adapters()
1220 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); in probe_adapters()
1221 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); in probe_adapters()
1222 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); in probe_adapters()
1261 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ in set_line_length()
1263 outb(adp->va_crtc_addr, 0x13); in set_line_length()
1267 return 0; in set_line_length()
1283 roff = 0; in set_display_start()
1305 outb(adp->va_crtc_addr, 0xc); /* high */ in set_display_start()
1307 outb(adp->va_crtc_addr, 0xd); /* low */ in set_display_start()
1308 outb(adp->va_crtc_addr + 1, off & 0xff); in set_display_start()
1313 outb(ATC, 0x13 | 0x20); in set_display_start()
1316 outb(ATC, 0x20); in set_display_start()
1325 return 0; in set_display_start()
1335 while (size-- > 0) in fill()
1343 while (size-- > 0) { in filll_io()
1352 #if 0
1356 return 0;
1375 return 0; in vga_probe()
1390 if (vid_register(adp) < 0) in vga_init()
1395 (*vga_sub_configure)(0); in vga_init()
1397 return 0; in vga_init()
1435 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { in vga_get_info()
1442 return 0; in vga_get_info()
1451 * Fields filled with 0 are considered "don't care" fields and
1464 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { in vga_query_mode()
1468 if ((info->vi_width != 0) in vga_query_mode()
1471 if ((info->vi_height != 0) in vga_query_mode()
1474 if ((info->vi_cwidth != 0) in vga_query_mode()
1477 if ((info->vi_cheight != 0) in vga_query_mode()
1480 if ((info->vi_depth != 0) in vga_query_mode()
1483 if ((info->vi_planes != 0) in vga_query_mode()
1487 if ((info->vi_flags != 0) in vga_query_mode()
1494 return 0; in vga_query_mode()
1516 params->regs[10+0x0] = 0x6b; in set_width90()
1517 params->regs[10+0x1] = 0x59; in set_width90()
1518 params->regs[10+0x2] = 0x5a; in set_width90()
1519 params->regs[10+0x3] = 0x8e; in set_width90()
1520 params->regs[10+0x4] = 0x5e; in set_width90()
1521 params->regs[10+0x5] = 0x8a; in set_width90()
1522 params->regs[10+0x13] = 45; in set_width90()
1523 params->regs[35+0x13] = 0; in set_width90()
1556 params.regs[2] = 0x08; in vga_set_mode()
1557 params.regs[19] = 0x47; in vga_set_mode()
1566 params.regs[19] = 0x4f; in vga_set_mode()
1568 params.regs[9] |= 0xc0; in vga_set_mode()
1569 params.regs[16] = 0x08; in vga_set_mode()
1570 params.regs[17] = 0x3e; in vga_set_mode()
1571 params.regs[26] = 0xea; in vga_set_mode()
1572 params.regs[28] = 0xdf; in vga_set_mode()
1573 params.regs[31] = 0xe7; in vga_set_mode()
1574 params.regs[32] = 0x04; in vga_set_mode()
1616 params.regs[5-1+0x04] &= 0xf7; in vga_set_mode()
1617 params.regs[5-1+0x04] |= 0x04; in vga_set_mode()
1619 params.regs[10+0x14] &= 0xbf; in vga_set_mode()
1621 params.regs[10+0x17] |= 0x40; in vga_set_mode()
1623 params.regs[10+0x13] = 80; in vga_set_mode()
1625 params.regs[10+0x11] = 0x2c; in vga_set_mode()
1626 params.regs[10+0x06] = 0x0d; in vga_set_mode()
1627 params.regs[10+0x07] = 0x3e; in vga_set_mode()
1628 params.regs[10+0x10] = 0xea; in vga_set_mode()
1629 params.regs[10+0x11] = 0xac; in vga_set_mode()
1630 params.regs[10+0x12] = 0xdf; in vga_set_mode()
1631 params.regs[10+0x15] = 0xe7; in vga_set_mode()
1632 params.regs[10+0x16] = 0x06; in vga_set_mode()
1634 params.regs[9] = 0xe3; in vga_set_mode()
1657 return 0; in vga_set_mode()
1675 outb(TSIDX, 0x02); buf[0] = inb(TSREG); in set_font_mode()
1676 outb(TSIDX, 0x04); buf[1] = inb(TSREG); in set_font_mode()
1677 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); in set_font_mode()
1678 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); in set_font_mode()
1679 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); in set_font_mode()
1681 outb(ATC, 0x10); buf[5] = inb(ATC + 1); in set_font_mode()
1688 buf[0] = mp[5 + 0x02 - 1]; in set_font_mode()
1689 buf[1] = mp[5 + 0x04 - 1]; in set_font_mode()
1690 buf[2] = mp[55 + 0x04]; in set_font_mode()
1691 buf[3] = mp[55 + 0x05]; in set_font_mode()
1692 buf[4] = mp[55 + 0x06]; in set_font_mode()
1693 buf[5] = mp[35 + 0x10]; in set_font_mode()
1698 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); in set_font_mode()
1700 outb(ATC, 0x20); /* enable palette */ in set_font_mode()
1704 outb(TSIDX, 0x00); outb(TSREG, 0x01); in set_font_mode()
1706 outb(TSIDX, 0x02); outb(TSREG, 0x04); in set_font_mode()
1707 outb(TSIDX, 0x04); outb(TSREG, 0x07); in set_font_mode()
1709 outb(TSIDX, 0x00); outb(TSREG, 0x03); in set_font_mode()
1711 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); in set_font_mode()
1712 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); in set_font_mode()
1713 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); in set_font_mode()
1716 outw(TSIDX, 0x0100); in set_font_mode()
1718 outw(TSIDX, 0x0402); in set_font_mode()
1719 outw(TSIDX, 0x0704); in set_font_mode()
1721 outw(TSIDX, 0x0300); in set_font_mode()
1723 outw(GDCIDX, 0x0204); in set_font_mode()
1724 outw(GDCIDX, 0x0005); in set_font_mode()
1725 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ in set_font_mode()
1740 outb(ATC, 0x10); outb(ATC, buf[5]); in set_normal_mode()
1742 outb(ATC, 0x20); /* enable palette */ in set_normal_mode()
1746 outb(TSIDX, 0x00); outb(TSREG, 0x01); in set_normal_mode()
1748 outb(TSIDX, 0x02); outb(TSREG, buf[0]); in set_normal_mode()
1749 outb(TSIDX, 0x04); outb(TSREG, buf[1]); in set_normal_mode()
1751 outb(TSIDX, 0x00); outb(TSREG, 0x03); in set_normal_mode()
1753 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); in set_normal_mode()
1754 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); in set_normal_mode()
1756 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); in set_normal_mode()
1758 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); in set_normal_mode()
1762 outw(TSIDX, 0x0100); in set_normal_mode()
1764 outw(TSIDX, 0x0002 | (buf[0] << 8)); in set_normal_mode()
1765 outw(TSIDX, 0x0004 | (buf[1] << 8)); in set_normal_mode()
1767 outw(TSIDX, 0x0300); in set_normal_mode()
1769 outw(GDCIDX, 0x0004 | (buf[2] << 8)); in set_normal_mode()
1770 outw(GDCIDX, 0x0005 | (buf[3] << 8)); in set_normal_mode()
1772 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); in set_normal_mode()
1774 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); in set_normal_mode()
1798 u_char val = 0; in vga_save_font()
1816 if (page < 0 || page >= 8 || fontwidth != 8) in vga_save_font()
1818 segment = FONT_BUF + 0x4000*page; in vga_save_font()
1820 segment -= 0xe000; in vga_save_font()
1825 outb(TSIDX, 0x00); outb(TSREG, 0x01); in vga_save_font()
1826 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ in vga_save_font()
1827 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); in vga_save_font()
1828 outb(TSIDX, 0x00); outb(TSREG, 0x03); in vga_save_font()
1837 for (c = ch; count > 0; ++c, --count) { in vga_save_font()
1847 outb(TSIDX, 0x00); outb(TSREG, 0x01); in vga_save_font()
1848 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ in vga_save_font()
1849 outb(TSIDX, 0x00); outb(TSREG, 0x03); in vga_save_font()
1854 return 0; in vga_save_font()
1864 * the font page other than 0... XXX
1878 u_char val = 0; in vga_load_font()
1896 if (page < 0 || page >= 8 || fontwidth != 8) in vga_load_font()
1898 segment = FONT_BUF + 0x4000*page; in vga_load_font()
1900 segment -= 0xe000; in vga_load_font()
1905 outb(TSIDX, 0x00); outb(TSREG, 0x01); in vga_load_font()
1906 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ in vga_load_font()
1907 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); in vga_load_font()
1908 outb(TSIDX, 0x00); outb(TSREG, 0x03); in vga_load_font()
1917 for (c = ch; count > 0; ++c, --count) { in vga_load_font()
1927 outb(TSIDX, 0x00); outb(TSREG, 0x01); in vga_load_font()
1928 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ in vga_load_font()
1929 outb(TSIDX, 0x00); outb(TSREG, 0x03); in vga_load_font()
1934 return 0; in vga_load_font()
1944 * the font page other than 0... XXX
1952 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; in vga_show_font()
1956 if (page < 0 || page >= 8) in vga_show_font()
1960 outb(TSIDX, 0x03); outb(TSREG, cg[page]); in vga_show_font()
1963 return 0; in vga_show_font()
1987 outb(PALRADR, 0x00); in vga_save_palette()
1988 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; in vga_save_palette()
1989 for (i = 0; i < 256*3; ++i) in vga_save_palette()
1992 return 0; in vga_save_palette()
2005 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; in vga_save_palette2()
2006 for (i = 0; i < count; ++i) { in vga_save_palette2()
2012 return 0; in vga_save_palette2()
2029 outb(PIXMASK, 0xff); /* no pixelmask */ in vga_load_palette()
2030 outb(PALWADR, 0x00); in vga_load_palette()
2031 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; in vga_load_palette()
2032 for (i = 0; i < 256*3; ++i) in vga_load_palette()
2035 outb(ATC, 0x20); /* enable palette */ in vga_load_palette()
2036 return 0; in vga_load_palette()
2048 outb(PIXMASK, 0xff); /* no pixelmask */ in vga_load_palette2()
2050 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; in vga_load_palette2()
2051 for (i = 0; i < count; ++i) { in vga_load_palette2()
2057 outb(ATC, 0x20); /* enable palette */ in vga_load_palette2()
2058 return 0; in vga_load_palette2()
2076 outb(ATC, 0x31); outb(ATC, color & 0xff); in vga_set_border()
2079 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ in vga_set_border()
2086 return 0; in vga_set_border()
2106 if (size == 0) { in vga_save_state()
2108 prologue(adp, V_ADP_STATESAVE, 0); in vga_save_state()
2123 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ in vga_save_state()
2124 for (i = 0, j = 5; i < 4; i++) { in vga_save_state()
2129 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ in vga_save_state()
2131 for (i = 0, j = 10; i < 25; i++) { /* crtc */ in vga_save_state()
2135 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ in vga_save_state()
2140 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ in vga_save_state()
2145 outb(ATC, 0x20); /* enable palette */ in vga_save_state()
2150 if (vga_get_info(adp, adp->va_mode, &info) == 0) { in vga_save_state()
2152 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ in vga_save_state()
2155 buf[0] = info.vi_width; /* COLS */ in vga_save_state()
2161 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ in vga_save_state()
2162 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ in vga_save_state()
2163 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ in vga_save_state()
2164 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); in vga_save_state()
2165 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); in vga_save_state()
2168 return 0; in vga_save_state()
2200 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ in vga_load_state()
2201 for (i = 0; i < 4; ++i) { /* program sequencer */ in vga_load_state()
2206 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ in vga_load_state()
2207 outb(crtc_addr, 0x11); in vga_load_state()
2208 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); in vga_load_state()
2209 for (i = 0; i < 25; ++i) { /* program crtc */ in vga_load_state()
2214 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ in vga_load_state()
2218 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ in vga_load_state()
2223 outb(ATC, 0x20); /* enable palette */ in vga_load_state()
2228 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ in vga_load_state()
2229 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ in vga_load_state()
2230 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ in vga_load_state()
2231 #if 0 in vga_load_state()
2232 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); in vga_load_state()
2233 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); in vga_load_state()
2240 return 0; in vga_load_state()
2285 return 0; in vga_read_hw_cursor()
2316 outb(adp->va_crtc_addr + 1, off & 0x00ff); in vga_set_hw_cursor()
2319 return 0; in vga_set_hw_cursor()
2345 if (height <= 0) { in vga_set_hw_cursor_shape()
2350 outb(adp->va_crtc_addr + 1, 0); in vga_set_hw_cursor_shape()
2359 if (height <= 0) { in vga_set_hw_cursor_shape()
2364 outb(adp->va_crtc_addr + 1, 0); in vga_set_hw_cursor_shape()
2375 return 0; in vga_set_hw_cursor_shape()
2396 outb(TSIDX, 0x01); in vga_blank_display()
2398 outb(TSIDX, 0x01); in vga_blank_display()
2399 outb(TSREG, val | 0x20); in vga_blank_display()
2400 outb(adp->va_crtc_addr, 0x17); in vga_blank_display()
2402 outb(adp->va_crtc_addr + 1, val & ~0x80); in vga_blank_display()
2405 outb(TSIDX, 0x01); in vga_blank_display()
2407 outb(TSIDX, 0x01); in vga_blank_display()
2408 outb(TSREG, val | 0x20); in vga_blank_display()
2411 outb(TSIDX, 0x01); in vga_blank_display()
2413 outb(TSIDX, 0x01); in vga_blank_display()
2414 outb(TSREG, val & 0xDF); in vga_blank_display()
2415 outb(adp->va_crtc_addr, 0x17); in vga_blank_display()
2417 outb(adp->va_crtc_addr + 1, val | 0x80); in vga_blank_display()
2432 outb(adp->va_crtc_addr + 4, 0x25); in vga_blank_display()
2435 outb(adp->va_crtc_addr + 4, 0x2d); in vga_blank_display()
2446 outb(adp->va_crtc_addr + 4, 0x21); in vga_blank_display()
2449 outb(adp->va_crtc_addr + 4, 0x29); in vga_blank_display()
2458 return 0; in vga_blank_display()
2474 #if VGA_DEBUG > 0 in vga_mmap_buf()
2475 printf("vga_mmap_buf(): window:0x%jx, offset:0x%jx\n", in vga_mmap_buf()
2484 return 0; in vga_mmap_buf()
2496 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ in planar_fill()
2497 outw(GDCIDX, 0x0003); /* data rotate/function select */ in planar_fill()
2498 outw(GDCIDX, 0x0f01); /* set/reset enable */ in planar_fill()
2499 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill()
2500 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ in planar_fill()
2501 at = 0; in planar_fill()
2503 while (length > 0) { in planar_fill()
2510 outw(GDCIDX, 0x0000); /* set/reset */ in planar_fill()
2511 outw(GDCIDX, 0x0001); /* set/reset enable */ in planar_fill()
2521 at = 0; in packed_fill()
2523 while (length > 0) { in packed_fill()
2539 at = 0; in direct_fill()
2541 while (length > 0) { in direct_fill()
2568 planar_fill(adp, 0); in vga_clear()
2571 packed_fill(adp, 0); in vga_clear()
2574 direct_fill(adp, 0); in vga_clear()
2577 return 0; in vga_clear()
2591 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ in planar_fill_rect()
2592 outw(GDCIDX, 0x0003); /* data rotate/function select */ in planar_fill_rect()
2593 outw(GDCIDX, 0x0f01); /* set/reset enable */ in planar_fill_rect()
2594 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill_rect()
2595 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ in planar_fill_rect()
2599 while (cy > 0) { in planar_fill_rect()
2608 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); in planar_fill_rect()
2609 writeb(adp->va_window + offset, 0); in planar_fill_rect()
2613 offset = 0; in planar_fill_rect()
2617 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill_rect()
2619 while (bx > 0) { in planar_fill_rect()
2625 offset = 0; in planar_fill_rect()
2631 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); in planar_fill_rect()
2632 writeb(adp->va_window + offset, 0); in planar_fill_rect()
2635 offset = 0; in planar_fill_rect()
2639 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill_rect()
2645 outw(GDCIDX, 0xff08); /* bit mask */ in planar_fill_rect()
2646 outw(GDCIDX, 0x0000); /* set/reset */ in planar_fill_rect()
2647 outw(GDCIDX, 0x0001); /* set/reset enable */ in planar_fill_rect()
2662 while (cy > 0) { in packed_fill_rect()
2700 while (cy > 0) { in direct_fill_rect16()
2734 b[0] = val & 0x0000ff; in direct_fill_rect24()
2735 b[1] = (val >> 8) & 0x0000ff; in direct_fill_rect24()
2736 b[2] = (val >> 16) & 0x0000ff; in direct_fill_rect24()
2740 while (cy > 0) { in direct_fill_rect24()
2748 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { in direct_fill_rect24()
2755 j = 0; in direct_fill_rect24()
2782 while (cy > 0) { in direct_fill_rect32()
2831 return 0; in vga_fill_rect()
2859 if (count < 0 || base < 0 || count > 256 || base > 256 || in get_palette()
2871 if (error != 0) in get_palette()
2874 if (error != 0) in get_palette()
2877 if (error != 0) in get_palette()
2898 if (count < 0 || base < 0 || count > 256 || base > 256 || in set_palette()
2914 return (err ? ENODEV : 0); in set_palette()
2922 *(u_int *)arg = 0; in vga_dev_ioctl()
2923 return 0; in vga_dev_ioctl()
2932 ? ENODEV : 0); in vga_dev_ioctl()
2935 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); in vga_dev_ioctl()
2959 ((struct fbtype *)arg)->fb_cmsize = 0; in vga_dev_ioctl()
2963 return 0; in vga_dev_ioctl()
2989 for(i = 0; i < len;) { in dump_buffer()
2991 if ((++i % 16) == 0) in dump_buffer()
3017 printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", in vga_diag()
3018 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); in vga_diag()
3019 printf("vga: CRTC:0x%x, video option:0x%02x, ", in vga_diag()
3020 readw(BIOS_PADDRTOVADDR(0x463)), in vga_diag()
3021 readb(BIOS_PADDRTOVADDR(0x487))); in vga_diag()
3023 readb(BIOS_PADDRTOVADDR(0x44a)), in vga_diag()
3024 readb(BIOS_PADDRTOVADDR(0x484)) + 1, in vga_diag()
3025 readb(BIOS_PADDRTOVADDR(0x485))); in vga_diag()
3038 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { in vga_diag()
3052 return 0; in vga_diag()
3059 if (level <= 0) in vga_diag()
3060 return 0; in vga_diag()
3071 return 0; in vga_diag()
3075 return 0; in vga_diag()