Lines Matching refs:regs

77 	u_char		regs[1];  member
237 x86regs_t regs; in int10_set_mode() local
239 x86bios_init_regs(&regs); in int10_set_mode()
240 regs.R_AL = mode; in int10_set_mode()
242 x86bios_intr(&regs, 0x10); in int10_set_mode()
250 x86regs_t regs; in vesa_bios_post() local
286 x86bios_init_regs(&regs); in vesa_bios_post()
288 regs.R_AH = pci_get_bus(dev); in vesa_bios_post()
289 regs.R_AL = (pci_get_slot(dev) << 3) | in vesa_bios_post()
292 regs.R_DL = 0x80; in vesa_bios_post()
293 x86bios_call(&regs, X86BIOS_PHYSTOSEG(vesa_bios_offs + 3), in vesa_bios_post()
306 x86regs_t regs; in vesa_bios_get_mode() local
314 x86bios_init_regs(&regs); in vesa_bios_get_mode()
315 regs.R_AX = 0x4f01; in vesa_bios_get_mode()
316 regs.R_CX = mode; in vesa_bios_get_mode()
318 regs.R_ES = X86BIOS_PHYSTOSEG(offs); in vesa_bios_get_mode()
319 regs.R_DI = X86BIOS_PHYSTOOFF(offs); in vesa_bios_get_mode()
321 x86bios_intr(&regs, 0x10); in vesa_bios_get_mode()
323 if (regs.R_AX != 0x004f) { in vesa_bios_get_mode()
337 x86regs_t regs; in vesa_bios_set_mode() local
339 x86bios_init_regs(&regs); in vesa_bios_set_mode()
340 regs.R_AX = 0x4f02; in vesa_bios_set_mode()
341 regs.R_BX = mode; in vesa_bios_set_mode()
343 x86bios_intr(&regs, 0x10); in vesa_bios_set_mode()
345 return (regs.R_AX != 0x004f); in vesa_bios_set_mode()
352 x86regs_t regs;
354 x86bios_init_regs(&regs);
355 regs.R_AX = 0x4f08;
356 regs.R_BL = 1;
358 x86bios_intr(&regs, 0x10);
360 if (regs.R_AX != 0x004f)
363 return (regs.R_BH);
370 x86regs_t regs; in vesa_bios_set_dac() local
372 x86bios_init_regs(&regs); in vesa_bios_set_dac()
373 regs.R_AX = 0x4f08; in vesa_bios_set_dac()
375 regs.R_BH = bits; in vesa_bios_set_dac()
377 x86bios_intr(&regs, 0x10); in vesa_bios_set_dac()
379 if (regs.R_AX != 0x004f) in vesa_bios_set_dac()
382 return (regs.R_BH); in vesa_bios_set_dac()
388 x86regs_t regs; in vesa_bios_save_palette() local
391 x86bios_init_regs(&regs); in vesa_bios_save_palette()
392 regs.R_AX = 0x4f09; in vesa_bios_save_palette()
393 regs.R_BL = 1; in vesa_bios_save_palette()
394 regs.R_CX = colors; in vesa_bios_save_palette()
395 regs.R_DX = start; in vesa_bios_save_palette()
397 regs.R_ES = X86BIOS_PHYSTOSEG(vesa_palette_offs); in vesa_bios_save_palette()
398 regs.R_DI = X86BIOS_PHYSTOOFF(vesa_palette_offs); in vesa_bios_save_palette()
402 x86bios_intr(&regs, 0x10); in vesa_bios_save_palette()
403 if (regs.R_AX != 0x004f) { in vesa_bios_save_palette()
421 x86regs_t regs; in vesa_bios_save_palette2() local
424 x86bios_init_regs(&regs); in vesa_bios_save_palette2()
425 regs.R_AX = 0x4f09; in vesa_bios_save_palette2()
426 regs.R_BL = 1; in vesa_bios_save_palette2()
427 regs.R_CX = colors; in vesa_bios_save_palette2()
428 regs.R_DX = start; in vesa_bios_save_palette2()
430 regs.R_ES = X86BIOS_PHYSTOSEG(vesa_palette_offs); in vesa_bios_save_palette2()
431 regs.R_DI = X86BIOS_PHYSTOOFF(vesa_palette_offs); in vesa_bios_save_palette2()
435 x86bios_intr(&regs, 0x10); in vesa_bios_save_palette2()
436 if (regs.R_AX != 0x004f) { in vesa_bios_save_palette2()
453 x86regs_t regs; in vesa_bios_load_palette() local
456 x86bios_init_regs(&regs); in vesa_bios_load_palette()
457 regs.R_AX = 0x4f09; in vesa_bios_load_palette()
459 regs.R_CX = colors; in vesa_bios_load_palette()
460 regs.R_DX = start; in vesa_bios_load_palette()
462 regs.R_ES = X86BIOS_PHYSTOSEG(vesa_palette_offs); in vesa_bios_load_palette()
463 regs.R_DI = X86BIOS_PHYSTOOFF(vesa_palette_offs); in vesa_bios_load_palette()
473 x86bios_intr(&regs, 0x10); in vesa_bios_load_palette()
476 return (regs.R_AX != 0x004f); in vesa_bios_load_palette()
483 x86regs_t regs; in vesa_bios_load_palette2() local
486 x86bios_init_regs(&regs); in vesa_bios_load_palette2()
487 regs.R_AX = 0x4f09; in vesa_bios_load_palette2()
489 regs.R_CX = colors; in vesa_bios_load_palette2()
490 regs.R_DX = start; in vesa_bios_load_palette2()
492 regs.R_ES = X86BIOS_PHYSTOSEG(vesa_palette_offs); in vesa_bios_load_palette2()
493 regs.R_DI = X86BIOS_PHYSTOOFF(vesa_palette_offs); in vesa_bios_load_palette2()
503 x86bios_intr(&regs, 0x10); in vesa_bios_load_palette2()
506 return (regs.R_AX != 0x004f); in vesa_bios_load_palette2()
512 x86regs_t regs; in vesa_bios_state_buf_size() local
514 x86bios_init_regs(&regs); in vesa_bios_state_buf_size()
515 regs.R_AX = 0x4f04; in vesa_bios_state_buf_size()
517 regs.R_CX = state; in vesa_bios_state_buf_size()
519 x86bios_intr(&regs, 0x10); in vesa_bios_state_buf_size()
521 if (regs.R_AX != 0x004f) in vesa_bios_state_buf_size()
524 return (regs.R_BX * 64); in vesa_bios_state_buf_size()
530 x86regs_t regs; in vesa_bios_save_restore() local
535 x86bios_init_regs(&regs); in vesa_bios_save_restore()
536 regs.R_AX = 0x4f04; in vesa_bios_save_restore()
537 regs.R_DL = code; in vesa_bios_save_restore()
538 regs.R_CX = vesa_state; in vesa_bios_save_restore()
540 regs.R_ES = X86BIOS_PHYSTOSEG(vesa_state_buf_offs); in vesa_bios_save_restore()
541 regs.R_BX = X86BIOS_PHYSTOOFF(vesa_state_buf_offs); in vesa_bios_save_restore()
546 x86bios_intr(&regs, 0x10); in vesa_bios_save_restore()
547 if (regs.R_AX == 0x004f) in vesa_bios_save_restore()
552 x86bios_intr(&regs, 0x10); in vesa_bios_save_restore()
557 return (regs.R_AX != 0x004f); in vesa_bios_save_restore()
564 x86regs_t regs; in vesa_bios_get_line_length() local
566 x86bios_init_regs(&regs); in vesa_bios_get_line_length()
567 regs.R_AX = 0x4f06; in vesa_bios_get_line_length()
568 regs.R_BL = 1; in vesa_bios_get_line_length()
570 x86bios_intr(&regs, 0x10); in vesa_bios_get_line_length()
572 if (regs.R_AX != 0x004f) in vesa_bios_get_line_length()
575 return (regs.R_BX); in vesa_bios_get_line_length()
582 x86regs_t regs; in vesa_bios_set_line_length() local
584 x86bios_init_regs(&regs); in vesa_bios_set_line_length()
585 regs.R_AX = 0x4f06; in vesa_bios_set_line_length()
587 regs.R_CX = pixel; in vesa_bios_set_line_length()
589 x86bios_intr(&regs, 0x10); in vesa_bios_set_line_length()
592 printf("bx:%d, cx:%d, dx:%d\n", regs.R_BX, regs.R_CX, regs.R_DX); in vesa_bios_set_line_length()
594 if (regs.R_AX != 0x004f) in vesa_bios_set_line_length()
598 *bytes = regs.R_BX; in vesa_bios_set_line_length()
600 *lines = regs.R_DX; in vesa_bios_set_line_length()
609 x86regs_t regs;
611 x86bios_init_regs(&regs);
612 regs.R_AX = 0x4f07;
613 regs.R_BL = 1;
615 x86bios_intr(&regs, 0x10);
617 if (regs.R_AX != 0x004f)
620 *x = regs.R_CX;
621 *y = regs.R_DX;
630 x86regs_t regs; in vesa_bios_set_start() local
632 x86bios_init_regs(&regs); in vesa_bios_set_start()
633 regs.R_AX = 0x4f07; in vesa_bios_set_start()
634 regs.R_BL = 0x80; in vesa_bios_set_start()
635 regs.R_CX = x; in vesa_bios_set_start()
636 regs.R_DX = y; in vesa_bios_set_start()
638 x86bios_intr(&regs, 0x10); in vesa_bios_set_start()
640 return (regs.R_AX != 0x004f); in vesa_bios_set_start()
766 x86regs_t regs; in vesa_bios_init() local
820 x86bios_init_regs(&regs); in vesa_bios_init()
821 regs.R_AX = 0x4f00; in vesa_bios_init()
825 regs.R_ES = X86BIOS_PHYSTOSEG(offs); in vesa_bios_init()
826 regs.R_DI = X86BIOS_PHYSTOOFF(offs); in vesa_bios_init()
829 x86bios_intr(&regs, 0x10); in vesa_bios_init()
831 if (regs.R_AX != 0x004f || bcmp("VESA", vmbuf, 4) != 0) in vesa_bios_init()
1483 bsize = offsetof(adp_state_t, regs) + vesa_state_buf_size; in vesa_save_state()
1505 return (vesa_bios_save_restore(STATE_SAVE, ((adp_state_t *)p)->regs)); in vesa_save_state()
1537 return (vesa_bios_save_restore(STATE_LOAD, ((adp_state_t *)p)->regs)); in vesa_load_state()
1544 x86regs_t regs;
1546 x86bios_init_regs(&regs);
1547 regs.R_AX = 0x4f05;
1548 regs.R_BL = 0x10;
1550 x86bios_intr(&regs, 0x10);
1552 if (regs.R_AX != 0x004f)
1554 *offset = regs.DX * adp->va_window_gran;
1563 x86regs_t regs; in vesa_set_origin() local
1581 x86bios_init_regs(&regs); in vesa_set_origin()
1582 regs.R_AX = 0x4f05; in vesa_set_origin()
1583 regs.R_DX = offset / adp->va_window_gran; in vesa_set_origin()
1585 x86bios_intr(&regs, 0x10); in vesa_set_origin()
1587 if (regs.R_AX != 0x004f) in vesa_set_origin()
1590 x86bios_init_regs(&regs); in vesa_set_origin()
1591 regs.R_AX = 0x4f05; in vesa_set_origin()
1592 regs.R_BL = 1; in vesa_set_origin()
1593 regs.R_DX = offset / adp->va_window_gran; in vesa_set_origin()
1594 x86bios_intr(&regs, 0x10); in vesa_set_origin()