Lines Matching +full:24 +full:- +full:bit

1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 * Register manipulation macros that expect bit field defines
42 #define BIT(_m) (1UL << (_m)) macro
43 #define BITM(_count) ((1UL << (_count)) - 1)
59 /* DIR-615 E4 U-Boot */
80 #define AR8X16_MODE_LED_OPEN_EN (1u << 24)
95 #define AR8X16_REG_SW_MAC_ADDR1_BYTE0 BITS(24, 8)
96 #define AR8X16_REG_SW_MAC_ADDR1_BYTE0_S 24
147 #define AR8216_ATU_ACTIVE BIT(3)
150 #define AR8216_ATU_FULL_VIO BIT(12)
153 #define AR8216_ATU_ADDR4 BITS(24, 8)
154 #define AR8216_ATU_ADDR4_S 24
163 #define AR8216_ATU_ADDR0 BITS(24, 8)
164 #define AR8216_ATU_ADDR0_S 24
169 #define AR934X_ATU_CROSS_STATE_PORT_EN BIT(8)
170 #define AR934X_ATU_HASH_HIGH_ADDR BIT(9) /* Used for CPU_FUNC (get_next_valid) */
172 #define AR8216_ATU_CTRL2_AT_PRIORITY_EN BIT(12)
173 #define AR8216_ATU_CTRL2_MIRROR_EN BIT(13)
174 #define AR8216_ATU_CTRL2_SA_DROP_EN BIT(14)
175 #define AR934X_ATU_CTRL2_MAC_CLONE BIT(15)
179 * For at least the AR9340 -
181 * 1-7: dynamic, valid
184 #define AR8216_ATU_CTRL2_VLAN_LEAKY_EN BIT(24)
189 #define AR8216_ATU_CTRL2_REDIRECT2CPU BIT(25)
190 #define AR8216_ATU_CTRL2_COPY2CPU BIT(26)
195 #define AR8216_ATU_CTRL_AGE_EN BIT(17)
196 #define AR8216_ATU_CTRL_LEARN_CHANGE BIT(18)
197 #define AR8216_ATU_CTRL_ARP_EN BIT(20)
220 #define AR8X16_MIB_FUNC_SHIFT 24
299 #define AR8X16_PORT_RATE_LIM_IN_EN (1 << 24)
359 #define AR8X16_PORT_MASK_ALL ((1<<AR8X16_NUM_PORTS)-1)
402 #define AR8327_PAD_RGMII_RXCLK_DELAY_EN (1 << 24)
408 #define AR8327_POWER_ON_STRIP_LED_OPEN_EN (1 << 24)
448 #define AR8327_EEE_CTRL_DISABLE_PHY(_i) BIT(4 + (_i) * 2)
472 #define AR8327_ATU_DATA0_MAC_ADDR0 BITS(24, 8)
473 #define AR8327_ATU_DATA0_MAC_ADDR0_S 24
482 #define AR8327_ATU_DATA1_CROSS_PORT_STATE_EN BIT(23)
483 #define AR8327_ATU_DATA1_PRI BITS(24, 3)
484 #define AR8327_ATU_DATA1_SVL_ENTRY BIT(27)
485 #define AR8327_ATU_DATA1_PRI_OVER_EN BIT(28)
486 #define AR8327_ATU_DATA1_MIRROR_EN BIT(29)
487 #define AR8327_ATU_DATA1_SA_DROP_EN BIT(30)
488 #define AR8327_ATU_DATA1_HASH_HIGH_ADDR BIT(31)
493 #define AR8327_ATU_FUNC_DATA2_VLAN_LEAKY_EN BIT(4)
494 #define AR8327_ATU_FUNC_DATA2_REDIRECT_TO_CPU BIT(5)
495 #define AR8327_ATU_FUNC_DATA2_COPY_TO_CPU BIT(6)
496 #define AR8327_ATU_FUNC_DATA2_SHORT_LOOP BIT(7)
511 #define AR8327_ATU_FUNC_FLUSH_STATIC_EN BIT(4)
512 #define AR8327_ATU_FUNC_ENTRY_TYPE BIT(5)
515 #define AR8327_ATU_FUNC_FULL_VIOLATION BIT(12)
516 #define AR8327_ATU_FUNC_MULTI_EN BIT(13) /* for GET_NEXT */
517 #define AR8327_ATU_FUNC_PORT_EN BIT(14) /* for GET_NEXT */
518 #define AR8327_ATU_FUNC_VID_EN BIT(15) /* for GET_NEXT */
523 #define AR8327_ATU_FUNC_BUSY BIT(31)
563 #define AR8327_FWD_CTRL1_IGMP BITS(24, 7)
564 #define AR8327_FWD_CTRL1_IGMP_S 24