Lines Matching +full:8 +full:bit
20 * Register manipulation macros that expect bit field defines
28 #define BIT(_n) (1UL << (_n)) macro
51 #define AR40XX_PSGMII_ATHR_CSCO_MODE_25M BIT(0)
101 #define AR40XX_MODULE_EN_MIB BIT(0)
104 #define AR40XX_MIB_BUSY BIT(17)
105 #define AR40XX_MIB_CPU_KEEP BIT(20)
112 #define AR40XX_ESS_SERVICE_TAG_STAG BIT(17)
115 #define AR40XX_REG_SW_MAC_ADDR0_BYTE4 BITS(8, 8)
116 #define AR40XX_REG_SW_MAC_ADDR0_BYTE4_S 8
117 #define AR40XX_REG_SW_MAC_ADDR0_BYTE5 BITS(0, 8)
121 #define AR40XX_REG_SW_MAC_ADDR1_BYTE0 BITS(24, 8)
123 #define AR40XX_REG_SW_MAC_ADDR1_BYTE1 BITS(16, 8)
125 #define AR40XX_REG_SW_MAC_ADDR1_BYTE2 BITS(8, 8)
126 #define AR40XX_REG_SW_MAC_ADDR1_BYTE2_S 8
127 #define AR40XX_REG_SW_MAC_ADDR1_BYTE3 BITS(0, 8)
136 #define AR40XX_PORT_TX_EN BIT(2)
137 #define AR40XX_PORT_RX_EN BIT(3)
138 #define AR40XX_PORT_STATUS_TXFLOW BIT(4)
139 #define AR40XX_PORT_STATUS_RXFLOW BIT(5)
140 #define AR40XX_PORT_DUPLEX BIT(6)
141 #define AR40XX_PORT_TXHALF_FLOW BIT(7)
142 #define AR40XX_PORT_STATUS_LINK_UP BIT(8)
143 #define AR40XX_PORT_AUTO_LINK_EN BIT(9)
144 #define AR40XX_PORT_STATUS_FLOW_CONTROL BIT(12)
149 #define AR40XX_EEE_CTRL_DISABLE_PHY(_i) BIT(4 + (_i) * 2)
158 #define AR40XX_PORT_VLAN1_CORE_PORT BIT(9)
159 #define AR40XX_PORT_VLAN1_PORT_TLS_MODE BIT(7)
160 #define AR40XX_PORT_VLAN1_PORT_VLAN_PROP BIT(6)
169 #define AR40XX_ATU_DATA0_MAC_ADDR3 BITS(0, 8)
171 #define AR40XX_ATU_DATA0_MAC_ADDR2 BITS(8, 8)
172 #define AR40XX_ATU_DATA0_MAC_ADDR2_S 8
173 #define AR40XX_ATU_DATA0_MAC_ADDR1 BITS(16, 8)
175 #define AR40XX_ATU_DATA0_MAC_ADDR0 BITS(24, 8)
179 #define AR40XX_ATU_DATA1_MAC_ADDR4 BITS(0, 8)
181 #define AR40XX_ATU_DATA1_MAC_ADDR5 BITS(8, 8)
182 #define AR40XX_ATU_DATA1_MAC_ADDR5_S 8
185 #define AR40XX_ATU_DATA1_CROSS_PORT_STATE_EN BIT(23)
187 #define AR40XX_ATU_DATA1_SVL_ENTRY BIT(27)
188 #define AR40XX_ATU_DATA1_PRI_OVER_EN BIT(28)
189 #define AR40XX_ATU_DATA1_MIRROR_EN BIT(29)
190 #define AR40XX_ATU_DATA1_SA_DROP_EN BIT(30)
191 #define AR40XX_ATU_DATA1_HASH_HIGH_ADDR BIT(31)
196 #define AR40XX_ATU_FUNC_DATA2_VLAN_LEAKY_EN BIT(4)
197 #define AR40XX_ATU_FUNC_DATA2_REDIRECT_TO_CPU BIT(5)
198 #define AR40XX_ATU_FUNC_DATA2_COPY_TO_CPU BIT(6)
199 #define AR40XX_ATU_FUNC_DATA2_SHORT_LOOP BIT(7)
200 #define AR40XX_ATU_FUNC_DATA2_ATU_VID BITS(8, 12)
201 #define AR40XX_ATU_FUNC_DATA2_ATU_VID_S 8
214 #define AR40XX_ATU_FUNC_PORT_NUM BITS(8, 4)
215 #define AR40XX_ATU_FUNC_PORT_NUM_S 8
216 #define AR40XX_ATU_FUNC_BUSY BIT(31)
227 #define AR40XX_VTU_FUNC0_IVL BIT(19)
228 #define AR40XX_VTU_FUNC0_VALID BIT(20)
239 #define AR40XX_VTU_FUNC1_FULL BIT(4)
240 #define AR40XX_VTU_FUNC1_PORT BIT(8, 4)
241 #define AR40XX_VTU_FUNC1_PORT_S 8
242 #define AR40XX_VTU_FUNC1_VID BIT(16, 12)
244 #define AR40XX_VTU_FUNC1_BUSY BIT(31)
247 #define AR40XX_FWD_CTRL0_CPU_PORT_EN BIT(10)
254 #define AR40XX_FWD_CTRL1_MC_FLOOD BITS(8, 7)
255 #define AR40XX_FWD_CTRL1_MC_FLOOD_S 8
263 #define AR40XX_PORT_LOOKUP_IN_MODE BITS(8, 2)
264 #define AR40XX_PORT_LOOKUP_IN_MODE_S 8
267 #define AR40XX_PORT_LOOKUP_LEARN BIT(20)
268 #define AR40XX_PORT_LOOKUP_LOOPBACK BIT(21)
269 #define AR40XX_PORT_LOOKUP_ING_MIRROR_EN BIT(25)
277 #define AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16)
284 #define AR40XX_PHY_MANU_CTRL_EN BIT(12)
289 #define AR40XX_PHY_SPEC_STATUS_LINK BIT(10)
290 #define AR40XX_PHY_SPEC_STATUS_DUPLEX BIT(13)