Lines Matching +full:hardware +full:- +full:accelerated
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2001-2024, Intel Corporation
40 static const char em_driver_version[] = "7.7.8-fbsd";
41 static const char igb_driver_version[] = "2.5.28-fbsd";
55 /* Intel(R) - lem-class legacy devices */
136 /* Intel(R) - em-class devices */
185 PVID(0x8086, E1000_DEV_ID_ICH8_82567V_3, "Intel(R) 82567V-3 ICH8"),
189 "Intel(R) 82566DM-2 ICH9 AMT"),
190 PVID(0x8086, E1000_DEV_ID_ICH9_IGP_C, "Intel(R) 82566DC-2 ICH9"),
193 PVID(0x8086, E1000_DEV_ID_ICH9_IFE, "Intel(R) 82562V-2 ICH9"),
194 PVID(0x8086, E1000_DEV_ID_ICH9_IFE_GT, "Intel(R) 82562GT-2 ICH9"),
195 PVID(0x8086, E1000_DEV_ID_ICH9_IFE_G, "Intel(R) 82562G-2 ICH9"),
196 PVID(0x8086, E1000_DEV_ID_ICH9_BM, "Intel(R) 82567LM-4 ICH9"),
198 PVID(0x8086, E1000_DEV_ID_82574LA, "Intel(R) 82574L-Apple"),
199 PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_LM, "Intel(R) 82567LM-2 ICH10"),
200 PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_LF, "Intel(R) 82567LF-2 ICH10"),
201 PVID(0x8086, E1000_DEV_ID_ICH10_R_BM_V, "Intel(R) 82567V-2 ICH10"),
202 PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_LM, "Intel(R) 82567LM-3 ICH10"),
203 PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_LF, "Intel(R) 82567LF-3 ICH10"),
204 PVID(0x8086, E1000_DEV_ID_ICH10_D_BM_V, "Intel(R) 82567V-4 ICH10"),
211 PVID(0x8086, E1000_DEV_ID_PCH_LPT_I217_LM, "Intel(R) I217-LM LPT"),
212 PVID(0x8086, E1000_DEV_ID_PCH_LPT_I217_V, "Intel(R) I217-V LPT"),
214 "Intel(R) I218-LM LPTLP"),
215 PVID(0x8086, E1000_DEV_ID_PCH_LPTLP_I218_V, "Intel(R) I218-V LPTLP"),
216 PVID(0x8086, E1000_DEV_ID_PCH_I218_LM2, "Intel(R) I218-LM (2)"),
217 PVID(0x8086, E1000_DEV_ID_PCH_I218_V2, "Intel(R) I218-V (2)"),
218 PVID(0x8086, E1000_DEV_ID_PCH_I218_LM3, "Intel(R) I218-LM (3)"),
219 PVID(0x8086, E1000_DEV_ID_PCH_I218_V3, "Intel(R) I218-V (3)"),
220 PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_LM, "Intel(R) I219-LM SPT"),
221 PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V, "Intel(R) I219-V SPT"),
223 "Intel(R) I219-LM SPT-H(2)"),
225 "Intel(R) I219-V SPT-H(2)"),
227 "Intel(R) I219-LM LBG(3)"),
229 "Intel(R) I219-LM SPT(4)"),
230 PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V4, "Intel(R) I219-V SPT(4)"),
232 "Intel(R) I219-LM SPT(5)"),
233 PVID(0x8086, E1000_DEV_ID_PCH_SPT_I219_V5, "Intel(R) I219-V SPT(5)"),
235 "Intel(R) I219-LM CNP(6)"),
236 PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_V6, "Intel(R) I219-V CNP(6)"),
238 "Intel(R) I219-LM CNP(7)"),
239 PVID(0x8086, E1000_DEV_ID_PCH_CNP_I219_V7, "Intel(R) I219-V CNP(7)"),
241 "Intel(R) I219-LM ICP(8)"),
242 PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_V8, "Intel(R) I219-V ICP(8)"),
244 "Intel(R) I219-LM ICP(9)"),
245 PVID(0x8086, E1000_DEV_ID_PCH_ICP_I219_V9, "Intel(R) I219-V ICP(9)"),
247 "Intel(R) I219-LM CMP(10)"),
249 "Intel(R) I219-V CMP(10)"),
251 "Intel(R) I219-LM CMP(11)"),
253 "Intel(R) I219-V CMP(11)"),
255 "Intel(R) I219-LM CMP(12)"),
257 "Intel(R) I219-V CMP(12)"),
259 "Intel(R) I219-LM TGP(13)"),
261 "Intel(R) I219-V TGP(13)"),
263 "Intel(R) I219-LM TGP(14)"),
265 "Intel(R) I219-V GTP(14)"),
267 "Intel(R) I219-LM TGP(15)"),
269 "Intel(R) I219-V TGP(15)"),
271 "Intel(R) I219-LM ADL(16)"),
273 "Intel(R) I219-V ADL(16)"),
275 "Intel(R) I219-LM ADL(17)"),
277 "Intel(R) I219-V ADL(17)"),
279 "Intel(R) I219-LM MTP(18)"),
281 "Intel(R) I219-V MTP(18)"),
283 "Intel(R) I219-LM ADL(19)"),
285 "Intel(R) I219-V ADL(19)"),
287 "Intel(R) I219-LM LNL(20)"),
289 "Intel(R) I219-V LNL(20)"),
291 "Intel(R) I219-LM LNL(21)"),
293 "Intel(R) I219-V LNL(21)"),
295 "Intel(R) I219-LM RPL(22)"),
297 "Intel(R) I219-V RPL(22)"),
299 "Intel(R) I219-LM RPL(23)"),
301 "Intel(R) I219-V RPL(23)"),
303 "Intel(R) I219-LM ARL(24)"),
305 "Intel(R) I219-V ARL(24)"),
307 "Intel(R) I219-LM PTP(25)"),
309 "Intel(R) I219-V PTP(25)"),
311 "Intel(R) I219-LM PTP(26)"),
313 "Intel(R) I219-V PTP(26)"),
315 "Intel(R) I219-LM PTP(27)"),
317 "Intel(R) I219-V PTP(27)"),
324 /* Intel(R) - igb-class devices */
354 "Intel(R) I340-T2 82580 (Dual Copper)"),
356 "Intel(R) I340-F4 82580 (Quad Fiber)"),
360 "Intel(R) I347-AT4 DH89XXCC"),
483 /* MSI-X handlers */
679 /* Energy efficient ethernet - default to OFF */
773 struct e1000_hw *hw = &sc->hw; in em_get_regs()
853 if_softc_ctx_t scctx = sc->shared; in em_get_regs()
854 struct rx_ring *rxr = &rx_que->rxr; in em_get_regs()
855 struct tx_ring *txr = &tx_que->txr; in em_get_regs()
856 int ntxd = scctx->isc_ntxd[0]; in em_get_regs()
857 int nrxd = scctx->isc_nrxd[0]; in em_get_regs()
861 u32 staterr = le32toh(rxr->rx_base[j].wb.upper.status_error); in em_get_regs()
862 u32 length = le32toh(rxr->rx_base[j].wb.upper.length); in em_get_regs()
865 j, rxr->rx_base[j].read.buffer_addr, staterr, length); in em_get_regs()
869 unsigned int *ptr = (unsigned int *)&txr->tx_base[j]; in em_get_regs()
874 j, ptr[0], ptr[1], ptr[2], ptr[3], buf->eop, in em_get_regs()
875 buf->eop != -1 ? in em_get_regs()
876 txr->tx_base[buf->eop].upper.fields.status & in em_get_regs()
907 switch (sc->hw.mac.type) { in em_set_num_queues()
951 * This routine identifies the type of hardware, allocates all resources
952 * and initializes the hardware.
971 sc->ctx = sc->osdep.ctx = ctx; in em_if_attach_pre()
972 sc->dev = sc->osdep.dev = dev; in em_if_attach_pre()
973 scctx = sc->shared = iflib_get_softc_ctx(ctx); in em_if_attach_pre()
974 sc->media = iflib_get_media(ctx); in em_if_attach_pre()
975 hw = &sc->hw; in em_if_attach_pre()
977 /* Determine hardware and mac info */ in em_if_attach_pre()
988 sc->enable_aim = em_enable_aim; in em_if_attach_pre()
990 CTLFLAG_RW, &sc->enable_aim, 0, in em_if_attach_pre()
1014 if (hw->mac.type >= e1000_i350) { in em_if_attach_pre()
1038 scctx->isc_tx_nsegments = EM_MAX_SCATTER; in em_if_attach_pre()
1039 scctx->isc_nrxqsets_max = in em_if_attach_pre()
1040 scctx->isc_ntxqsets_max = em_set_num_queues(ctx); in em_if_attach_pre()
1043 scctx->isc_ntxqsets_max); in em_if_attach_pre()
1045 if (hw->mac.type >= igb_mac_min) { in em_if_attach_pre()
1046 scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0] * in em_if_attach_pre()
1048 scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * in em_if_attach_pre()
1050 scctx->isc_txd_size[0] = sizeof(union e1000_adv_tx_desc); in em_if_attach_pre()
1051 scctx->isc_rxd_size[0] = sizeof(union e1000_adv_rx_desc); in em_if_attach_pre()
1052 scctx->isc_txrx = &igb_txrx; in em_if_attach_pre()
1053 scctx->isc_tx_tso_segments_max = EM_MAX_SCATTER; in em_if_attach_pre()
1054 scctx->isc_tx_tso_size_max = EM_TSO_SIZE; in em_if_attach_pre()
1055 scctx->isc_tx_tso_segsize_max = EM_TSO_SEG_SIZE; in em_if_attach_pre()
1056 scctx->isc_capabilities = scctx->isc_capenable = IGB_CAPS; in em_if_attach_pre()
1057 scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_TSO | in em_if_attach_pre()
1059 if (hw->mac.type != e1000_82575) in em_if_attach_pre()
1060 scctx->isc_tx_csum_flags |= CSUM_SCTP | CSUM_IP6_SCTP; in em_if_attach_pre()
1066 scctx->isc_msix_bar = pci_msix_table_bar(dev); in em_if_attach_pre()
1067 } else if (hw->mac.type >= em_mac_min) { in em_if_attach_pre()
1068 scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0] * in em_if_attach_pre()
1070 scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * in em_if_attach_pre()
1072 scctx->isc_txd_size[0] = sizeof(struct e1000_tx_desc); in em_if_attach_pre()
1073 scctx->isc_rxd_size[0] = sizeof(union e1000_rx_desc_extended); in em_if_attach_pre()
1074 scctx->isc_txrx = &em_txrx; in em_if_attach_pre()
1075 scctx->isc_tx_tso_segments_max = EM_MAX_SCATTER; in em_if_attach_pre()
1076 scctx->isc_tx_tso_size_max = EM_TSO_SIZE; in em_if_attach_pre()
1077 scctx->isc_tx_tso_segsize_max = EM_TSO_SEG_SIZE; in em_if_attach_pre()
1078 scctx->isc_capabilities = scctx->isc_capenable = EM_CAPS; in em_if_attach_pre()
1079 scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_IP_TSO | in em_if_attach_pre()
1083 scctx->isc_capenable &= ~IFCAP_TSO; in em_if_attach_pre()
1088 * i218-i219 Specification Update 1.5.4.5 in em_if_attach_pre()
1090 if (hw->mac.type == e1000_pch_spt) in em_if_attach_pre()
1091 scctx->isc_capenable &= ~IFCAP_TSO; in em_if_attach_pre()
1094 * We support MSI-X with 82574 only, but indicate to iflib(4) in em_if_attach_pre()
1097 if (hw->mac.type == e1000_82574) { in em_if_attach_pre()
1098 scctx->isc_msix_bar = pci_msix_table_bar(dev); in em_if_attach_pre()
1100 scctx->isc_msix_bar = -1; in em_if_attach_pre()
1101 scctx->isc_disable_msix = 1; in em_if_attach_pre()
1104 scctx->isc_txqsizes[0] = roundup2((scctx->isc_ntxd[0] + 1) * in em_if_attach_pre()
1106 scctx->isc_rxqsizes[0] = roundup2((scctx->isc_nrxd[0] + 1) * in em_if_attach_pre()
1108 scctx->isc_txd_size[0] = sizeof(struct e1000_tx_desc); in em_if_attach_pre()
1109 scctx->isc_rxd_size[0] = sizeof(struct e1000_rx_desc); in em_if_attach_pre()
1110 scctx->isc_txrx = &lem_txrx; in em_if_attach_pre()
1111 scctx->isc_tx_tso_segments_max = EM_MAX_SCATTER; in em_if_attach_pre()
1112 scctx->isc_tx_tso_size_max = EM_TSO_SIZE; in em_if_attach_pre()
1113 scctx->isc_tx_tso_segsize_max = EM_TSO_SEG_SIZE; in em_if_attach_pre()
1114 scctx->isc_capabilities = scctx->isc_capenable = LEM_CAPS; in em_if_attach_pre()
1116 scctx->isc_capabilities |= IFCAP_TSO6; in em_if_attach_pre()
1117 scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_IP_TSO | in em_if_attach_pre()
1121 scctx->isc_capenable &= ~IFCAP_TSO; in em_if_attach_pre()
1124 if (hw->device_id == E1000_DEV_ID_82541ER || in em_if_attach_pre()
1125 hw->device_id == E1000_DEV_ID_82541ER_LOM) { in em_if_attach_pre()
1126 scctx->isc_capabilities &= ~IFCAP_VLAN_HWTAGGING; in em_if_attach_pre()
1127 scctx->isc_capenable = scctx->isc_capabilities; in em_if_attach_pre()
1130 if (hw->mac.type == e1000_82542) { in em_if_attach_pre()
1131 scctx->isc_capabilities &= ~(IFCAP_HWCSUM | in em_if_attach_pre()
1135 scctx->isc_capenable = scctx->isc_capabilities; in em_if_attach_pre()
1138 if (hw->mac.type < e1000_82544 || in em_if_attach_pre()
1139 hw->mac.type == e1000_82547 || in em_if_attach_pre()
1140 hw->mac.type == e1000_82547_rev_2) { in em_if_attach_pre()
1141 scctx->isc_capabilities &= in em_if_attach_pre()
1143 scctx->isc_capenable = scctx->isc_capabilities; in em_if_attach_pre()
1146 if (hw->mac.type < e1000_82545){ in em_if_attach_pre()
1147 scctx->isc_capabilities &= ~IFCAP_HWCSUM_IPV6; in em_if_attach_pre()
1148 scctx->isc_capenable = scctx->isc_capabilities; in em_if_attach_pre()
1151 * "PCI/PCI-X SDM 4.0" page 33 (b): in em_if_attach_pre()
1154 if (hw->mac.type == e1000_82547 || in em_if_attach_pre()
1155 hw->mac.type == e1000_82547_rev_2) in em_if_attach_pre()
1156 scctx->isc_capenable &= ~(IFCAP_HWCSUM | in em_if_attach_pre()
1160 scctx->isc_msix_bar = 0; in em_if_attach_pre()
1176 if ((hw->mac.type == e1000_ich8lan) || in em_if_attach_pre()
1177 (hw->mac.type == e1000_ich9lan) || in em_if_attach_pre()
1178 (hw->mac.type == e1000_ich10lan) || in em_if_attach_pre()
1179 (hw->mac.type == e1000_pchlan) || in em_if_attach_pre()
1180 (hw->mac.type == e1000_pch2lan) || in em_if_attach_pre()
1181 (hw->mac.type == e1000_pch_lpt)) { in em_if_attach_pre()
1183 sc->flash = bus_alloc_resource_any(dev, in em_if_attach_pre()
1185 if (sc->flash == NULL) { in em_if_attach_pre()
1191 hw->flash_address = (u8 *)sc->flash; in em_if_attach_pre()
1192 sc->osdep.flash_bus_space_tag = in em_if_attach_pre()
1193 rman_get_bustag(sc->flash); in em_if_attach_pre()
1194 sc->osdep.flash_bus_space_handle = in em_if_attach_pre()
1195 rman_get_bushandle(sc->flash); in em_if_attach_pre()
1203 else if (hw->mac.type >= e1000_pch_spt) { in em_if_attach_pre()
1204 sc->osdep.flash_bus_space_tag = sc->osdep.mem_bus_space_tag; in em_if_attach_pre()
1205 sc->osdep.flash_bus_space_handle = in em_if_attach_pre()
1206 sc->osdep.mem_bus_space_handle + E1000_FLASH_BASE_ADDR; in em_if_attach_pre()
1222 if (hw->mac.type < igb_mac_min) { in em_if_attach_pre()
1224 "receive interrupt delay in usecs", &sc->rx_int_delay, in em_if_attach_pre()
1227 "transmit interrupt delay in usecs", &sc->tx_int_delay, in em_if_attach_pre()
1230 if (hw->mac.type >= e1000_82540 && hw->mac.type < igb_mac_min) { in em_if_attach_pre()
1233 &sc->rx_abs_int_delay, in em_if_attach_pre()
1237 &sc->tx_abs_int_delay, in em_if_attach_pre()
1241 hw->mac.autoneg = DO_AUTO_NEG; in em_if_attach_pre()
1242 hw->phy.autoneg_wait_to_complete = false; in em_if_attach_pre()
1243 hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; in em_if_attach_pre()
1245 if (hw->mac.type < em_mac_min) { in em_if_attach_pre()
1250 if (hw->phy.media_type == e1000_media_type_copper) { in em_if_attach_pre()
1251 hw->phy.mdix = AUTO_ALL_MODES; in em_if_attach_pre()
1252 hw->phy.disable_polarity_correction = false; in em_if_attach_pre()
1253 hw->phy.ms_type = EM_MASTER_SLAVE; in em_if_attach_pre()
1260 scctx->isc_max_frame_size = hw->mac.max_frame_size = in em_if_attach_pre()
1264 * This controls when hardware reports transmit completion in em_if_attach_pre()
1267 hw->mac.report_tx_early = 1; in em_if_attach_pre()
1270 sc->mta = malloc(sizeof(u8) * ETHER_ADDR_LEN * in em_if_attach_pre()
1272 if (sc->mta == NULL) { in em_if_attach_pre()
1280 sc->tso_automasked = 0; in em_if_attach_pre()
1288 if (hw->mac.type < igb_mac_min) in em_if_attach_pre()
1289 hw->dev_spec.ich8lan.eee_disable = eee_setting; in em_if_attach_pre()
1291 hw->dev_spec._82575.eee_disable = eee_setting; in em_if_attach_pre()
1306 ** Some PCI-E parts fail the first check due to in em_if_attach_pre()
1326 if (!em_is_valid_ether_addr(hw->mac.addr)) { in em_if_attach_pre()
1327 if (sc->vf_ifp) { in em_if_attach_pre()
1329 (struct ether_addr *)hw->mac.addr); in em_if_attach_pre()
1343 * Get Wake-on-Lan and Management info for later use in em_if_attach_pre()
1348 scctx->isc_capenable &= ~IFCAP_WOL; in em_if_attach_pre()
1349 if (sc->wol != 0) in em_if_attach_pre()
1350 scctx->isc_capenable |= IFCAP_WOL_MAGIC; in em_if_attach_pre()
1352 iflib_set_mac(ctx, hw->mac.addr); in em_if_attach_pre()
1360 free(sc->mta, M_DEVBUF); in em_if_attach_pre()
1369 struct e1000_hw *hw = &sc->hw; in em_if_attach_post()
1375 device_printf(sc->dev, "Interface setup failed: %d\n", error); in em_if_attach_post()
1382 if (sc->vf_ifp) in em_if_attach_post()
1383 sc->ustats.vf_stats = (struct e1000_vf_stats){}; in em_if_attach_post()
1385 sc->ustats.stats = (struct e1000_hw_stats){}; in em_if_attach_post()
1388 hw->mac.get_link_status = 1; in em_if_attach_post()
1392 /* Non-AMT based hardware can now take control from firmware */ in em_if_attach_post()
1393 if (sc->has_manage && !sc->has_amt) in em_if_attach_post()
1424 e1000_phy_hw_reset(&sc->hw); in em_if_detach()
1429 free(sc->mta, M_DEVBUF); in em_if_detach()
1430 sc->mta = NULL; in em_if_detach()
1466 if (sc->hw.mac.type == e1000_pch2lan) in em_if_resume()
1467 e1000_resume_workarounds_pchlan(&sc->hw); in em_if_resume()
1483 switch (sc->hw.mac.type) { in em_if_mtu_set()
1511 if (sc->hw.mac.type >= igb_mac_min) in em_if_mtu_set()
1516 if (mtu > max_frame_size - ETHER_HDR_LEN - ETHER_CRC_LEN) { in em_if_mtu_set()
1520 scctx->isc_max_frame_size = sc->hw.mac.max_frame_size = in em_if_mtu_set()
1538 if_softc_ctx_t scctx = sc->shared; in em_if_init()
1546 bcopy(if_getlladdr(ifp), sc->hw.mac.addr, ETHER_ADDR_LEN); in em_if_init()
1549 e1000_rar_set(&sc->hw, sc->hw.mac.addr, 0); in em_if_init()
1557 if (sc->hw.mac.type == e1000_82571) { in em_if_init()
1558 e1000_set_laa_state_82571(&sc->hw, true); in em_if_init()
1559 e1000_rar_set(&sc->hw, sc->hw.mac.addr, in em_if_init()
1560 E1000_RAR_ENTRIES - 1); in em_if_init()
1563 /* Initialize the hardware */ in em_if_init()
1567 for (i = 0, tx_que = sc->tx_queues; i < sc->tx_num_queues; in em_if_init()
1569 struct tx_ring *txr = &tx_que->txr; in em_if_init()
1571 txr->tx_rs_cidx = txr->tx_rs_pidx; in em_if_init()
1575 * off-by-one error when calculating how many descriptors are in em_if_init()
1578 txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1; in em_if_init()
1582 E1000_WRITE_REG(&sc->hw, E1000_VET, ETHERTYPE_VLAN); in em_if_init()
1585 if (sc->hw.mac.type >= igb_mac_min && !sc->vf_ifp) in em_if_init()
1586 e1000_rx_fifo_flush_base(&sc->hw); in em_if_init()
1597 sc->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx); in em_if_init()
1606 if (sc->hw.mac.ops.clear_hw_cntrs != NULL) in em_if_init()
1607 sc->hw.mac.ops.clear_hw_cntrs(&sc->hw); in em_if_init()
1609 /* MSI-X configuration for 82574 */ in em_if_init()
1610 if (sc->hw.mac.type == e1000_82574) { in em_if_init()
1611 int tmp = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT); in em_if_init()
1614 E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, tmp); in em_if_init()
1615 /* Set the IVAR - interrupt vector routing. */ in em_if_init()
1616 E1000_WRITE_REG(&sc->hw, E1000_IVAR, sc->ivars); in em_if_init()
1617 } else if (sc->intr_type == IFLIB_INTR_MSIX) { in em_if_init()
1623 E1000_READ_REG(&sc->hw, E1000_ICR); in em_if_init()
1624 E1000_WRITE_REG(&sc->hw, E1000_ICS, E1000_ICS_LSC); in em_if_init()
1626 /* AMT based hardware can now take control from firmware */ in em_if_init()
1627 if (sc->has_manage && sc->has_amt) in em_if_init()
1631 if (sc->hw.mac.type >= igb_mac_min && in em_if_init()
1632 sc->hw.phy.media_type == e1000_media_type_copper) { in em_if_init()
1633 if (sc->hw.mac.type == e1000_i354) in em_if_init()
1634 e1000_set_eee_i354(&sc->hw, true, true); in em_if_init()
1636 e1000_set_eee_i350(&sc->hw, true, true); in em_if_init()
1655 struct e1000_hw *hw = &sc->hw; in em_newitr()
1661 rxbytes = atomic_load_long(&rxr->rx_bytes); in em_newitr()
1662 txbytes = atomic_load_long(&txr->tx_bytes); in em_newitr()
1670 if (sc->enable_aim) { in em_newitr()
1671 nextlatency = rxr->rx_nextlatency; in em_newitr()
1673 /* Use half default (4K) ITR if sub-gig */ in em_newitr()
1674 if (sc->link_speed != 1000) { in em_newitr()
1679 if (sc->shared->isc_max_frame_size * 2 > (sc->pba << 10)) { in em_newitr()
1681 sc->enable_aim = 0; in em_newitr()
1687 txpackets = atomic_load_long(&txr->tx_packets); in em_newitr()
1693 rxpackets = atomic_load_long(&rxr->rx_packets); in em_newitr()
1738 device_printf(sc->dev, in em_newitr()
1744 if (sc->enable_aim == 1 && nextlatency == itr_latency_lowest) in em_newitr()
1748 rxr->rx_nextlatency = nextlatency; in em_newitr()
1752 rxr->rx_nextlatency = nextlatency; in em_newitr()
1773 if (hw->mac.type >= igb_mac_min) { in em_newitr()
1776 if (hw->mac.type == e1000_82575) in em_newitr()
1781 if (newitr != que->itr_setting) { in em_newitr()
1782 que->itr_setting = newitr; in em_newitr()
1783 E1000_WRITE_REG(hw, E1000_EITR(que->msix), in em_newitr()
1784 que->itr_setting); in em_newitr()
1789 if (newitr != que->itr_setting) { in em_newitr()
1790 que->itr_setting = newitr; in em_newitr()
1791 if (hw->mac.type == e1000_82574 && que->msix) { in em_newitr()
1793 E1000_EITR_82574(que->msix), in em_newitr()
1794 que->itr_setting); in em_newitr()
1797 que->itr_setting); in em_newitr()
1812 struct e1000_hw *hw = &sc->hw; in em_intr()
1813 struct em_rx_queue *que = &sc->rx_queues[0]; in em_intr()
1814 struct tx_ring *txr = &sc->tx_queues[0].txr; in em_intr()
1815 struct rx_ring *rxr = &que->rxr; in em_intr()
1816 if_ctx_t ctx = sc->ctx; in em_intr()
1833 if (hw->mac.type >= e1000_82571 && in em_intr()
1838 * Only MSI-X interrupts have one-shot behavior by taking advantage in em_intr()
1850 sc->rx_overruns++; in em_intr()
1852 if (hw->mac.type >= e1000_82540) in em_intr()
1856 txr->tx_bytes = 0; in em_intr()
1857 txr->tx_packets = 0; in em_intr()
1858 rxr->rx_bytes = 0; in em_intr()
1859 rxr->rx_packets = 0; in em_intr()
1868 struct em_rx_queue *rxq = &sc->rx_queues[rxqid]; in em_if_rx_queue_intr_enable()
1870 E1000_WRITE_REG(&sc->hw, E1000_IMS, rxq->eims); in em_if_rx_queue_intr_enable()
1878 struct em_tx_queue *txq = &sc->tx_queues[txqid]; in em_if_tx_queue_intr_enable()
1880 E1000_WRITE_REG(&sc->hw, E1000_IMS, txq->eims); in em_if_tx_queue_intr_enable()
1888 struct em_rx_queue *rxq = &sc->rx_queues[rxqid]; in igb_if_rx_queue_intr_enable()
1890 E1000_WRITE_REG(&sc->hw, E1000_EIMS, rxq->eims); in igb_if_rx_queue_intr_enable()
1898 struct em_tx_queue *txq = &sc->tx_queues[txqid]; in igb_if_tx_queue_intr_enable()
1900 E1000_WRITE_REG(&sc->hw, E1000_EIMS, txq->eims); in igb_if_tx_queue_intr_enable()
1906 * MSI-X RX Interrupt Service routine
1913 struct e1000_softc *sc = que->sc; in em_msix_que()
1914 struct tx_ring *txr = &sc->tx_queues[que->msix].txr; in em_msix_que()
1915 struct rx_ring *rxr = &que->rxr; in em_msix_que()
1917 ++que->irqs; in em_msix_que()
1922 txr->tx_bytes = 0; in em_msix_que()
1923 txr->tx_packets = 0; in em_msix_que()
1924 rxr->rx_bytes = 0; in em_msix_que()
1925 rxr->rx_packets = 0; in em_msix_que()
1932 * MSI-X Link Fast Interrupt Service routine
1941 ++sc->link_irq; in em_msix_link()
1942 MPASS(sc->hw.back != NULL); in em_msix_link()
1943 reg_icr = E1000_READ_REG(&sc->hw, E1000_ICR); in em_msix_link()
1946 sc->rx_overruns++; in em_msix_link()
1949 em_handle_link(sc->ctx); in em_msix_link()
1951 /* Re-arm unconditionally */ in em_msix_link()
1952 if (sc->hw.mac.type >= igb_mac_min) { in em_msix_link()
1953 E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC); in em_msix_link()
1954 E1000_WRITE_REG(&sc->hw, E1000_EIMS, sc->link_mask); in em_msix_link()
1955 } else if (sc->hw.mac.type == e1000_82574) { in em_msix_link()
1956 E1000_WRITE_REG(&sc->hw, E1000_IMS, in em_msix_link()
1964 E1000_WRITE_REG(&sc->hw, E1000_ICS, sc->ims); in em_msix_link()
1966 E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC); in em_msix_link()
1977 sc->hw.mac.get_link_status = 1; in em_handle_link()
1999 ifmr->ifm_status = IFM_AVALID; in em_if_media_status()
2000 ifmr->ifm_active = IFM_ETHER; in em_if_media_status()
2002 if (!sc->link_active) { in em_if_media_status()
2006 ifmr->ifm_status |= IFM_ACTIVE; in em_if_media_status()
2008 if ((sc->hw.phy.media_type == e1000_media_type_fiber) || in em_if_media_status()
2009 (sc->hw.phy.media_type == e1000_media_type_internal_serdes)) { in em_if_media_status()
2010 if (sc->hw.mac.type == e1000_82545) in em_if_media_status()
2012 ifmr->ifm_active |= fiber_type | IFM_FDX; in em_if_media_status()
2014 switch (sc->link_speed) { in em_if_media_status()
2016 ifmr->ifm_active |= IFM_10_T; in em_if_media_status()
2019 ifmr->ifm_active |= IFM_100_TX; in em_if_media_status()
2022 ifmr->ifm_active |= IFM_1000_T; in em_if_media_status()
2025 if (sc->link_duplex == FULL_DUPLEX) in em_if_media_status()
2026 ifmr->ifm_active |= IFM_FDX; in em_if_media_status()
2028 ifmr->ifm_active |= IFM_HDX; in em_if_media_status()
2048 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) in em_if_media_change()
2051 switch (IFM_SUBTYPE(ifm->ifm_media)) { in em_if_media_change()
2053 sc->hw.mac.autoneg = DO_AUTO_NEG; in em_if_media_change()
2054 sc->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT; in em_if_media_change()
2059 sc->hw.mac.autoneg = DO_AUTO_NEG; in em_if_media_change()
2060 sc->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL; in em_if_media_change()
2063 sc->hw.mac.autoneg = false; in em_if_media_change()
2064 sc->hw.phy.autoneg_advertised = 0; in em_if_media_change()
2065 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) in em_if_media_change()
2066 sc->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL; in em_if_media_change()
2068 sc->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF; in em_if_media_change()
2071 sc->hw.mac.autoneg = false; in em_if_media_change()
2072 sc->hw.phy.autoneg_advertised = 0; in em_if_media_change()
2073 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) in em_if_media_change()
2074 sc->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL; in em_if_media_change()
2076 sc->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF; in em_if_media_change()
2079 device_printf(sc->dev, "Unsupported media type\n"); in em_if_media_change()
2095 reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); in em_if_set_promisc()
2105 E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); in em_if_set_promisc()
2113 E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); in em_if_set_promisc()
2118 E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); in em_if_set_promisc()
2156 mta = sc->mta; in em_if_multi_set()
2159 if (sc->hw.mac.type == e1000_82542 && in em_if_multi_set()
2160 sc->hw.revision_id == E1000_REVISION_2) { in em_if_multi_set()
2161 reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); in em_if_multi_set()
2162 if (sc->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) in em_if_multi_set()
2163 e1000_pci_clear_mwi(&sc->hw); in em_if_multi_set()
2165 E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); in em_if_multi_set()
2172 e1000_update_mc_addr_list(&sc->hw, mta, mcnt); in em_if_multi_set()
2174 reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); in em_if_multi_set()
2185 E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); in em_if_multi_set()
2187 if (sc->hw.mac.type == e1000_82542 && in em_if_multi_set()
2188 sc->hw.revision_id == E1000_REVISION_2) { in em_if_multi_set()
2189 reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); in em_if_multi_set()
2191 E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl); in em_if_multi_set()
2193 if (sc->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE) in em_if_multi_set()
2194 e1000_pci_set_mwi(&sc->hw); in em_if_multi_set()
2203 * controller-specific hardware patting.
2219 struct e1000_hw *hw = &sc->hw; in em_if_update_admin_status()
2226 switch (hw->phy.media_type) { in em_if_update_admin_status()
2228 if (hw->mac.get_link_status) { in em_if_update_admin_status()
2229 if (hw->mac.type == e1000_pch_spt) in em_if_update_admin_status()
2233 link_check = !hw->mac.get_link_status; in em_if_update_admin_status()
2247 link_check = hw->mac.serdes_has_link; in em_if_update_admin_status()
2252 link_check = !hw->mac.get_link_status; in em_if_update_admin_status()
2259 if (hw->mac.type == e1000_i350) { in em_if_update_admin_status()
2265 if (link_check && (sc->link_active == 0)) { in em_if_update_admin_status()
2266 e1000_get_speed_and_duplex(hw, &sc->link_speed, in em_if_update_admin_status()
2267 &sc->link_duplex); in em_if_update_admin_status()
2268 /* Check if we must disable SPEED_MODE bit on PCI-E */ in em_if_update_admin_status()
2269 if ((sc->link_speed != SPEED_1000) && in em_if_update_admin_status()
2270 ((hw->mac.type == e1000_82571) || in em_if_update_admin_status()
2271 (hw->mac.type == e1000_82572))) { in em_if_update_admin_status()
2279 sc->link_speed, in em_if_update_admin_status()
2280 ((sc->link_duplex == FULL_DUPLEX) ? in em_if_update_admin_status()
2282 sc->link_active = 1; in em_if_update_admin_status()
2283 sc->smartspeed = 0; in em_if_update_admin_status()
2289 if (((hw->mac.type == e1000_i210) || in em_if_update_admin_status()
2290 (hw->mac.type == e1000_i211)) && in em_if_update_admin_status()
2291 (hw->phy.id == I210_I_PHY_ID)) in em_if_update_admin_status()
2294 if (hw->dev_spec._82575.media_changed && in em_if_update_admin_status()
2295 hw->mac.type >= igb_mac_min) { in em_if_update_admin_status()
2296 hw->dev_spec._82575.media_changed = false; in em_if_update_admin_status()
2297 sc->flags |= IGB_MEDIA_RESET; in em_if_update_admin_status()
2301 if (hw->mac.type < igb_mac_min) in em_if_update_admin_status()
2307 IF_Mbps(sc->link_speed)); in em_if_update_admin_status()
2308 } else if (!link_check && (sc->link_active == 1)) { in em_if_update_admin_status()
2309 sc->link_speed = 0; in em_if_update_admin_status()
2310 sc->link_duplex = 0; in em_if_update_admin_status()
2311 sc->link_active = 0; in em_if_update_admin_status()
2317 if (hw->mac.type == e1000_82571 && e1000_get_laa_state_82571(hw)) in em_if_update_admin_status()
2318 e1000_rar_set(hw, hw->mac.addr, 0); in em_if_update_admin_status()
2320 if (hw->mac.type < em_mac_min) in em_if_update_admin_status()
2333 sc->watchdog_events++; in em_if_watchdog_reset()
2350 if (sc->hw.mac.type >= e1000_pch_spt && sc->hw.mac.type < igb_mac_min) in em_if_stop()
2353 e1000_reset_hw(&sc->hw); in em_if_stop()
2354 if (sc->hw.mac.type >= e1000_82544 && !sc->vf_ifp) in em_if_stop()
2355 E1000_WRITE_REG(&sc->hw, E1000_WUFC, 0); in em_if_stop()
2357 e1000_led_off(&sc->hw); in em_if_stop()
2358 e1000_cleanup_led(&sc->hw); in em_if_stop()
2363 * Determine hardware revision.
2373 sc->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2); in em_identify_hardware()
2376 sc->hw.vendor_id = pci_get_vendor(dev); in em_identify_hardware()
2377 sc->hw.device_id = pci_get_device(dev); in em_identify_hardware()
2378 sc->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1); in em_identify_hardware()
2379 sc->hw.subsystem_vendor_id = pci_read_config(dev, PCIR_SUBVEND_0, 2); in em_identify_hardware()
2380 sc->hw.subsystem_device_id = pci_read_config(dev, PCIR_SUBDEV_0, 2); in em_identify_hardware()
2383 if (e1000_set_mac_type(&sc->hw)) { in em_identify_hardware()
2389 if ((sc->hw.mac.type == e1000_vfadapt) || in em_identify_hardware()
2390 (sc->hw.mac.type == e1000_vfadapt_i350)) in em_identify_hardware()
2391 sc->vf_ifp = 1; in em_identify_hardware()
2393 sc->vf_ifp = 0; in em_identify_hardware()
2404 sc->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in em_allocate_pci_resources()
2406 if (sc->memory == NULL) { in em_allocate_pci_resources()
2411 sc->osdep.mem_bus_space_tag = rman_get_bustag(sc->memory); in em_allocate_pci_resources()
2412 sc->osdep.mem_bus_space_handle = rman_get_bushandle(sc->memory); in em_allocate_pci_resources()
2414 sc->osdep.mem_bus_space_size = rman_get_size(sc->memory); in em_allocate_pci_resources()
2416 sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle; in em_allocate_pci_resources()
2419 if (sc->hw.mac.type < em_mac_min && sc->hw.mac.type > e1000_82543) { in em_allocate_pci_resources()
2435 sc->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT, in em_allocate_pci_resources()
2437 if (sc->ioport == NULL) { in em_allocate_pci_resources()
2442 sc->hw.io_base = 0; in em_allocate_pci_resources()
2443 sc->osdep.io_bus_space_tag = in em_allocate_pci_resources()
2444 rman_get_bustag(sc->ioport); in em_allocate_pci_resources()
2445 sc->osdep.io_bus_space_handle = in em_allocate_pci_resources()
2446 rman_get_bushandle(sc->ioport); in em_allocate_pci_resources()
2449 sc->hw.back = &sc->osdep; in em_allocate_pci_resources()
2456 * Set up the MSI-X Interrupt handlers
2463 struct em_rx_queue *rx_que = sc->rx_queues; in em_if_msix_intr_assign()
2464 struct em_tx_queue *tx_que = sc->tx_queues; in em_if_msix_intr_assign()
2469 for (i = 0; i < sc->rx_num_queues; i++, rx_que++, vector++) { in em_if_msix_intr_assign()
2472 error = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid, in em_if_msix_intr_assign()
2473 IFLIB_INTR_RXTX, em_msix_que, rx_que, rx_que->me, buf); in em_if_msix_intr_assign()
2478 sc->rx_num_queues = i + 1; in em_if_msix_intr_assign()
2482 rx_que->msix = vector; in em_if_msix_intr_assign()
2486 * in E1000_IMS -- bits 20 and 21 in em_if_msix_intr_assign()
2488 * NOTHING to do with the MSI-X vector in em_if_msix_intr_assign()
2490 if (sc->hw.mac.type == e1000_82574) { in em_if_msix_intr_assign()
2491 rx_que->eims = 1 << (20 + i); in em_if_msix_intr_assign()
2492 sc->ims |= rx_que->eims; in em_if_msix_intr_assign()
2493 sc->ivars |= (8 | rx_que->msix) << (i * 4); in em_if_msix_intr_assign()
2494 } else if (sc->hw.mac.type == e1000_82575) in em_if_msix_intr_assign()
2495 rx_que->eims = E1000_EICR_TX_QUEUE0 << vector; in em_if_msix_intr_assign()
2497 rx_que->eims = 1 << vector; in em_if_msix_intr_assign()
2502 for (i = 0; i < sc->tx_num_queues; i++, tx_que++, vector++) { in em_if_msix_intr_assign()
2504 tx_que = &sc->tx_queues[i]; in em_if_msix_intr_assign()
2506 &sc->rx_queues[i % sc->rx_num_queues].que_irq, in em_if_msix_intr_assign()
2507 IFLIB_INTR_TX, tx_que, tx_que->me, buf); in em_if_msix_intr_assign()
2509 tx_que->msix = (vector % sc->rx_num_queues); in em_if_msix_intr_assign()
2513 * in E1000_IMS -- bits 22 and 23 in em_if_msix_intr_assign()
2515 * NOTHING to do with the MSI-X vector in em_if_msix_intr_assign()
2517 if (sc->hw.mac.type == e1000_82574) { in em_if_msix_intr_assign()
2518 tx_que->eims = 1 << (22 + i); in em_if_msix_intr_assign()
2519 sc->ims |= tx_que->eims; in em_if_msix_intr_assign()
2520 sc->ivars |= (8 | tx_que->msix) << (8 + (i * 4)); in em_if_msix_intr_assign()
2521 } else if (sc->hw.mac.type == e1000_82575) { in em_if_msix_intr_assign()
2522 tx_que->eims = E1000_EICR_TX_QUEUE0 << i; in em_if_msix_intr_assign()
2524 tx_que->eims = 1 << i; in em_if_msix_intr_assign()
2530 error = iflib_irq_alloc_generic(ctx, &sc->irq, rid, IFLIB_INTR_ADMIN, in em_if_msix_intr_assign()
2538 sc->linkvec = rx_vectors; in em_if_msix_intr_assign()
2539 if (sc->hw.mac.type < igb_mac_min) { in em_if_msix_intr_assign()
2540 sc->ivars |= (8 | rx_vectors) << 16; in em_if_msix_intr_assign()
2541 sc->ivars |= 0x80000000; in em_if_msix_intr_assign()
2543 sc->ims |= E1000_IMS_OTHER; in em_if_msix_intr_assign()
2548 iflib_irq_free(ctx, &sc->irq); in em_if_msix_intr_assign()
2549 rx_que = sc->rx_queues; in em_if_msix_intr_assign()
2550 for (int i = 0; i < sc->rx_num_queues; i++, rx_que++) in em_if_msix_intr_assign()
2551 iflib_irq_free(ctx, &rx_que->que_irq); in em_if_msix_intr_assign()
2558 struct e1000_hw *hw = &sc->hw; in igb_configure_queues()
2564 if (hw->mac.type != e1000_82575) in igb_configure_queues()
2569 /* Turn on MSI-X */ in igb_configure_queues()
2570 switch (hw->mac.type) { in igb_configure_queues()
2579 for (int i = 0; i < sc->rx_num_queues; i++) { in igb_configure_queues()
2582 rx_que = &sc->rx_queues[i]; in igb_configure_queues()
2585 ivar |= (rx_que->msix | E1000_IVAR_VALID) << in igb_configure_queues()
2589 ivar |= rx_que->msix | E1000_IVAR_VALID; in igb_configure_queues()
2594 for (int i = 0; i < sc->tx_num_queues; i++) { in igb_configure_queues()
2597 tx_que = &sc->tx_queues[i]; in igb_configure_queues()
2600 ivar |= (tx_que->msix | E1000_IVAR_VALID) << in igb_configure_queues()
2604 ivar |= (tx_que->msix | E1000_IVAR_VALID) << in igb_configure_queues()
2608 sc->que_mask |= tx_que->eims; in igb_configure_queues()
2612 ivar = (sc->linkvec | E1000_IVAR_VALID) << 8; in igb_configure_queues()
2613 sc->link_mask = 1 << sc->linkvec; in igb_configure_queues()
2618 for (int i = 0; i < sc->rx_num_queues; i++) { in igb_configure_queues()
2621 rx_que = &sc->rx_queues[i]; in igb_configure_queues()
2624 ivar |= rx_que->msix | E1000_IVAR_VALID; in igb_configure_queues()
2627 ivar |= (rx_que->msix | E1000_IVAR_VALID) << in igb_configure_queues()
2631 sc->que_mask |= rx_que->eims; in igb_configure_queues()
2634 for (int i = 0; i < sc->tx_num_queues; i++) { in igb_configure_queues()
2637 tx_que = &sc->tx_queues[i]; in igb_configure_queues()
2640 ivar |= (tx_que->msix | E1000_IVAR_VALID) << in igb_configure_queues()
2644 ivar |= (tx_que->msix | E1000_IVAR_VALID) << in igb_configure_queues()
2648 sc->que_mask |= tx_que->eims; in igb_configure_queues()
2652 ivar = (sc->linkvec | E1000_IVAR_VALID) << 8; in igb_configure_queues()
2653 sc->link_mask = 1 << sc->linkvec; in igb_configure_queues()
2658 /* enable MSI-X support*/ in igb_configure_queues()
2661 /* Auto-Mask interrupts upon ICR read. */ in igb_configure_queues()
2667 for (int i = 0; i < sc->rx_num_queues; i++) { in igb_configure_queues()
2668 rx_que = &sc->rx_queues[i]; in igb_configure_queues()
2671 rx_que->eims = tmp; in igb_configure_queues()
2673 rx_que->eims); in igb_configure_queues()
2674 sc->que_mask |= rx_que->eims; in igb_configure_queues()
2678 E1000_WRITE_REG(hw, E1000_MSIXBM(sc->linkvec), in igb_configure_queues()
2680 sc->link_mask |= E1000_EIMS_OTHER; in igb_configure_queues()
2689 if (hw->mac.type == e1000_82575) in igb_configure_queues()
2694 for (int i = 0; i < sc->rx_num_queues; i++) { in igb_configure_queues()
2695 rx_que = &sc->rx_queues[i]; in igb_configure_queues()
2696 E1000_WRITE_REG(hw, E1000_EITR(rx_que->msix), newitr); in igb_configure_queues()
2707 struct em_rx_queue *que = sc->rx_queues; in em_free_pci_resources()
2710 /* Release all MSI-X queue resources */ in em_free_pci_resources()
2711 if (sc->intr_type == IFLIB_INTR_MSIX) in em_free_pci_resources()
2712 iflib_irq_free(ctx, &sc->irq); in em_free_pci_resources()
2715 for (int i = 0; i < sc->rx_num_queues; i++, que++) { in em_free_pci_resources()
2716 iflib_irq_free(ctx, &que->que_irq); in em_free_pci_resources()
2720 if (sc->memory != NULL) { in em_free_pci_resources()
2722 rman_get_rid(sc->memory), sc->memory); in em_free_pci_resources()
2723 sc->memory = NULL; in em_free_pci_resources()
2726 if (sc->flash != NULL) { in em_free_pci_resources()
2728 rman_get_rid(sc->flash), sc->flash); in em_free_pci_resources()
2729 sc->flash = NULL; in em_free_pci_resources()
2732 if (sc->ioport != NULL) { in em_free_pci_resources()
2734 rman_get_rid(sc->ioport), sc->ioport); in em_free_pci_resources()
2735 sc->ioport = NULL; in em_free_pci_resources()
2739 /* Set up MSI or MSI-X */
2745 if (sc->hw.mac.type == e1000_82574) { in em_setup_msix()
2761 if (sc->link_active || (sc->hw.phy.type != e1000_phy_igp) || in lem_smartspeed()
2762 sc->hw.mac.autoneg == 0 || in lem_smartspeed()
2763 (sc->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0) in lem_smartspeed()
2766 if (sc->smartspeed == 0) { in lem_smartspeed()
2768 * we assume back-to-back */ in lem_smartspeed()
2769 e1000_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &phy_tmp); in lem_smartspeed()
2772 e1000_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &phy_tmp); in lem_smartspeed()
2774 e1000_read_phy_reg(&sc->hw, in lem_smartspeed()
2778 e1000_write_phy_reg(&sc->hw, in lem_smartspeed()
2780 sc->smartspeed++; in lem_smartspeed()
2781 if(sc->hw.mac.autoneg && in lem_smartspeed()
2782 !e1000_copper_link_autoneg(&sc->hw) && in lem_smartspeed()
2783 !e1000_read_phy_reg(&sc->hw, in lem_smartspeed()
2787 e1000_write_phy_reg(&sc->hw, in lem_smartspeed()
2793 } else if(sc->smartspeed == EM_SMARTSPEED_DOWNSHIFT) { in lem_smartspeed()
2795 e1000_read_phy_reg(&sc->hw, PHY_1000T_CTRL, &phy_tmp); in lem_smartspeed()
2797 e1000_write_phy_reg(&sc->hw, PHY_1000T_CTRL, phy_tmp); in lem_smartspeed()
2798 if(sc->hw.mac.autoneg && in lem_smartspeed()
2799 !e1000_copper_link_autoneg(&sc->hw) && in lem_smartspeed()
2800 !e1000_read_phy_reg(&sc->hw, PHY_CONTROL, &phy_tmp)) { in lem_smartspeed()
2803 e1000_write_phy_reg(&sc->hw, PHY_CONTROL, phy_tmp); in lem_smartspeed()
2807 if(sc->smartspeed++ == EM_SMARTSPEED_MAX) in lem_smartspeed()
2808 sc->smartspeed = 0; in lem_smartspeed()
2819 device_t dev = sc->dev; in igb_init_dmac()
2820 struct e1000_hw *hw = &sc->hw; in igb_init_dmac()
2825 if (hw->mac.type == e1000_i211) in igb_init_dmac()
2828 max_frame_size = sc->shared->isc_max_frame_size; in igb_init_dmac()
2829 if (hw->mac.type > e1000_82580) { in igb_init_dmac()
2831 if (sc->dmac == 0) { /* Disabling it */ in igb_init_dmac()
2840 hwm = 64 * pba - max_frame_size / 16; in igb_init_dmac()
2841 if (hwm < 64 * (pba - 6)) in igb_init_dmac()
2842 hwm = 64 * (pba - 6); in igb_init_dmac()
2850 dmac = pba - max_frame_size / 512; in igb_init_dmac()
2851 if (dmac < pba - 10) in igb_init_dmac()
2852 dmac = pba - 10; in igb_init_dmac()
2867 if (hw->mac.type == e1000_i354) { in igb_init_dmac()
2871 reg |= ((sc->dmac * 5) >> 6); in igb_init_dmac()
2873 reg |= (sc->dmac >> 5); in igb_init_dmac()
2875 reg |= (sc->dmac >> 5); in igb_init_dmac()
2884 if (hw->mac.type == e1000_i350) in igb_init_dmac()
2890 if (hw->mac.type == e1000_i354) { in igb_init_dmac()
2904 E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_TXPBSIZE - in igb_init_dmac()
2912 } else if (hw->mac.type == e1000_82580) { in igb_init_dmac()
2923 * em_flush_tx_ring - remove all descriptors from the tx_ring
2933 struct e1000_hw *hw = &sc->hw; in em_flush_tx_ring()
2934 struct tx_ring *txr = &sc->tx_queues->txr; in em_flush_tx_ring()
2942 txd = &txr->tx_base[txr->tx_cidx_processed]; in em_flush_tx_ring()
2945 txd->buffer_addr = txr->tx_paddr; in em_flush_tx_ring()
2946 txd->lower.data = htole32(txd_lower | size); in em_flush_tx_ring()
2947 txd->upper.data = 0; in em_flush_tx_ring()
2952 E1000_WRITE_REG(hw, E1000_TDT(0), txr->tx_cidx_processed); in em_flush_tx_ring()
2958 * em_flush_rx_ring - remove all descriptors from the rx_ring
2965 struct e1000_hw *hw = &sc->hw; in em_flush_rx_ring()
2992 * em_flush_desc_rings - remove all descriptors from the descriptor rings
3004 struct e1000_hw *hw = &sc->hw; in em_flush_desc_rings()
3005 device_t dev = sc->dev; in em_flush_desc_rings()
3030 * Initialize the hardware to a configuration as specified by the
3040 struct e1000_hw *hw = &sc->hw; in em_reset()
3049 if (!em_smart_pwr_down && (hw->mac.type == e1000_82571 || in em_reset()
3050 hw->mac.type == e1000_82572)) { in em_reset()
3064 switch (hw->mac.type) { in em_reset()
3068 if (hw->mac.max_frame_size > 8192) in em_reset()
3093 if (hw->mac.max_frame_size > 4096) in em_reset()
3130 if (hw->mac.max_frame_size > 8192) in em_reset()
3137 if ((hw->mac.type == e1000_82575) && (if_getmtu(ifp) > ETHERMTU)) { in em_reset()
3142 min_tx = (hw->mac.max_frame_size + in em_reset()
3143 sizeof(struct e1000_tx_desc) - ETHERNET_FCS_SIZE) * 2; in em_reset()
3146 min_rx = hw->mac.max_frame_size; in em_reset()
3150 ((min_tx - tx_space) < pba)) { in em_reset()
3151 pba = pba - (min_tx - tx_space); in em_reset()
3162 if (hw->mac.type < igb_mac_min) in em_reset()
3170 * - High water mark should allow for at least two frames to be in em_reset()
3172 * - Low water mark works best when it is very near the high water in em_reset()
3180 * - The pause time is fairly large at 1000 x 512ns = 512 usec. in em_reset()
3183 hw->fc.high_water = rx_buffer_size - in em_reset()
3184 roundup2(hw->mac.max_frame_size, 1024); in em_reset()
3185 hw->fc.low_water = hw->fc.high_water - 1500; in em_reset()
3187 if (sc->fc) /* locally set flow control value? */ in em_reset()
3188 hw->fc.requested_mode = sc->fc; in em_reset()
3190 hw->fc.requested_mode = e1000_fc_full; in em_reset()
3192 if (hw->mac.type == e1000_80003es2lan) in em_reset()
3193 hw->fc.pause_time = 0xFFFF; in em_reset()
3195 hw->fc.pause_time = EM_FC_PAUSE_TIME; in em_reset()
3197 hw->fc.send_xon = true; in em_reset()
3200 switch (hw->mac.type) { in em_reset()
3203 hw->fc.requested_mode = e1000_fc_rx_pause; in em_reset()
3204 hw->fc.pause_time = 0xFFFF; /* override */ in em_reset()
3206 hw->fc.high_water = 0x3500; in em_reset()
3207 hw->fc.low_water = 0x1500; in em_reset()
3209 hw->fc.high_water = 0x5000; in em_reset()
3210 hw->fc.low_water = 0x3000; in em_reset()
3212 hw->fc.refresh_time = 0x1000; in em_reset()
3222 hw->fc.high_water = 0x5C20; in em_reset()
3223 hw->fc.low_water = 0x5048; in em_reset()
3224 hw->fc.pause_time = 0x0650; in em_reset()
3225 hw->fc.refresh_time = 0x0400; in em_reset()
3234 /* 8-byte granularity */ in em_reset()
3235 hw->fc.low_water = hw->fc.high_water - 8; in em_reset()
3244 /* 16-byte granularity */ in em_reset()
3245 hw->fc.low_water = hw->fc.high_water - 16; in em_reset()
3250 hw->fc.high_water = 0x2800; in em_reset()
3251 hw->fc.low_water = hw->fc.high_water - 8; in em_reset()
3256 if (hw->mac.type == e1000_80003es2lan) in em_reset()
3257 hw->fc.pause_time = 0xFFFF; in em_reset()
3262 if (sc->hw.mac.type >= e1000_pch_spt && sc->hw.mac.type < igb_mac_min) in em_reset()
3267 if (!sc->vf_ifp) { in em_reset()
3268 if (hw->mac.type >= igb_mac_min) { in em_reset()
3275 if (sc->flags & IGB_MEDIA_RESET) { in em_reset()
3278 sc->flags &= ~IGB_MEDIA_RESET; in em_reset()
3280 /* and a re-init */ in em_reset()
3282 device_printf(dev, "Hardware Initialization Failed\n"); in em_reset()
3285 if (hw->mac.type >= igb_mac_min) in em_reset()
3289 sc->pba = pba; in em_reset()
3307 struct e1000_hw *hw = &sc->hw; in em_initialize_rss_mapping()
3328 q = (i % sc->rx_num_queues) << 7; in em_initialize_rss_mapping()
3346 struct e1000_hw *hw = &sc->hw; in igb_initialize_rss_mapping()
3353 if (hw->mac.type == e1000_82575) in igb_initialize_rss_mapping()
3362 * This just allocates buckets to queues using round-robin in igb_initialize_rss_mapping()
3387 queue_id = queue_id % sc->rx_num_queues; in igb_initialize_rss_mapping()
3389 queue_id = (i % sc->rx_num_queues); in igb_initialize_rss_mapping()
3448 if_softc_ctx_t scctx = sc->shared; in em_setup_interface()
3453 if (sc->tx_num_queues == 1) { in em_setup_interface()
3454 if_setsendqlen(ifp, scctx->isc_ntxd[0] - 1); in em_setup_interface()
3462 if (sc->hw.phy.media_type == e1000_media_type_fiber || in em_setup_interface()
3463 sc->hw.phy.media_type == e1000_media_type_internal_serdes) { in em_setup_interface()
3466 if (sc->hw.mac.type == e1000_82545) in em_setup_interface()
3468 ifmedia_add(sc->media, in em_setup_interface()
3470 ifmedia_add(sc->media, IFM_ETHER | fiber_type, 0, NULL); in em_setup_interface()
3472 ifmedia_add(sc->media, IFM_ETHER | IFM_10_T, 0, NULL); in em_setup_interface()
3473 ifmedia_add(sc->media, in em_setup_interface()
3475 ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX, 0, NULL); in em_setup_interface()
3476 ifmedia_add(sc->media, in em_setup_interface()
3478 if (sc->hw.phy.type != e1000_phy_ife) { in em_setup_interface()
3479 ifmedia_add(sc->media, in em_setup_interface()
3481 ifmedia_add(sc->media, in em_setup_interface()
3485 ifmedia_add(sc->media, IFM_ETHER | IFM_AUTO, 0, NULL); in em_setup_interface()
3486 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO); in em_setup_interface()
3495 if_softc_ctx_t scctx = sc->shared; in em_if_tx_queues_alloc()
3500 MPASS(sc->tx_num_queues > 0); in em_if_tx_queues_alloc()
3501 MPASS(sc->tx_num_queues == ntxqsets); in em_if_tx_queues_alloc()
3504 if (!(sc->tx_queues = in em_if_tx_queues_alloc()
3506 sc->tx_num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) { in em_if_tx_queues_alloc()
3512 for (i = 0, que = sc->tx_queues; i < sc->tx_num_queues; i++, que++) { in em_if_tx_queues_alloc()
3515 struct tx_ring *txr = &que->txr; in em_if_tx_queues_alloc()
3516 txr->sc = que->sc = sc; in em_if_tx_queues_alloc()
3517 que->me = txr->me = i; in em_if_tx_queues_alloc()
3520 if (!(txr->tx_rsq = in em_if_tx_queues_alloc()
3521 (qidx_t *) malloc(sizeof(qidx_t) * scctx->isc_ntxd[0], in em_if_tx_queues_alloc()
3528 for (j = 0; j < scctx->isc_ntxd[0]; j++) in em_if_tx_queues_alloc()
3529 txr->tx_rsq[j] = QIDX_INVALID; in em_if_tx_queues_alloc()
3530 /* get the virtual and physical address of hardware queues */ in em_if_tx_queues_alloc()
3531 txr->tx_base = (struct e1000_tx_desc *)vaddrs[i*ntxqs]; in em_if_tx_queues_alloc()
3532 txr->tx_paddr = paddrs[i*ntxqs]; in em_if_tx_queues_alloc()
3537 "allocated for %d tx_queues\n", sc->tx_num_queues); in em_if_tx_queues_alloc()
3553 MPASS(sc->rx_num_queues > 0); in em_if_rx_queues_alloc()
3554 MPASS(sc->rx_num_queues == nrxqsets); in em_if_rx_queues_alloc()
3557 if (!(sc->rx_queues = in em_if_rx_queues_alloc()
3559 sc->rx_num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) { in em_if_rx_queues_alloc()
3566 for (i = 0, que = sc->rx_queues; i < nrxqsets; i++, que++) { in em_if_rx_queues_alloc()
3568 struct rx_ring *rxr = &que->rxr; in em_if_rx_queues_alloc()
3569 rxr->sc = que->sc = sc; in em_if_rx_queues_alloc()
3570 rxr->que = que; in em_if_rx_queues_alloc()
3571 que->me = rxr->me = i; in em_if_rx_queues_alloc()
3573 /* get the virtual and physical address of hardware queues */ in em_if_rx_queues_alloc()
3574 rxr->rx_base = in em_if_rx_queues_alloc()
3576 rxr->rx_paddr = paddrs[i*nrxqs]; in em_if_rx_queues_alloc()
3581 "allocated for %d rx_queues\n", sc->rx_num_queues); in em_if_rx_queues_alloc()
3593 struct em_tx_queue *tx_que = sc->tx_queues; in em_if_queues_free()
3594 struct em_rx_queue *rx_que = sc->rx_queues; in em_if_queues_free()
3597 for (int i = 0; i < sc->tx_num_queues; i++, tx_que++) { in em_if_queues_free()
3598 struct tx_ring *txr = &tx_que->txr; in em_if_queues_free()
3599 if (txr->tx_rsq == NULL) in em_if_queues_free()
3602 free(txr->tx_rsq, M_DEVBUF); in em_if_queues_free()
3603 txr->tx_rsq = NULL; in em_if_queues_free()
3605 free(sc->tx_queues, M_DEVBUF); in em_if_queues_free()
3606 sc->tx_queues = NULL; in em_if_queues_free()
3610 free(sc->rx_queues, M_DEVBUF); in em_if_queues_free()
3611 sc->rx_queues = NULL; in em_if_queues_free()
3624 if_softc_ctx_t scctx = sc->shared; in em_initialize_transmit_unit()
3627 struct e1000_hw *hw = &sc->hw; in em_initialize_transmit_unit()
3632 for (int i = 0; i < sc->tx_num_queues; i++, txr++) { in em_initialize_transmit_unit()
3636 que = &sc->tx_queues[i]; in em_initialize_transmit_unit()
3637 txr = &que->txr; in em_initialize_transmit_unit()
3638 bus_addr = txr->tx_paddr; in em_initialize_transmit_unit()
3641 offp = (caddr_t)&txr->csum_flags; in em_initialize_transmit_unit()
3643 bzero(offp, endp - offp); in em_initialize_transmit_unit()
3647 scctx->isc_ntxd[0] * sizeof(struct e1000_tx_desc)); in em_initialize_transmit_unit()
3670 switch (hw->mac.type) { in em_initialize_transmit_unit()
3682 if (hw->phy.media_type == e1000_media_type_fiber || in em_initialize_transmit_unit()
3683 hw->phy.media_type == e1000_media_type_internal_serdes) in em_initialize_transmit_unit()
3691 if (hw->mac.type < igb_mac_min) { in em_initialize_transmit_unit()
3693 E1000_WRITE_REG(hw, E1000_TIDV, sc->tx_int_delay.value); in em_initialize_transmit_unit()
3695 if (sc->tx_int_delay.value > 0) in em_initialize_transmit_unit()
3696 sc->txd_cmd |= E1000_TXD_CMD_IDE; in em_initialize_transmit_unit()
3699 if (hw->mac.type >= e1000_82540) in em_initialize_transmit_unit()
3700 E1000_WRITE_REG(hw, E1000_TADV, sc->tx_abs_int_delay.value); in em_initialize_transmit_unit()
3702 if (hw->mac.type == e1000_82571 || hw->mac.type == e1000_82572) { in em_initialize_transmit_unit()
3706 } else if (hw->mac.type == e1000_80003es2lan) { in em_initialize_transmit_unit()
3714 } else if (hw->mac.type == e1000_82574) { in em_initialize_transmit_unit()
3717 if ( sc->tx_num_queues > 1) { in em_initialize_transmit_unit()
3731 if (hw->mac.type >= e1000_82571 && hw->mac.type < igb_mac_min) in em_initialize_transmit_unit()
3738 if (hw->mac.type == e1000_pch_spt) { in em_initialize_transmit_unit()
3743 /* i218-i219 Specification Update 1.5.4.5 */ in em_initialize_transmit_unit()
3756 #define BSIZEPKT_ROUNDUP ((1<<E1000_SRRCTL_BSIZEPKT_SHIFT)-1)
3762 if_softc_ctx_t scctx = sc->shared; in em_initialize_receive_unit()
3764 struct e1000_hw *hw = &sc->hw; in em_initialize_receive_unit()
3776 /* Do not disable if ever enabled on this hardware */ in em_initialize_receive_unit()
3777 if ((hw->mac.type != e1000_82574) && (hw->mac.type != e1000_82583)) in em_initialize_receive_unit()
3784 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT); in em_initialize_receive_unit()
3800 if (hw->mac.type < igb_mac_min) { in em_initialize_receive_unit()
3801 if (hw->mac.type >= e1000_82540) { in em_initialize_receive_unit()
3803 sc->rx_abs_int_delay.value); in em_initialize_receive_unit()
3816 if (hw->mac.type == e1000_82573) in em_initialize_receive_unit()
3820 sc->rx_int_delay.value); in em_initialize_receive_unit()
3823 if (hw->mac.type >= em_mac_min && !sc->vf_ifp) { in em_initialize_receive_unit()
3830 * When using MSI-X interrupts we need to throttle in em_initialize_receive_unit()
3833 if (hw->mac.type == e1000_82574) { in em_initialize_receive_unit()
3837 /* Disable accelerated acknowledge */ in em_initialize_receive_unit()
3847 if (!sc->vf_ifp) { in em_initialize_receive_unit()
3851 if (hw->mac.type > e1000_82575) in em_initialize_receive_unit()
3853 else if (hw->mac.type < em_mac_min && in em_initialize_receive_unit()
3858 if (hw->mac.type > e1000_82575) in em_initialize_receive_unit()
3860 else if (hw->mac.type < em_mac_min) in em_initialize_receive_unit()
3864 if (sc->rx_num_queues > 1) { in em_initialize_receive_unit()
3868 if (hw->mac.type >= igb_mac_min) in em_initialize_receive_unit()
3876 for (i = 0, que = sc->rx_queues; i < sc->rx_num_queues; i++, que++) { in em_initialize_receive_unit()
3877 struct rx_ring *rxr = &que->rxr; in em_initialize_receive_unit()
3879 u64 bus_addr = rxr->rx_paddr; in em_initialize_receive_unit()
3881 u32 rdt = sc->rx_num_queues -1; /* default */ in em_initialize_receive_unit()
3885 scctx->isc_nrxd[0] * in em_initialize_receive_unit()
3901 if ((hw->mac.type == e1000_ich9lan || hw->mac.type == e1000_pch2lan || in em_initialize_receive_unit()
3902 hw->mac.type == e1000_ich10lan) && if_getmtu(ifp) > ETHERMTU) { in em_initialize_receive_unit()
3905 } else if (hw->mac.type == e1000_82574) { in em_initialize_receive_unit()
3906 for (int i = 0; i < sc->rx_num_queues; i++) { in em_initialize_receive_unit()
3914 } else if (hw->mac.type >= igb_mac_min) { in em_initialize_receive_unit()
3918 psize = scctx->isc_max_frame_size; in em_initialize_receive_unit()
3923 if (sc->vf_ifp) in em_initialize_receive_unit()
3930 srrctl |= (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >> in em_initialize_receive_unit()
3940 if ((sc->rx_num_queues > 1) && in em_initialize_receive_unit()
3941 (sc->fc == e1000_fc_none || in em_initialize_receive_unit()
3942 sc->fc == e1000_fc_rx_pause)) { in em_initialize_receive_unit()
3946 for (i = 0, que = sc->rx_queues; i < sc->rx_num_queues; in em_initialize_receive_unit()
3948 struct rx_ring *rxr = &que->rxr; in em_initialize_receive_unit()
3949 u64 bus_addr = rxr->rx_paddr; in em_initialize_receive_unit()
3953 /* Configure for header split? -- ignore for now */ in em_initialize_receive_unit()
3954 rxr->hdr_split = igb_header_split; in em_initialize_receive_unit()
3960 scctx->isc_nrxd[0] * in em_initialize_receive_unit()
3976 } else if (hw->mac.type >= e1000_pch2lan) { in em_initialize_receive_unit()
3987 if (hw->mac.type < igb_mac_min) { in em_initialize_receive_unit()
3988 if (sc->rx_mbuf_sz > 2048 && sc->rx_mbuf_sz <= 4096) in em_initialize_receive_unit()
3990 else if (sc->rx_mbuf_sz > 4096 && sc->rx_mbuf_sz <= 8192) in em_initialize_receive_unit()
3992 else if (sc->rx_mbuf_sz > 8192) in em_initialize_receive_unit()
4024 sc->shadow_vfta[index] |= (1 << bit); in em_if_vlan_register()
4025 ++sc->num_vlans; in em_if_vlan_register()
4037 sc->shadow_vfta[index] &= ~(1 << bit); in em_if_vlan_unregister()
4038 --sc->num_vlans; in em_if_vlan_unregister()
4063 if (sc->shadow_vfta[i] != 0) in em_if_vlan_filter_used()
4072 struct e1000_hw *hw = &sc->hw; in em_if_vlan_filter_enable()
4084 struct e1000_hw *hw = &sc->hw; in em_if_vlan_filter_disable()
4095 struct e1000_hw *hw = &sc->hw; in em_if_vlan_filter_write()
4097 if (sc->vf_ifp) in em_if_vlan_filter_write()
4101 if (hw->mac.type < em_mac_min) in em_if_vlan_filter_write()
4102 em_if_intr_disable(sc->ctx); in em_if_vlan_filter_write()
4105 if (sc->shadow_vfta[i] != 0) { in em_if_vlan_filter_write()
4107 if (sc->vf_ifp) in em_if_vlan_filter_write()
4108 e1000_vfta_set_vf(hw, sc->shadow_vfta[i], in em_if_vlan_filter_write()
4111 e1000_write_vfta(hw, i, sc->shadow_vfta[i]); in em_if_vlan_filter_write()
4114 /* Re-enable interrupts for lem-class devices */ in em_if_vlan_filter_write()
4115 if (hw->mac.type < em_mac_min) in em_if_vlan_filter_write()
4116 em_if_intr_enable(sc->ctx); in em_if_vlan_filter_write()
4123 struct e1000_hw *hw = &sc->hw; in em_setup_vlan_hw_support()
4130 if (sc->vf_ifp) in em_setup_vlan_hw_support()
4166 struct e1000_hw *hw = &sc->hw; in em_if_intr_enable()
4169 if (sc->intr_type == IFLIB_INTR_MSIX) { in em_if_intr_enable()
4170 E1000_WRITE_REG(hw, EM_EIAC, sc->ims); in em_if_intr_enable()
4171 ims_mask |= sc->ims; in em_if_intr_enable()
4182 struct e1000_hw *hw = &sc->hw; in em_if_intr_disable()
4184 if (sc->intr_type == IFLIB_INTR_MSIX) in em_if_intr_disable()
4194 struct e1000_hw *hw = &sc->hw; in igb_if_intr_enable()
4197 if (__predict_true(sc->intr_type == IFLIB_INTR_MSIX)) { in igb_if_intr_enable()
4198 mask = (sc->que_mask | sc->link_mask); in igb_if_intr_enable()
4212 struct e1000_hw *hw = &sc->hw; in igb_if_intr_disable()
4214 if (__predict_true(sc->intr_type == IFLIB_INTR_MSIX)) { in igb_if_intr_disable()
4225 * to disable special hardware management features
4232 if (sc->has_manage) { in em_init_manageability()
4233 int manc2h = E1000_READ_REG(&sc->hw, E1000_MANC2H); in em_init_manageability()
4234 int manc = E1000_READ_REG(&sc->hw, E1000_MANC); in em_init_manageability()
4236 /* disable hardware interception of ARP */ in em_init_manageability()
4245 E1000_WRITE_REG(&sc->hw, E1000_MANC2H, manc2h); in em_init_manageability()
4246 E1000_WRITE_REG(&sc->hw, E1000_MANC, manc); in em_init_manageability()
4251 * Give control back to hardware management
4257 if (sc->has_manage) { in em_release_manageability()
4258 int manc = E1000_READ_REG(&sc->hw, E1000_MANC); in em_release_manageability()
4260 /* re-enable hardware interception of ARP */ in em_release_manageability()
4264 E1000_WRITE_REG(&sc->hw, E1000_MANC, manc); in em_release_manageability()
4279 if (sc->vf_ifp) in em_get_hw_control()
4282 if (sc->hw.mac.type == e1000_82573) { in em_get_hw_control()
4283 swsm = E1000_READ_REG(&sc->hw, E1000_SWSM); in em_get_hw_control()
4284 E1000_WRITE_REG(&sc->hw, E1000_SWSM, in em_get_hw_control()
4289 ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT); in em_get_hw_control()
4290 E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, in em_get_hw_control()
4305 if (!sc->has_manage) in em_release_hw_control()
4308 if (sc->hw.mac.type == e1000_82573) { in em_release_hw_control()
4309 swsm = E1000_READ_REG(&sc->hw, E1000_SWSM); in em_release_hw_control()
4310 E1000_WRITE_REG(&sc->hw, E1000_SWSM, in em_release_hw_control()
4315 ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT); in em_release_hw_control()
4316 E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, in em_release_hw_control()
4340 if (!em_unsupported_tso && sc->link_speed && in em_automask_tso()
4341 sc->link_speed != SPEED_1000 && in em_automask_tso()
4342 scctx->isc_capenable & IFCAP_TSO) { in em_automask_tso()
4343 device_printf(sc->dev, in em_automask_tso()
4345 sc->tso_automasked = scctx->isc_capenable & IFCAP_TSO; in em_automask_tso()
4346 scctx->isc_capenable &= ~IFCAP_TSO; in em_automask_tso()
4351 } else if (sc->link_speed == SPEED_1000 && sc->tso_automasked) { in em_automask_tso()
4352 device_printf(sc->dev, "Re-enabling TSO for GbE.\n"); in em_automask_tso()
4353 scctx->isc_capenable |= sc->tso_automasked; in em_automask_tso()
4354 if_setcapenablebit(ifp, sc->tso_automasked, 0); in em_automask_tso()
4355 sc->tso_automasked = 0; in em_automask_tso()
4366 ** to both system management and wake-on-lan for
4376 sc->has_manage = e1000_enable_mng_pass_thru(&sc->hw); in em_get_wakeup()
4379 switch (sc->hw.mac.type) { in em_get_wakeup()
4386 e1000_read_nvm(&sc->hw, in em_get_wakeup()
4392 if (sc->hw.bus.func == 1) { in em_get_wakeup()
4393 e1000_read_nvm(&sc->hw, in em_get_wakeup()
4397 e1000_read_nvm(&sc->hw, in em_get_wakeup()
4402 sc->has_amt = true; in em_get_wakeup()
4407 if (sc->hw.bus.func == 1) { in em_get_wakeup()
4408 e1000_read_nvm(&sc->hw, in em_get_wakeup()
4412 e1000_read_nvm(&sc->hw, in em_get_wakeup()
4430 sc->has_amt = true; in em_get_wakeup()
4431 eeprom_data = E1000_READ_REG(&sc->hw, E1000_WUC); in em_get_wakeup()
4434 e1000_read_nvm(&sc->hw, in em_get_wakeup()
4439 sc->wol = (E1000_WUFC_MAG | E1000_WUFC_MC); in em_get_wakeup()
4448 sc->wol = 0; in em_get_wakeup()
4454 if (E1000_READ_REG(&sc->hw, E1000_STATUS) & in em_get_wakeup()
4456 sc->wol = 0; in em_get_wakeup()
4461 sc->wol = 0; in em_get_wakeup()
4469 if (E1000_READ_REG(&sc->hw, E1000_STATUS) & in em_get_wakeup()
4471 sc->wol = 0; in em_get_wakeup()
4478 sc->wol = 0; in em_get_wakeup()
4507 sc->wol &= ~E1000_WUFC_MAG; in em_enable_wakeup()
4510 sc->wol &= ~E1000_WUFC_EX; in em_enable_wakeup()
4513 sc->wol &= ~E1000_WUFC_MC; in em_enable_wakeup()
4515 rctl = E1000_READ_REG(&sc->hw, E1000_RCTL); in em_enable_wakeup()
4517 E1000_WRITE_REG(&sc->hw, E1000_RCTL, rctl); in em_enable_wakeup()
4520 if (!(sc->wol & (E1000_WUFC_EX | E1000_WUFC_MAG | E1000_WUFC_MC))) in em_enable_wakeup()
4524 ctrl = E1000_READ_REG(&sc->hw, E1000_CTRL); in em_enable_wakeup()
4526 E1000_WRITE_REG(&sc->hw, E1000_CTRL, ctrl); in em_enable_wakeup()
4529 if (sc->hw.phy.media_type == e1000_media_type_fiber || in em_enable_wakeup()
4530 sc->hw.phy.media_type == e1000_media_type_internal_serdes) { in em_enable_wakeup()
4531 ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT); in em_enable_wakeup()
4533 E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, ctrl_ext); in em_enable_wakeup()
4536 if ((sc->hw.mac.type == e1000_ich8lan) || in em_enable_wakeup()
4537 (sc->hw.mac.type == e1000_pchlan) || in em_enable_wakeup()
4538 (sc->hw.mac.type == e1000_ich9lan) || in em_enable_wakeup()
4539 (sc->hw.mac.type == e1000_ich10lan)) in em_enable_wakeup()
4540 e1000_suspend_workarounds_ich8lan(&sc->hw); in em_enable_wakeup()
4542 if ( sc->hw.mac.type >= e1000_pchlan) { in em_enable_wakeup()
4548 E1000_WRITE_REG(&sc->hw, E1000_WUC, E1000_WUC_PME_EN); in em_enable_wakeup()
4549 E1000_WRITE_REG(&sc->hw, E1000_WUFC, sc->wol); in em_enable_wakeup()
4552 if (sc->hw.phy.type == e1000_phy_igp_3) in em_enable_wakeup()
4553 e1000_igp3_phy_powerdown_workaround_ich8lan(&sc->hw); in em_enable_wakeup()
4569 struct e1000_hw *hw = &sc->hw; in em_enable_phy_wakeup()
4577 for (int i = 0; i < hw->mac.mta_reg_count; i++) { in em_enable_phy_wakeup()
4607 E1000_WRITE_REG(hw, E1000_WUFC, sc->wol); in em_enable_phy_wakeup()
4610 e1000_write_phy_reg(hw, BM_WUFC, sc->wol); in em_enable_phy_wakeup()
4614 ret = hw->phy.ops.acquire(hw); in em_enable_phy_wakeup()
4631 hw->phy.ops.release(hw); in em_enable_phy_wakeup()
4642 e1000_setup_led(&sc->hw); in em_if_led_func()
4643 e1000_led_on(&sc->hw); in em_if_led_func()
4645 e1000_led_off(&sc->hw); in em_if_led_func()
4646 e1000_cleanup_led(&sc->hw); in em_if_led_func()
4658 device_t dev = sc->dev; in em_disable_aspm()
4660 switch (sc->hw.mac.type) { in em_disable_aspm()
4692 if (sc->vf_ifp) { in em_update_stats_counters()
4697 stats = &sc->ustats.stats; in em_update_stats_counters()
4698 prev_xoffrxc = stats->xoffrxc; in em_update_stats_counters()
4700 if(sc->hw.phy.media_type == e1000_media_type_copper || in em_update_stats_counters()
4701 (E1000_READ_REG(&sc->hw, E1000_STATUS) & E1000_STATUS_LU)) { in em_update_stats_counters()
4702 stats->symerrs += E1000_READ_REG(&sc->hw, E1000_SYMERRS); in em_update_stats_counters()
4703 stats->sec += E1000_READ_REG(&sc->hw, E1000_SEC); in em_update_stats_counters()
4705 stats->crcerrs += E1000_READ_REG(&sc->hw, E1000_CRCERRS); in em_update_stats_counters()
4706 stats->mpc += E1000_READ_REG(&sc->hw, E1000_MPC); in em_update_stats_counters()
4707 stats->scc += E1000_READ_REG(&sc->hw, E1000_SCC); in em_update_stats_counters()
4708 stats->ecol += E1000_READ_REG(&sc->hw, E1000_ECOL); in em_update_stats_counters()
4710 stats->mcc += E1000_READ_REG(&sc->hw, E1000_MCC); in em_update_stats_counters()
4711 stats->latecol += E1000_READ_REG(&sc->hw, E1000_LATECOL); in em_update_stats_counters()
4712 stats->colc += E1000_READ_REG(&sc->hw, E1000_COLC); in em_update_stats_counters()
4713 stats->dc += E1000_READ_REG(&sc->hw, E1000_DC); in em_update_stats_counters()
4714 stats->rlec += E1000_READ_REG(&sc->hw, E1000_RLEC); in em_update_stats_counters()
4715 stats->xonrxc += E1000_READ_REG(&sc->hw, E1000_XONRXC); in em_update_stats_counters()
4716 stats->xontxc += E1000_READ_REG(&sc->hw, E1000_XONTXC); in em_update_stats_counters()
4717 stats->xoffrxc += E1000_READ_REG(&sc->hw, E1000_XOFFRXC); in em_update_stats_counters()
4722 if (stats->xoffrxc != prev_xoffrxc) in em_update_stats_counters()
4723 sc->shared->isc_pause_frames = 1; in em_update_stats_counters()
4724 stats->xofftxc += E1000_READ_REG(&sc->hw, E1000_XOFFTXC); in em_update_stats_counters()
4725 stats->fcruc += E1000_READ_REG(&sc->hw, E1000_FCRUC); in em_update_stats_counters()
4726 stats->prc64 += E1000_READ_REG(&sc->hw, E1000_PRC64); in em_update_stats_counters()
4727 stats->prc127 += E1000_READ_REG(&sc->hw, E1000_PRC127); in em_update_stats_counters()
4728 stats->prc255 += E1000_READ_REG(&sc->hw, E1000_PRC255); in em_update_stats_counters()
4729 stats->prc511 += E1000_READ_REG(&sc->hw, E1000_PRC511); in em_update_stats_counters()
4730 stats->prc1023 += E1000_READ_REG(&sc->hw, E1000_PRC1023); in em_update_stats_counters()
4731 stats->prc1522 += E1000_READ_REG(&sc->hw, E1000_PRC1522); in em_update_stats_counters()
4732 stats->gprc += E1000_READ_REG(&sc->hw, E1000_GPRC); in em_update_stats_counters()
4733 stats->bprc += E1000_READ_REG(&sc->hw, E1000_BPRC); in em_update_stats_counters()
4734 stats->mprc += E1000_READ_REG(&sc->hw, E1000_MPRC); in em_update_stats_counters()
4735 stats->gptc += E1000_READ_REG(&sc->hw, E1000_GPTC); in em_update_stats_counters()
4737 /* For the 64-bit byte counters the low dword must be read first. */ in em_update_stats_counters()
4740 stats->gorc += E1000_READ_REG(&sc->hw, E1000_GORCL) + in em_update_stats_counters()
4741 ((u64)E1000_READ_REG(&sc->hw, E1000_GORCH) << 32); in em_update_stats_counters()
4742 stats->gotc += E1000_READ_REG(&sc->hw, E1000_GOTCL) + in em_update_stats_counters()
4743 ((u64)E1000_READ_REG(&sc->hw, E1000_GOTCH) << 32); in em_update_stats_counters()
4745 stats->rnbc += E1000_READ_REG(&sc->hw, E1000_RNBC); in em_update_stats_counters()
4746 stats->ruc += E1000_READ_REG(&sc->hw, E1000_RUC); in em_update_stats_counters()
4747 stats->rfc += E1000_READ_REG(&sc->hw, E1000_RFC); in em_update_stats_counters()
4748 stats->roc += E1000_READ_REG(&sc->hw, E1000_ROC); in em_update_stats_counters()
4749 stats->rjc += E1000_READ_REG(&sc->hw, E1000_RJC); in em_update_stats_counters()
4751 stats->mgprc += E1000_READ_REG(&sc->hw, E1000_MGTPRC); in em_update_stats_counters()
4752 stats->mgpdc += E1000_READ_REG(&sc->hw, E1000_MGTPDC); in em_update_stats_counters()
4753 stats->mgptc += E1000_READ_REG(&sc->hw, E1000_MGTPTC); in em_update_stats_counters()
4755 stats->tor += E1000_READ_REG(&sc->hw, E1000_TORH); in em_update_stats_counters()
4756 stats->tot += E1000_READ_REG(&sc->hw, E1000_TOTH); in em_update_stats_counters()
4758 stats->tpr += E1000_READ_REG(&sc->hw, E1000_TPR); in em_update_stats_counters()
4759 stats->tpt += E1000_READ_REG(&sc->hw, E1000_TPT); in em_update_stats_counters()
4760 stats->ptc64 += E1000_READ_REG(&sc->hw, E1000_PTC64); in em_update_stats_counters()
4761 stats->ptc127 += E1000_READ_REG(&sc->hw, E1000_PTC127); in em_update_stats_counters()
4762 stats->ptc255 += E1000_READ_REG(&sc->hw, E1000_PTC255); in em_update_stats_counters()
4763 stats->ptc511 += E1000_READ_REG(&sc->hw, E1000_PTC511); in em_update_stats_counters()
4764 stats->ptc1023 += E1000_READ_REG(&sc->hw, E1000_PTC1023); in em_update_stats_counters()
4765 stats->ptc1522 += E1000_READ_REG(&sc->hw, E1000_PTC1522); in em_update_stats_counters()
4766 stats->mptc += E1000_READ_REG(&sc->hw, E1000_MPTC); in em_update_stats_counters()
4767 stats->bptc += E1000_READ_REG(&sc->hw, E1000_BPTC); in em_update_stats_counters()
4771 stats->iac += E1000_READ_REG(&sc->hw, E1000_IAC); in em_update_stats_counters()
4772 stats->icrxptc += E1000_READ_REG(&sc->hw, E1000_ICRXPTC); in em_update_stats_counters()
4773 stats->icrxatc += E1000_READ_REG(&sc->hw, E1000_ICRXATC); in em_update_stats_counters()
4774 stats->ictxptc += E1000_READ_REG(&sc->hw, E1000_ICTXPTC); in em_update_stats_counters()
4775 stats->ictxatc += E1000_READ_REG(&sc->hw, E1000_ICTXATC); in em_update_stats_counters()
4776 stats->ictxqec += E1000_READ_REG(&sc->hw, E1000_ICTXQEC); in em_update_stats_counters()
4777 stats->ictxqmtc += E1000_READ_REG(&sc->hw, E1000_ICTXQMTC); in em_update_stats_counters()
4778 stats->icrxdmtc += E1000_READ_REG(&sc->hw, E1000_ICRXDMTC); in em_update_stats_counters()
4779 stats->icrxoc += E1000_READ_REG(&sc->hw, E1000_ICRXOC); in em_update_stats_counters()
4781 if (sc->hw.mac.type >= e1000_82543) { in em_update_stats_counters()
4782 stats->algnerrc += in em_update_stats_counters()
4783 E1000_READ_REG(&sc->hw, E1000_ALGNERRC); in em_update_stats_counters()
4784 stats->rxerrc += in em_update_stats_counters()
4785 E1000_READ_REG(&sc->hw, E1000_RXERRC); in em_update_stats_counters()
4786 stats->tncrs += in em_update_stats_counters()
4787 E1000_READ_REG(&sc->hw, E1000_TNCRS); in em_update_stats_counters()
4788 stats->cexterr += in em_update_stats_counters()
4789 E1000_READ_REG(&sc->hw, E1000_CEXTERR); in em_update_stats_counters()
4790 stats->tsctc += in em_update_stats_counters()
4791 E1000_READ_REG(&sc->hw, E1000_TSCTC); in em_update_stats_counters()
4792 stats->tsctfc += in em_update_stats_counters()
4793 E1000_READ_REG(&sc->hw, E1000_TSCTFC); in em_update_stats_counters()
4802 if (sc->link_speed == 0) in em_update_vf_stats_counters()
4805 stats = &sc->ustats.vf_stats; in em_update_vf_stats_counters()
4808 stats->last_gprc, stats->gprc); in em_update_vf_stats_counters()
4810 stats->last_gorc, stats->gorc); in em_update_vf_stats_counters()
4812 stats->last_gptc, stats->gptc); in em_update_vf_stats_counters()
4814 stats->last_gotc, stats->gotc); in em_update_vf_stats_counters()
4816 stats->last_mprc, stats->mprc); in em_update_vf_stats_counters()
4827 return sc->dropped_pkts; in em_if_get_vf_counter()
4830 sc->watchdog_events); in em_if_get_vf_counter()
4843 if (sc->vf_ifp) in em_if_get_counter()
4846 stats = &sc->ustats.stats; in em_if_get_counter()
4850 return (stats->colc); in em_if_get_counter()
4852 return (sc->dropped_pkts + stats->rxerrc + in em_if_get_counter()
4853 stats->crcerrs + stats->algnerrc + in em_if_get_counter()
4854 stats->ruc + stats->roc + in em_if_get_counter()
4855 stats->mpc + stats->cexterr); in em_if_get_counter()
4858 stats->ecol + stats->latecol + sc->watchdog_events); in em_if_get_counter()
4864 /* em_if_needs_restart - Tell iflib when the driver needs to be reinitialized
4882 /* Export a single 32-bit register via a read-only sysctl. */
4889 sc = oidp->oid_arg1; in em_sysctl_reg_handler()
4890 val = E1000_READ_REG(&sc->hw, oidp->oid_arg2); in em_sysctl_reg_handler()
4904 bool tx = oidp->oid_arg2; in em_sysctl_interrupt_rate_handler()
4907 tque = oidp->oid_arg1; in em_sysctl_interrupt_rate_handler()
4908 hw = &tque->sc->hw; in em_sysctl_interrupt_rate_handler()
4909 if (hw->mac.type >= igb_mac_min) in em_sysctl_interrupt_rate_handler()
4910 reg = E1000_READ_REG(hw, E1000_EITR(tque->me)); in em_sysctl_interrupt_rate_handler()
4911 else if (hw->mac.type == e1000_82574 && tque->msix) in em_sysctl_interrupt_rate_handler()
4912 reg = E1000_READ_REG(hw, E1000_EITR_82574(tque->me)); in em_sysctl_interrupt_rate_handler()
4916 rque = oidp->oid_arg1; in em_sysctl_interrupt_rate_handler()
4917 hw = &rque->sc->hw; in em_sysctl_interrupt_rate_handler()
4918 if (hw->mac.type >= igb_mac_min) in em_sysctl_interrupt_rate_handler()
4919 reg = E1000_READ_REG(hw, E1000_EITR(rque->msix)); in em_sysctl_interrupt_rate_handler()
4920 else if (hw->mac.type == e1000_82574 && rque->msix) in em_sysctl_interrupt_rate_handler()
4922 E1000_EITR_82574(rque->msix)); in em_sysctl_interrupt_rate_handler()
4927 if (hw->mac.type < igb_mac_min) { in em_sysctl_interrupt_rate_handler()
4941 if (error || !req->newptr) in em_sysctl_interrupt_rate_handler()
4952 device_t dev = iflib_get_dev(sc->ctx); in em_add_hw_stats()
4953 struct em_tx_queue *tx_que = sc->tx_queues; in em_add_hw_stats()
4954 struct em_rx_queue *rx_que = sc->rx_queues; in em_add_hw_stats()
4969 CTLFLAG_RD, &sc->dropped_pkts, in em_add_hw_stats()
4972 CTLFLAG_RD, &sc->link_irq, in em_add_hw_stats()
4973 "Link MSI-X IRQ Handled"); in em_add_hw_stats()
4975 CTLFLAG_RD, &sc->rx_overruns, in em_add_hw_stats()
4978 CTLFLAG_RD, &sc->watchdog_events, in em_add_hw_stats()
4989 CTLFLAG_RD, &sc->hw.fc.high_water, 0, in em_add_hw_stats()
4992 CTLFLAG_RD, &sc->hw.fc.low_water, 0, in em_add_hw_stats()
4995 for (int i = 0; i < sc->tx_num_queues; i++, tx_que++) { in em_add_hw_stats()
4996 struct tx_ring *txr = &tx_que->txr; in em_add_hw_stats()
5009 E1000_TDH(txr->me), em_sysctl_reg_handler, "IU", in em_add_hw_stats()
5013 E1000_TDT(txr->me), em_sysctl_reg_handler, "IU", in em_add_hw_stats()
5016 CTLFLAG_RD, &txr->tx_irq, in em_add_hw_stats()
5017 "Queue MSI-X Transmit Interrupts"); in em_add_hw_stats()
5020 for (int j = 0; j < sc->rx_num_queues; j++, rx_que++) { in em_add_hw_stats()
5021 struct rx_ring *rxr = &rx_que->rxr; in em_add_hw_stats()
5034 E1000_RDH(rxr->me), em_sysctl_reg_handler, "IU", in em_add_hw_stats()
5038 E1000_RDT(rxr->me), em_sysctl_reg_handler, "IU", in em_add_hw_stats()
5041 CTLFLAG_RD, &rxr->rx_irq, in em_add_hw_stats()
5042 "Queue MSI-X Receive Interrupts"); in em_add_hw_stats()
5054 if (sc->vf_ifp) { in em_add_hw_stats()
5055 struct e1000_vf_stats *vfstats = &sc->ustats.vf_stats; in em_add_hw_stats()
5058 CTLFLAG_RD, &vfstats->gprc, in em_add_hw_stats()
5061 CTLFLAG_RD, &vfstats->gptc, in em_add_hw_stats()
5064 CTLFLAG_RD, &vfstats->gorc, in em_add_hw_stats()
5067 CTLFLAG_RD, &vfstats->gotc, in em_add_hw_stats()
5070 CTLFLAG_RD, &vfstats->mprc, in em_add_hw_stats()
5075 stats = &sc->ustats.stats; in em_add_hw_stats()
5078 CTLFLAG_RD, &stats->ecol, in em_add_hw_stats()
5081 CTLFLAG_RD, &stats->scc, in em_add_hw_stats()
5084 CTLFLAG_RD, &stats->mcc, in em_add_hw_stats()
5087 CTLFLAG_RD, &stats->latecol, in em_add_hw_stats()
5090 CTLFLAG_RD, &stats->colc, in em_add_hw_stats()
5093 CTLFLAG_RD, &stats->symerrs, in em_add_hw_stats()
5096 CTLFLAG_RD, &stats->sec, in em_add_hw_stats()
5099 CTLFLAG_RD, &stats->dc, in em_add_hw_stats()
5102 CTLFLAG_RD, &stats->mpc, in em_add_hw_stats()
5105 CTLFLAG_RD, &stats->rlec, in em_add_hw_stats()
5108 CTLFLAG_RD, &stats->rnbc, in em_add_hw_stats()
5111 CTLFLAG_RD, &stats->ruc, in em_add_hw_stats()
5114 CTLFLAG_RD, &stats->rfc, in em_add_hw_stats()
5117 CTLFLAG_RD, &stats->roc, in em_add_hw_stats()
5120 CTLFLAG_RD, &stats->rjc, in em_add_hw_stats()
5123 CTLFLAG_RD, &stats->rxerrc, in em_add_hw_stats()
5126 CTLFLAG_RD, &stats->crcerrs, in em_add_hw_stats()
5129 CTLFLAG_RD, &stats->algnerrc, in em_add_hw_stats()
5133 CTLFLAG_RD, &stats->cexterr, in em_add_hw_stats()
5136 CTLFLAG_RD, &stats->xonrxc, in em_add_hw_stats()
5139 CTLFLAG_RD, &stats->xontxc, in em_add_hw_stats()
5142 CTLFLAG_RD, &stats->xoffrxc, in em_add_hw_stats()
5145 CTLFLAG_RD, &stats->xofftxc, in em_add_hw_stats()
5148 CTLFLAG_RD, &stats->fcruc, in em_add_hw_stats()
5151 CTLFLAG_RD, &stats->mgprc, in em_add_hw_stats()
5154 CTLFLAG_RD, &stats->mgpdc, in em_add_hw_stats()
5157 CTLFLAG_RD, &stats->mgptc, in em_add_hw_stats()
5162 CTLFLAG_RD, &stats->tpr, in em_add_hw_stats()
5165 CTLFLAG_RD, &stats->gprc, in em_add_hw_stats()
5168 CTLFLAG_RD, &stats->bprc, in em_add_hw_stats()
5171 CTLFLAG_RD, &stats->mprc, in em_add_hw_stats()
5174 CTLFLAG_RD, &stats->prc64, in em_add_hw_stats()
5177 CTLFLAG_RD, &stats->prc127, in em_add_hw_stats()
5178 "65-127 byte frames received"); in em_add_hw_stats()
5180 CTLFLAG_RD, &stats->prc255, in em_add_hw_stats()
5181 "128-255 byte frames received"); in em_add_hw_stats()
5183 CTLFLAG_RD, &stats->prc511, in em_add_hw_stats()
5184 "256-511 byte frames received"); in em_add_hw_stats()
5186 CTLFLAG_RD, &stats->prc1023, in em_add_hw_stats()
5187 "512-1023 byte frames received"); in em_add_hw_stats()
5189 CTLFLAG_RD, &stats->prc1522, in em_add_hw_stats()
5190 "1023-1522 byte frames received"); in em_add_hw_stats()
5192 CTLFLAG_RD, &stats->gorc, in em_add_hw_stats()
5197 CTLFLAG_RD, &stats->gotc, in em_add_hw_stats()
5200 CTLFLAG_RD, &stats->tpt, in em_add_hw_stats()
5203 CTLFLAG_RD, &stats->gptc, in em_add_hw_stats()
5206 CTLFLAG_RD, &stats->bptc, in em_add_hw_stats()
5209 CTLFLAG_RD, &stats->mptc, in em_add_hw_stats()
5212 CTLFLAG_RD, &stats->ptc64, in em_add_hw_stats()
5215 CTLFLAG_RD, &stats->ptc127, in em_add_hw_stats()
5216 "65-127 byte frames transmitted"); in em_add_hw_stats()
5218 CTLFLAG_RD, &stats->ptc255, in em_add_hw_stats()
5219 "128-255 byte frames transmitted"); in em_add_hw_stats()
5221 CTLFLAG_RD, &stats->ptc511, in em_add_hw_stats()
5222 "256-511 byte frames transmitted"); in em_add_hw_stats()
5224 CTLFLAG_RD, &stats->ptc1023, in em_add_hw_stats()
5225 "512-1023 byte frames transmitted"); in em_add_hw_stats()
5227 CTLFLAG_RD, &stats->ptc1522, in em_add_hw_stats()
5228 "1024-1522 byte frames transmitted"); in em_add_hw_stats()
5230 CTLFLAG_RD, &stats->tsctc, in em_add_hw_stats()
5233 CTLFLAG_RD, &stats->tsctfc, in em_add_hw_stats()
5242 CTLFLAG_RD, &stats->iac, in em_add_hw_stats()
5246 CTLFLAG_RD, &stats->icrxptc, in em_add_hw_stats()
5250 CTLFLAG_RD, &stats->icrxatc, in em_add_hw_stats()
5254 CTLFLAG_RD, &stats->ictxptc, in em_add_hw_stats()
5258 CTLFLAG_RD, &stats->ictxatc, in em_add_hw_stats()
5262 CTLFLAG_RD, &stats->ictxqec, in em_add_hw_stats()
5266 CTLFLAG_RD, &stats->ictxqmtc, in em_add_hw_stats()
5270 CTLFLAG_RD, &stats->icrxdmtc, in em_add_hw_stats()
5274 CTLFLAG_RD, &stats->icrxoc, in em_add_hw_stats()
5282 struct e1000_hw *hw = &sc->hw; in em_fw_version_locked()
5283 struct e1000_fw_version *fw_ver = &sc->fw_ver; in em_fw_version_locked()
5295 if (hw->mac.type >= igb_mac_min) { in em_fw_version_locked()
5310 fw_ver->eep_major = (eep & NVM_MAJOR_MASK) >> NVM_MAJOR_SHIFT; in em_fw_version_locked()
5311 fw_ver->eep_minor = (eep & NVM_MINOR_MASK) >> NVM_MINOR_SHIFT; in em_fw_version_locked()
5312 fw_ver->eep_build = (eep & NVM_IMAGE_ID_MASK); in em_fw_version_locked()
5321 if (fw_ver->eep_major || fw_ver->eep_minor || fw_ver->eep_build) { in em_sbuf_fw_version()
5322 sbuf_printf(buf, "EEPROM V%d.%d-%d", fw_ver->eep_major, in em_sbuf_fw_version()
5323 fw_ver->eep_minor, fw_ver->eep_build); in em_sbuf_fw_version()
5327 if (fw_ver->invm_major || fw_ver->invm_minor || in em_sbuf_fw_version()
5328 fw_ver->invm_img_type) { in em_sbuf_fw_version()
5330 space, fw_ver->invm_major, fw_ver->invm_minor, in em_sbuf_fw_version()
5331 fw_ver->invm_img_type); in em_sbuf_fw_version()
5335 if (fw_ver->or_valid) { in em_sbuf_fw_version()
5336 sbuf_printf(buf, "%sOption ROM V%d-b%d-p%d", in em_sbuf_fw_version()
5337 space, fw_ver->or_major, fw_ver->or_build, in em_sbuf_fw_version()
5338 fw_ver->or_patch); in em_sbuf_fw_version()
5342 if (fw_ver->etrack_id) in em_sbuf_fw_version()
5343 sbuf_printf(buf, "%seTrack 0x%08x", space, fw_ver->etrack_id); in em_sbuf_fw_version()
5349 device_t dev = sc->dev; in em_print_fw_version()
5359 em_sbuf_fw_version(&sc->fw_ver, buf); in em_print_fw_version()
5374 device_t dev = sc->dev; in em_sysctl_print_fw_version()
5384 em_sbuf_fw_version(&sc->fw_ver, buf); in em_sysctl_print_fw_version()
5409 result = -1; in em_sysctl_nvm_info()
5412 if (error || !req->newptr) in em_sysctl_nvm_info()
5417 * first 32 16-bit words of the EEPROM to in em_sysctl_nvm_info()
5429 struct e1000_hw *hw = &sc->hw; in em_print_nvm_info()
5430 struct sx *iflib_ctx_lock = iflib_ctx_lock_get(sc->ctx); in em_print_nvm_info()
5462 usecs = info->value; in em_sysctl_int_delay()
5464 if (error != 0 || req->newptr == NULL) in em_sysctl_int_delay()
5468 info->value = usecs; in em_sysctl_int_delay()
5471 sc = info->sc; in em_sysctl_int_delay()
5473 regval = E1000_READ_OFFSET(&sc->hw, info->offset); in em_sysctl_int_delay()
5476 switch (info->offset) { in em_sysctl_int_delay()
5481 sc->txd_cmd &= ~E1000_TXD_CMD_IDE; in em_sysctl_int_delay()
5485 sc->txd_cmd |= E1000_TXD_CMD_IDE; in em_sysctl_int_delay()
5488 E1000_WRITE_OFFSET(&sc->hw, info->offset, regval); in em_sysctl_int_delay()
5499 sc = oidp->oid_arg1; in em_sysctl_tso_tcp_flags_mask()
5500 switch (oidp->oid_arg2) { in em_sysctl_tso_tcp_flags_mask()
5517 val = E1000_READ_REG(&sc->hw, reg); in em_sysctl_tso_tcp_flags_mask()
5520 if (error != 0 || req->newptr == NULL) in em_sysctl_tso_tcp_flags_mask()
5525 E1000_WRITE_REG(&sc->hw, reg, val); in em_sysctl_tso_tcp_flags_mask()
5534 info->sc = sc; in em_add_int_delay_sysctl()
5535 info->offset = offset; in em_add_int_delay_sysctl()
5536 info->value = value; in em_add_int_delay_sysctl()
5537 SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev), in em_add_int_delay_sysctl()
5538 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), in em_add_int_delay_sysctl()
5546 * 0 - off
5547 * 1 - rx pause
5548 * 2 - tx pause
5549 * 3 - full
5560 if ((error) || (req->newptr == NULL)) in em_set_flowcntl()
5563 if (input == sc->fc) /* no change? */ in em_set_flowcntl()
5571 sc->hw.fc.requested_mode = input; in em_set_flowcntl()
5572 sc->fc = input; in em_set_flowcntl()
5579 sc->hw.fc.current_mode = sc->hw.fc.requested_mode; in em_set_flowcntl()
5580 e1000_force_mac_fc(&sc->hw); in em_set_flowcntl()
5587 * 0/1 - off/on
5589 * 250,500,1000-10000 in thousands
5597 error = sysctl_handle_int(oidp, &sc->dmac, 0, req); in igb_sysctl_dmac()
5599 if ((error) || (req->newptr == NULL)) in igb_sysctl_dmac()
5602 switch (sc->dmac) { in igb_sysctl_dmac()
5607 sc->dmac = 1000; in igb_sysctl_dmac()
5621 /* Legal values - allow */ in igb_sysctl_dmac()
5625 sc->dmac = 0; in igb_sysctl_dmac()
5629 em_if_init(sc->ctx); in igb_sysctl_dmac()
5636 * 0/1 - enabled/disabled
5644 if (sc->hw.mac.type < igb_mac_min) in em_sysctl_eee()
5645 value = sc->hw.dev_spec.ich8lan.eee_disable; in em_sysctl_eee()
5647 value = sc->hw.dev_spec._82575.eee_disable; in em_sysctl_eee()
5649 if (error || req->newptr == NULL) in em_sysctl_eee()
5651 if (sc->hw.mac.type < igb_mac_min) in em_sysctl_eee()
5652 sc->hw.dev_spec.ich8lan.eee_disable = (value != 0); in em_sysctl_eee()
5654 sc->hw.dev_spec._82575.eee_disable = (value != 0); in em_sysctl_eee()
5655 em_if_init(sc->ctx); in em_sysctl_eee()
5667 result = -1; in em_sysctl_debug_info()
5670 if (error || !req->newptr) in em_sysctl_debug_info()
5691 if (error || !req->newptr || result != 1) in em_get_rs()
5706 * needed for debugging a problem. -jfv
5711 device_t dev = iflib_get_dev(sc->ctx); in em_print_debug_info()
5712 if_t ifp = iflib_get_ifp(sc->ctx); in em_print_debug_info()
5713 struct tx_ring *txr = &sc->tx_queues->txr; in em_print_debug_info()
5714 struct rx_ring *rxr = &sc->rx_queues->rxr; in em_print_debug_info()
5726 for (int i = 0; i < sc->tx_num_queues; i++, txr++) { in em_print_debug_info()
5727 device_printf(dev, "TX Queue %d ------\n", i); in em_print_debug_info()
5729 E1000_READ_REG(&sc->hw, E1000_TDH(i)), in em_print_debug_info()
5730 E1000_READ_REG(&sc->hw, E1000_TDT(i))); in em_print_debug_info()
5733 for (int j=0; j < sc->rx_num_queues; j++, rxr++) { in em_print_debug_info()
5734 device_printf(dev, "RX Queue %d ------\n", j); in em_print_debug_info()
5736 E1000_READ_REG(&sc->hw, E1000_RDH(j)), in em_print_debug_info()
5737 E1000_READ_REG(&sc->hw, E1000_RDT(j))); in em_print_debug_info()
5743 * Write a new value to the EEPROM increasing the number of MSI-X
5750 struct e1000_hw *hw = &sc->hw; in em_enable_vectors_82574()
5759 "reported MSI-X vectors from 3 to 5...\n"); in em_enable_vectors_82574()