Lines Matching full:tx
90 #define E1000_TXCW 0x00178 /* Tx Configuration Word - RW */
103 #define E1000_TCTL 0x00400 /* Tx Control - RW */
104 #define E1000_TCTL_EXT 0x00404 /* Extended Tx Control - RW */
105 #define E1000_TIPG 0x00410 /* Tx Inter-packet gap -RW */
106 #define E1000_TBT 0x00448 /* Tx Burst Timer - RW */
117 #define E1000_IOSFPC 0x00F28 /* TX corrupted data */
193 /* QAV Tx mode control register */
196 /* QAV Tx mode control register bitfields masks */
221 /* QAV Tx mode control registers where _n can be 0 or 1. */
224 /* QAV Tx mode control register bitfields masks */
227 #define E1000_TQAVCC_QUEUE_MODE (1U << 31) /* SP vs. SR Tx mode */
286 #define E1000_TXDMAC 0x03000 /* Tx DMA Control - RW */
303 #define E1000_TXPBS 0x03404 /* Tx Packet Buffer Size - RW */
306 #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
307 #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
308 #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
309 #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
310 #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
311 #define E1000_TDPUMB 0x0357C /* DMA Tx Desc uC Mail Box - RW */
312 #define E1000_TDPUAD 0x03580 /* DMA Tx Desc uC Addr Command - RW */
313 #define E1000_TDPUWD 0x03584 /* DMA Tx Desc uC Data Write - RW */
314 #define E1000_TDPURD 0x03588 /* DMA Tx Desc uC Data Read - RW */
315 #define E1000_TDPUCTL 0x0358C /* DMA Tx Desc uC Control - RW */
316 #define E1000_DTXCTL 0x03590 /* DMA Tx Control - RW */
317 #define E1000_DTXTCPFLGL 0x0359C /* DMA Tx Control flag low - RW */
318 #define E1000_DTXTCPFLGH 0x035A0 /* DMA Tx Control flag high - RW */
319 /* DMA Tx Max Total Allow Size Reqs - RW */
321 #define E1000_TIDV 0x03820 /* Tx Interrupt Delay Value - RW */
322 #define E1000_TADV 0x0382C /* Tx Interrupt Absolute Delay Val - RW */
336 #define E1000_TNCRS 0x04034 /* Tx-No CRS - R/clr */
341 #define E1000_XONTXC 0x0404C /* XON Tx Count - R/clr */
343 #define E1000_XOFFTXC 0x04054 /* XOFF Tx Count - R/clr */
354 #define E1000_GPTC 0x04080 /* Good Packets Tx Count - R/clr */
357 #define E1000_GOTCL 0x04090 /* Good Octets Tx Count Low - R/clr */
358 #define E1000_GOTCH 0x04094 /* Good Octets Tx Count High - R/clr */
366 #define E1000_MGTPTC 0x040BC /* Management Packets Tx Count - R/clr */
369 #define E1000_TOTL 0x040C8 /* Total Octets Tx Low - R/clr */
370 #define E1000_TOTH 0x040CC /* Total Octets Tx High - R/clr */
372 #define E1000_TPT 0x040D4 /* Total Packets Tx - R/clr */
373 #define E1000_PTC64 0x040D8 /* Packets Tx (64 bytes) - R/clr */
374 #define E1000_PTC127 0x040DC /* Packets Tx (65-127 bytes) - R/clr */
375 #define E1000_PTC255 0x040E0 /* Packets Tx (128-255 bytes) - R/clr */
376 #define E1000_PTC511 0x040E4 /* Packets Tx (256-511 bytes) - R/clr */
377 #define E1000_PTC1023 0x040E8 /* Packets Tx (512-1023 bytes) - R/clr */
378 #define E1000_PTC1522 0x040EC /* Packets Tx (1024-1522 Bytes) - R/clr */
379 #define E1000_MPTC 0x040F0 /* Multicast Packets Tx Count - R/clr */
380 #define E1000_BPTC 0x040F4 /* Broadcast Packets Tx Count - R/clr */
381 #define E1000_TSCTC 0x040F8 /* TCP Segmentation Context Tx - R/clr */
382 #define E1000_TSCTFC 0x040FC /* TCP Segmentation Context Tx Fail - R/clr */
387 #define E1000_ICTXPTC 0x0410C /* Interrupt Cause Tx Pkt Timer Expire Count */
388 #define E1000_ICTXATC 0x04110 /* Interrupt Cause Tx Abs Timer Expire Count */
389 #define E1000_ICTXQEC 0x04118 /* Interrupt Cause Tx Queue Empty Count */
390 #define E1000_ICTXQMTC 0x0411C /* Interrupt Cause Tx Queue Min Thresh Count */
416 #define E1000_LSECTXUT 0x04300 /* Tx Untagged Pkt Cnt */
417 #define E1000_LSECTXPKTE 0x04304 /* Encrypted Tx Pkts Cnt */
418 #define E1000_LSECTXPKTP 0x04308 /* Protected Tx Pkt Cnt */
419 #define E1000_LSECTXOCTE 0x0430C /* Encrypted Tx Octets Cnt */
420 #define E1000_LSECTXOCTP 0x04310 /* Protected Tx Octets Cnt */
435 #define E1000_LSECTXCAP 0x0B000 /* Tx Capabilities Register - RO */
437 #define E1000_LSECTXCTRL 0x0B004 /* Tx Control - RW */
439 #define E1000_LSECTXSCL 0x0B008 /* Tx SCI Low - RW */
440 #define E1000_LSECTXSCH 0x0B00C /* Tx SCI High - RW */
441 #define E1000_LSECTXSA 0x0B010 /* Tx SA0 - RW */
442 #define E1000_LSECTXPN0 0x0B018 /* Tx SA PN 0 - RW */
443 #define E1000_LSECTXPN1 0x0B01C /* Tx SA PN 1 - RW */
446 /* LinkSec Tx 128-bit Key 0 - WO */
448 /* LinkSec Tx 128-bit Key 1 - WO */
467 /* IPSec Tx 128-bit Key - RW */
469 #define E1000_IPSTXSALT 0x0B454 /* IPSec Tx Salt - RW */
470 #define E1000_IPSTXIDX 0x0B450 /* IPSec Tx SA IDX - RW */
474 #define E1000_CBTMPC 0x0402C /* Circuit Breaker Tx Packet Count */
479 #define E1000_HGPTC 0x04118 /* Host Good Packets Tx Count */
480 #define E1000_HTCBDPC 0x04124 /* Host Tx Circuit Breaker Dropped Count */
575 #define E1000_DTXSWC 0x03500 /* DMA Tx Switch Control - RW */
585 #define E1000_TXSWC 0x05ACC /* Tx Switch Control */
601 #define E1000_TSYNCTXCTL 0x0B614 /* Tx Time Sync Control register - RW */
607 #define E1000_TXSTMPL 0x0B618 /* Tx timestamp value Low - RO */
608 #define E1000_TXSTMPH 0x0B61C /* Tx timestamp value High - RO */
642 #define E1000_RTTDCS 0x3600 /* Reedtown Tx Desc plane control and status */
643 #define E1000_RTTPCS 0x3474 /* Reedtown Tx Packet Plane control and status */
647 /* Tx Desc plane TC Rate-scheduler config */
649 /* Tx Packet plane TC Rate-Scheduler Config */
653 /* Tx Desc Plane TC Rate-Scheduler Status */
655 /* Tx Desc Plane TC Rate-Scheduler MMW */
657 /* Tx Packet plane TC Rate-Scheduler Status */
659 /* Tx Packet plane TC Rate-scheduler MMW */
665 /* Tx Desc plane VM Rate-Scheduler MMW*/
667 /* Tx BCN Rate-Scheduler MMW */
669 #define E1000_RTTDQSEL 0x3604 /* Tx Desc Plane Queue Select */
670 #define E1000_RTTDVMRC 0x3608 /* Tx Desc Plane VM Rate-Scheduler Config */
671 #define E1000_RTTDVMRS 0x360C /* Tx Desc Plane VM Rate-Scheduler Status */
672 #define E1000_RTTBCNRC 0x36B0 /* Tx BCN Rate-Scheduler Config */
673 #define E1000_RTTBCNRS 0x36B4 /* Tx BCN Rate-Scheduler Status */
674 #define E1000_RTTBCNCR 0xB200 /* Tx BCN Control Register */
675 #define E1000_RTTBCNTG 0x35A4 /* Tx BCN Tagging */
676 #define E1000_RTTBCNCP 0xB208 /* Tx BCN Congestion point */
678 #define E1000_RTTBCNRD 0x36B8 /* Tx BCN Rate Drift */
680 #define E1000_RTTBCNIDX 0xB204 /* Tx BCN Congestion Point */
681 #define E1000_RTTBCNACH 0x0B214 /* Tx BCN Control High */
682 #define E1000_RTTBCNACL 0x0B210 /* Tx BCN Control Low */
710 #define E1000_TLPIC 0x4148 /* EEE Tx LPI Count - TLPIC */