2   SPDX-License-Identifier: BSD-3-Clause
4   Copyright (c) 2001-2020, Intel Corporation
40  *  e1000_init_nvm_ops_generic - Initialize NVM function pointers
43  *  Setups up the function pointers to no-op functions
47 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_init_nvm_ops_generic()
51 	nvm->ops.init_params = e1000_null_ops_generic;  in e1000_init_nvm_ops_generic()
52 	nvm->ops.acquire = e1000_null_ops_generic;  in e1000_init_nvm_ops_generic()
53 	nvm->ops.read = e1000_null_read_nvm;  in e1000_init_nvm_ops_generic()
54 	nvm->ops.release = e1000_null_nvm_generic;  in e1000_init_nvm_ops_generic()
55 	nvm->ops.reload = e1000_reload_nvm_generic;  in e1000_init_nvm_ops_generic()
56 	nvm->ops.update = e1000_null_ops_generic;  in e1000_init_nvm_ops_generic()
57 	nvm->ops.valid_led_default = e1000_null_led_default;  in e1000_init_nvm_ops_generic()
58 	nvm->ops.validate = e1000_null_ops_generic;  in e1000_init_nvm_ops_generic()
59 	nvm->ops.write = e1000_null_write_nvm;  in e1000_init_nvm_ops_generic()
63  *  e1000_null_nvm_read - No-op function, return 0
78  *  e1000_null_nvm_generic - No-op function, return void
88  *  e1000_null_led_default - No-op function, return 0
100  *  e1000_null_write_nvm - No-op function, return 0
115  *  e1000_raise_eec_clk - Raise EEPROM clock
126 	usec_delay(hw->nvm.delay_usec);  in e1000_raise_eec_clk()
130  *  e1000_lower_eec_clk - Lower EEPROM clock
141 	usec_delay(hw->nvm.delay_usec);  in e1000_lower_eec_clk()
145  *  e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
156 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_shift_out_eec_bits()
162 	mask = 0x01 << (count - 1);  in e1000_shift_out_eec_bits()
163 	if (nvm->type == e1000_nvm_eeprom_microwire)  in e1000_shift_out_eec_bits()
166 	if (nvm->type == e1000_nvm_eeprom_spi)  in e1000_shift_out_eec_bits()
178 		usec_delay(nvm->delay_usec);  in e1000_shift_out_eec_bits()
191  *  e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
231  *  e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
257 	return -E1000_ERR_NVM;  in e1000_poll_eerd_eewr_done()
261  *  e1000_acquire_nvm_generic - Generic request for access to EEPROM
266  *  EEPROM access and return -E1000_ERR_NVM (-1).
283 		timeout--;  in e1000_acquire_nvm_generic()
290 		return -E1000_ERR_NVM;  in e1000_acquire_nvm_generic()
297  *  e1000_standby_nvm - Return EEPROM to standby state
304 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_standby_nvm()
309 	if (nvm->type == e1000_nvm_eeprom_microwire) {  in e1000_standby_nvm()
313 		usec_delay(nvm->delay_usec);  in e1000_standby_nvm()
321 		usec_delay(nvm->delay_usec);  in e1000_standby_nvm()
324 	} else if (nvm->type == e1000_nvm_eeprom_spi) {  in e1000_standby_nvm()
329 		usec_delay(nvm->delay_usec);  in e1000_standby_nvm()
333 		usec_delay(nvm->delay_usec);  in e1000_standby_nvm()
338  *  e1000_stop_nvm - Terminate EEPROM command
350 	if (hw->nvm.type == e1000_nvm_eeprom_spi) {  in e1000_stop_nvm()
354 	} else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {  in e1000_stop_nvm()
355 		/* CS on Microwire is active-high */  in e1000_stop_nvm()
364  *  e1000_release_nvm_generic - Release exclusive access to EEPROM
383  *  e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
390 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_ready_nvm_eeprom()
396 	if (nvm->type == e1000_nvm_eeprom_microwire) {  in e1000_ready_nvm_eeprom()
403 	} else if (nvm->type == e1000_nvm_eeprom_spi) {  in e1000_ready_nvm_eeprom()
412 		/* Read "Status Register" repeatedly until the LSB is cleared.  in e1000_ready_nvm_eeprom()
419 						 hw->nvm.opcode_bits);  in e1000_ready_nvm_eeprom()
426 			timeout--;  in e1000_ready_nvm_eeprom()
431 			return -E1000_ERR_NVM;  in e1000_ready_nvm_eeprom()
439  *  e1000_read_nvm_spi - Read EEPROM's using SPI
449 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_read_nvm_spi()
460 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in e1000_read_nvm_spi()
463 		return -E1000_ERR_NVM;  in e1000_read_nvm_spi()
466 	ret_val = nvm->ops.acquire(hw);  in e1000_read_nvm_spi()
472 		goto release;  in e1000_read_nvm_spi()
476 	if ((nvm->address_bits == 8) && (offset >= 128))  in e1000_read_nvm_spi()
480 	e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);  in e1000_read_nvm_spi()
481 	e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);  in e1000_read_nvm_spi()
492 release:  in e1000_read_nvm_spi()
493 	nvm->ops.release(hw);  in e1000_read_nvm_spi()
499  *  e1000_read_nvm_microwire - Reads EEPROM's using microwire
510 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_read_nvm_microwire()
520 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in e1000_read_nvm_microwire()
523 		return -E1000_ERR_NVM;  in e1000_read_nvm_microwire()
526 	ret_val = nvm->ops.acquire(hw);  in e1000_read_nvm_microwire()
532 		goto release;  in e1000_read_nvm_microwire()
536 		e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);  in e1000_read_nvm_microwire()
538 					nvm->address_bits);  in e1000_read_nvm_microwire()
541 		 * overhead of setup and tear-down.  in e1000_read_nvm_microwire()
547 release:  in e1000_read_nvm_microwire()
548 	nvm->ops.release(hw);  in e1000_read_nvm_microwire()
554  *  e1000_read_nvm_eerd - Reads EEPROM using EERD register
564 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_read_nvm_eerd()
573 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in e1000_read_nvm_eerd()
576 		return -E1000_ERR_NVM;  in e1000_read_nvm_eerd()
599  *  e1000_write_nvm_spi - Write to EEPROM using SPI
612 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_write_nvm_spi()
613 	s32 ret_val = -E1000_ERR_NVM;  in e1000_write_nvm_spi()
621 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in e1000_write_nvm_spi()
624 		return -E1000_ERR_NVM;  in e1000_write_nvm_spi()
630 		ret_val = nvm->ops.acquire(hw);  in e1000_write_nvm_spi()
636 			nvm->ops.release(hw);  in e1000_write_nvm_spi()
644 					 nvm->opcode_bits);  in e1000_write_nvm_spi()
651 		if ((nvm->address_bits == 8) && (offset >= 128))  in e1000_write_nvm_spi()
654 		/* Send the Write command (8-bit opcode + addr) */  in e1000_write_nvm_spi()
655 		e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);  in e1000_write_nvm_spi()
657 					 nvm->address_bits);  in e1000_write_nvm_spi()
666 			if ((((offset + widx) * 2) % nvm->page_size) == 0) {  in e1000_write_nvm_spi()
672 		nvm->ops.release(hw);  in e1000_write_nvm_spi()
679  *  e1000_write_nvm_microwire - Writes EEPROM using microwire
693 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_write_nvm_microwire()
704 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in e1000_write_nvm_microwire()
707 		return -E1000_ERR_NVM;  in e1000_write_nvm_microwire()
710 	ret_val = nvm->ops.acquire(hw);  in e1000_write_nvm_microwire()
716 		goto release;  in e1000_write_nvm_microwire()
719 				 (u16)(nvm->opcode_bits + 2));  in e1000_write_nvm_microwire()
721 	e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));  in e1000_write_nvm_microwire()
727 					 nvm->opcode_bits);  in e1000_write_nvm_microwire()
730 					 nvm->address_bits);  in e1000_write_nvm_microwire()
745 			ret_val = -E1000_ERR_NVM;  in e1000_write_nvm_microwire()
746 			goto release;  in e1000_write_nvm_microwire()
755 				 (u16)(nvm->opcode_bits + 2));  in e1000_write_nvm_microwire()
757 	e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));  in e1000_write_nvm_microwire()
759 release:  in e1000_write_nvm_microwire()
760 	nvm->ops.release(hw);  in e1000_write_nvm_microwire()
766  *  e1000_read_pba_string_generic - Read device part number
785 	if ((hw->mac.type == e1000_i210 ||  in e1000_read_pba_string_generic()
786 	     hw->mac.type == e1000_i211) &&  in e1000_read_pba_string_generic()
789 		return -E1000_ERR_NVM_PBA_SECTION;  in e1000_read_pba_string_generic()
794 		return -E1000_ERR_INVALID_ARGUMENT;  in e1000_read_pba_string_generic()
797 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);  in e1000_read_pba_string_generic()
803 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);  in e1000_read_pba_string_generic()
829 		pba_num[6] = '-';  in e1000_read_pba_string_generic()
837 		/* switch all the data but the '-' to hex char */  in e1000_read_pba_string_generic()
842 				pba_num[offset] += 'A' - 0xA;  in e1000_read_pba_string_generic()
848 	ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);  in e1000_read_pba_string_generic()
856 		return -E1000_ERR_NVM_PBA_SECTION;  in e1000_read_pba_string_generic()
859 	if (pba_num_size < (((u32)length * 2) - 1)) {  in e1000_read_pba_string_generic()
861 		return -E1000_ERR_NO_SPACE;  in e1000_read_pba_string_generic()
866 	length--;  in e1000_read_pba_string_generic()
869 		ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);  in e1000_read_pba_string_generic()
883  *  e1000_read_pba_length_generic - Read device part number length
901 		return -E1000_ERR_INVALID_ARGUMENT;  in e1000_read_pba_length_generic()
904 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);  in e1000_read_pba_length_generic()
910 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);  in e1000_read_pba_length_generic()
922 	ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);  in e1000_read_pba_length_generic()
930 		return -E1000_ERR_NVM_PBA_SECTION;  in e1000_read_pba_length_generic()
936 	*pba_num_size = ((u32)length * 2) - 1;  in e1000_read_pba_length_generic()
942  *  e1000_read_pba_num_generic - Read device part number
956 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);  in e1000_read_pba_num_generic()
962 		return -E1000_NOT_IMPLEMENTED;  in e1000_read_pba_num_generic()
966 	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);  in e1000_read_pba_num_generic()
997 		return -E1000_ERR_PARAM;  in e1000_read_pba_raw()
1001 					 &pba->word[0]);  in e1000_read_pba_raw()
1006 			pba->word[0] = eeprom_buf[NVM_PBA_OFFSET_0];  in e1000_read_pba_raw()
1007 			pba->word[1] = eeprom_buf[NVM_PBA_OFFSET_1];  in e1000_read_pba_raw()
1009 			return -E1000_ERR_PARAM;  in e1000_read_pba_raw()
1013 	if (pba->word[0] == NVM_PBA_PTR_GUARD) {  in e1000_read_pba_raw()
1014 		if (pba->pba_block == NULL)  in e1000_read_pba_raw()
1015 			return -E1000_ERR_PARAM;  in e1000_read_pba_raw()
1024 			return -E1000_ERR_PARAM;  in e1000_read_pba_raw()
1027 			ret_val = e1000_read_nvm(hw, pba->word[1],  in e1000_read_pba_raw()
1029 						 pba->pba_block);  in e1000_read_pba_raw()
1033 			if (eeprom_buf_size > (u32)(pba->word[1] +  in e1000_read_pba_raw()
1035 				memcpy(pba->pba_block,  in e1000_read_pba_raw()
1036 				       &eeprom_buf[pba->word[1]],  in e1000_read_pba_raw()
1039 				return -E1000_ERR_PARAM;  in e1000_read_pba_raw()
1064 		return -E1000_ERR_PARAM;  in e1000_write_pba_raw()
1068 					  &pba->word[0]);  in e1000_write_pba_raw()
1073 			eeprom_buf[NVM_PBA_OFFSET_0] = pba->word[0];  in e1000_write_pba_raw()
1074 			eeprom_buf[NVM_PBA_OFFSET_1] = pba->word[1];  in e1000_write_pba_raw()
1076 			return -E1000_ERR_PARAM;  in e1000_write_pba_raw()
1080 	if (pba->word[0] == NVM_PBA_PTR_GUARD) {  in e1000_write_pba_raw()
1081 		if (pba->pba_block == NULL)  in e1000_write_pba_raw()
1082 			return -E1000_ERR_PARAM;  in e1000_write_pba_raw()
1085 			ret_val = e1000_write_nvm(hw, pba->word[1],  in e1000_write_pba_raw()
1086 						  pba->pba_block[0],  in e1000_write_pba_raw()
1087 						  pba->pba_block);  in e1000_write_pba_raw()
1091 			if (eeprom_buf_size > (u32)(pba->word[1] +  in e1000_write_pba_raw()
1092 					      pba->pba_block[0])) {  in e1000_write_pba_raw()
1093 				memcpy(&eeprom_buf[pba->word[1]],  in e1000_write_pba_raw()
1094 				       pba->pba_block,  in e1000_write_pba_raw()
1095 				       pba->pba_block[0] * sizeof(u16));  in e1000_write_pba_raw()
1097 				return -E1000_ERR_PARAM;  in e1000_write_pba_raw()
1135 			return -E1000_ERR_PARAM;  in e1000_get_pba_block_size()
1149 				return -E1000_ERR_PARAM;  in e1000_get_pba_block_size()
1153 			return -E1000_ERR_NVM_PBA_SECTION;  in e1000_get_pba_block_size()
1166  *  e1000_read_mac_addr_generic - Read device MAC address
1183 		hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));  in e1000_read_mac_addr_generic()
1186 		hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));  in e1000_read_mac_addr_generic()
1189 		hw->mac.addr[i] = hw->mac.perm_addr[i];  in e1000_read_mac_addr_generic()
1195  *  e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
1210 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);  in e1000_validate_nvm_checksum_generic()
1220 		return -E1000_ERR_NVM;  in e1000_validate_nvm_checksum_generic()
1227  *  e1000_update_nvm_checksum_generic - Update EEPROM checksum
1243 		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);  in e1000_update_nvm_checksum_generic()
1250 	checksum = (u16) NVM_SUM - checksum;  in e1000_update_nvm_checksum_generic()
1251 	ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);  in e1000_update_nvm_checksum_generic()
1259  *  e1000_reload_nvm_generic - Reloads EEPROM
1279  *  e1000_get_fw_version - Get firmware version information
1296 	switch (hw->mac.type) {  in e1000_get_fw_version()
1304 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);  in e1000_get_fw_version()
1309 			hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);  in e1000_get_fw_version()
1310 			fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)  in e1000_get_fw_version()
1312 			fw_vers->eep_minor = (fw_version & NVM_MINOR_MASK)  in e1000_get_fw_version()
1314 			fw_vers->eep_build = (fw_version & NVM_IMAGE_ID_MASK);  in e1000_get_fw_version()
1325 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);  in e1000_get_fw_version()
1327 		hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);  in e1000_get_fw_version()
1331 			hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset  in e1000_get_fw_version()
1333 			hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),  in e1000_get_fw_version()
1341 				fw_vers->or_valid = true;  in e1000_get_fw_version()
1342 				fw_vers->or_major =  in e1000_get_fw_version()
1344 				fw_vers->or_build =  in e1000_get_fw_version()
1347 				fw_vers->or_patch =  in e1000_get_fw_version()
1353 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);  in e1000_get_fw_version()
1356 	hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);  in e1000_get_fw_version()
1357 	fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)  in e1000_get_fw_version()
1374 	fw_vers->eep_minor = result;  in e1000_get_fw_version()
1378 		hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);  in e1000_get_fw_version()
1379 		hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);  in e1000_get_fw_version()
1380 		fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT)  in e1000_get_fw_version()
1383 		hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);  in e1000_get_fw_version()
1384 		hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);  in e1000_get_fw_version()
1385 		fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) |  in e1000_get_fw_version()