Lines Matching refs:hw
37 static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);
38 static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
39 static void e1000_config_collision_dist_generic(struct e1000_hw *hw);
47 void e1000_init_mac_ops_generic(struct e1000_hw *hw) in e1000_init_mac_ops_generic() argument
49 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_ops_generic()
87 s32 e1000_null_ops_generic(struct e1000_hw E1000_UNUSEDARG *hw) in e1000_null_ops_generic() argument
97 void e1000_null_mac_generic(struct e1000_hw E1000_UNUSEDARG *hw) in e1000_null_mac_generic() argument
109 s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_link_info() argument
120 bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw) in e1000_null_mng_mode() argument
132 void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_update_mc() argument
145 void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_write_vfta() argument
158 int e1000_null_rar_set(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_rar_set() argument
169 s32 e1000_null_set_obff_timer(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_null_set_obff_timer() argument
184 s32 e1000_get_bus_info_pci_generic(struct e1000_hw *hw) in e1000_get_bus_info_pci_generic() argument
186 struct e1000_mac_info *mac = &hw->mac; in e1000_get_bus_info_pci_generic()
187 struct e1000_bus_info *bus = &hw->bus; in e1000_get_bus_info_pci_generic()
188 u32 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_get_bus_info_pci_generic()
226 mac->ops.set_lan_id(hw); in e1000_get_bus_info_pci_generic()
239 s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw) in e1000_get_bus_info_pcie_generic() argument
241 struct e1000_mac_info *mac = &hw->mac; in e1000_get_bus_info_pcie_generic()
242 struct e1000_bus_info *bus = &hw->bus; in e1000_get_bus_info_pcie_generic()
250 ret_val = e1000_read_pcie_cap_reg(hw, PCIE_LINK_STATUS, in e1000_get_bus_info_pcie_generic()
272 mac->ops.set_lan_id(hw); in e1000_get_bus_info_pcie_generic()
285 static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw) in e1000_set_lan_id_multi_port_pcie() argument
287 struct e1000_bus_info *bus = &hw->bus; in e1000_set_lan_id_multi_port_pcie()
293 reg = E1000_READ_REG(hw, E1000_STATUS); in e1000_set_lan_id_multi_port_pcie()
303 void e1000_set_lan_id_multi_port_pci(struct e1000_hw *hw) in e1000_set_lan_id_multi_port_pci() argument
305 struct e1000_bus_info *bus = &hw->bus; in e1000_set_lan_id_multi_port_pci()
309 e1000_read_pci_cfg(hw, PCI_HEADER_TYPE_REGISTER, &pci_header_type); in e1000_set_lan_id_multi_port_pci()
311 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_set_lan_id_multi_port_pci()
325 void e1000_set_lan_id_single_port(struct e1000_hw *hw) in e1000_set_lan_id_single_port() argument
327 struct e1000_bus_info *bus = &hw->bus; in e1000_set_lan_id_single_port()
339 void e1000_clear_vfta_generic(struct e1000_hw *hw) in e1000_clear_vfta_generic() argument
346 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0); in e1000_clear_vfta_generic()
347 E1000_WRITE_FLUSH(hw); in e1000_clear_vfta_generic()
360 void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value) in e1000_write_vfta_generic() argument
364 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value); in e1000_write_vfta_generic()
365 E1000_WRITE_FLUSH(hw); in e1000_write_vfta_generic()
377 void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count) in e1000_init_rx_addrs_generic() argument
387 hw->mac.ops.rar_set(hw, hw->mac.addr, 0); in e1000_init_rx_addrs_generic()
392 hw->mac.ops.rar_set(hw, mac_addr, i); in e1000_init_rx_addrs_generic()
407 s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) in e1000_check_alt_mac_addr_generic() argument
416 ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data); in e1000_check_alt_mac_addr_generic()
421 if ((hw->mac.type < e1000_82571) || (hw->mac.type == e1000_82573)) in e1000_check_alt_mac_addr_generic()
427 if (hw->mac.type >= e1000_82580) in e1000_check_alt_mac_addr_generic()
430 ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1, in e1000_check_alt_mac_addr_generic()
442 if (hw->bus.func == E1000_FUNC_1) in e1000_check_alt_mac_addr_generic()
444 if (hw->bus.func == E1000_FUNC_2) in e1000_check_alt_mac_addr_generic()
447 if (hw->bus.func == E1000_FUNC_3) in e1000_check_alt_mac_addr_generic()
451 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in e1000_check_alt_mac_addr_generic()
471 hw->mac.ops.rar_set(hw, alt_mac_addr, 0); in e1000_check_alt_mac_addr_generic()
485 int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index) in e1000_rar_set_generic() argument
507 E1000_WRITE_REG(hw, E1000_RAL(index), rar_low); in e1000_rar_set_generic()
508 E1000_WRITE_FLUSH(hw); in e1000_rar_set_generic()
509 E1000_WRITE_REG(hw, E1000_RAH(index), rar_high); in e1000_rar_set_generic()
510 E1000_WRITE_FLUSH(hw); in e1000_rar_set_generic()
523 u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr) in e1000_hash_mc_addr_generic() argument
531 hash_mask = (hw->mac.mta_reg_count * 32) - 1; in e1000_hash_mc_addr_generic()
564 switch (hw->mac.mc_filter_type) { in e1000_hash_mc_addr_generic()
594 void e1000_update_mc_addr_list_generic(struct e1000_hw *hw, in e1000_update_mc_addr_list_generic() argument
603 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); in e1000_update_mc_addr_list_generic()
607 hash_value = e1000_hash_mc_addr_generic(hw, mc_addr_list); in e1000_update_mc_addr_list_generic()
609 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1); in e1000_update_mc_addr_list_generic()
612 hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit); in e1000_update_mc_addr_list_generic()
617 for (i = hw->mac.mta_reg_count - 1; i >= 0; i--) in e1000_update_mc_addr_list_generic()
618 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]); in e1000_update_mc_addr_list_generic()
619 E1000_WRITE_FLUSH(hw); in e1000_update_mc_addr_list_generic()
631 void e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw) in e1000_pcix_mmrbc_workaround_generic() argument
641 if (hw->bus.type != e1000_bus_type_pcix) in e1000_pcix_mmrbc_workaround_generic()
644 e1000_read_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd); in e1000_pcix_mmrbc_workaround_generic()
645 e1000_read_pci_cfg(hw, PCIX_STATUS_REGISTER_HI, &pcix_stat_hi_word); in e1000_pcix_mmrbc_workaround_generic()
655 e1000_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd); in e1000_pcix_mmrbc_workaround_generic()
665 void e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw) in e1000_clear_hw_cntrs_base_generic() argument
669 E1000_READ_REG(hw, E1000_CRCERRS); in e1000_clear_hw_cntrs_base_generic()
670 E1000_READ_REG(hw, E1000_SYMERRS); in e1000_clear_hw_cntrs_base_generic()
671 E1000_READ_REG(hw, E1000_MPC); in e1000_clear_hw_cntrs_base_generic()
672 E1000_READ_REG(hw, E1000_SCC); in e1000_clear_hw_cntrs_base_generic()
673 E1000_READ_REG(hw, E1000_ECOL); in e1000_clear_hw_cntrs_base_generic()
674 E1000_READ_REG(hw, E1000_MCC); in e1000_clear_hw_cntrs_base_generic()
675 E1000_READ_REG(hw, E1000_LATECOL); in e1000_clear_hw_cntrs_base_generic()
676 E1000_READ_REG(hw, E1000_COLC); in e1000_clear_hw_cntrs_base_generic()
677 E1000_READ_REG(hw, E1000_DC); in e1000_clear_hw_cntrs_base_generic()
678 E1000_READ_REG(hw, E1000_SEC); in e1000_clear_hw_cntrs_base_generic()
679 E1000_READ_REG(hw, E1000_RLEC); in e1000_clear_hw_cntrs_base_generic()
680 E1000_READ_REG(hw, E1000_XONRXC); in e1000_clear_hw_cntrs_base_generic()
681 E1000_READ_REG(hw, E1000_XONTXC); in e1000_clear_hw_cntrs_base_generic()
682 E1000_READ_REG(hw, E1000_XOFFRXC); in e1000_clear_hw_cntrs_base_generic()
683 E1000_READ_REG(hw, E1000_XOFFTXC); in e1000_clear_hw_cntrs_base_generic()
684 E1000_READ_REG(hw, E1000_FCRUC); in e1000_clear_hw_cntrs_base_generic()
685 E1000_READ_REG(hw, E1000_GPRC); in e1000_clear_hw_cntrs_base_generic()
686 E1000_READ_REG(hw, E1000_BPRC); in e1000_clear_hw_cntrs_base_generic()
687 E1000_READ_REG(hw, E1000_MPRC); in e1000_clear_hw_cntrs_base_generic()
688 E1000_READ_REG(hw, E1000_GPTC); in e1000_clear_hw_cntrs_base_generic()
689 E1000_READ_REG(hw, E1000_GORCL); in e1000_clear_hw_cntrs_base_generic()
690 E1000_READ_REG(hw, E1000_GORCH); in e1000_clear_hw_cntrs_base_generic()
691 E1000_READ_REG(hw, E1000_GOTCL); in e1000_clear_hw_cntrs_base_generic()
692 E1000_READ_REG(hw, E1000_GOTCH); in e1000_clear_hw_cntrs_base_generic()
693 E1000_READ_REG(hw, E1000_RNBC); in e1000_clear_hw_cntrs_base_generic()
694 E1000_READ_REG(hw, E1000_RUC); in e1000_clear_hw_cntrs_base_generic()
695 E1000_READ_REG(hw, E1000_RFC); in e1000_clear_hw_cntrs_base_generic()
696 E1000_READ_REG(hw, E1000_ROC); in e1000_clear_hw_cntrs_base_generic()
697 E1000_READ_REG(hw, E1000_RJC); in e1000_clear_hw_cntrs_base_generic()
698 E1000_READ_REG(hw, E1000_TORL); in e1000_clear_hw_cntrs_base_generic()
699 E1000_READ_REG(hw, E1000_TORH); in e1000_clear_hw_cntrs_base_generic()
700 E1000_READ_REG(hw, E1000_TOTL); in e1000_clear_hw_cntrs_base_generic()
701 E1000_READ_REG(hw, E1000_TOTH); in e1000_clear_hw_cntrs_base_generic()
702 E1000_READ_REG(hw, E1000_TPR); in e1000_clear_hw_cntrs_base_generic()
703 E1000_READ_REG(hw, E1000_TPT); in e1000_clear_hw_cntrs_base_generic()
704 E1000_READ_REG(hw, E1000_MPTC); in e1000_clear_hw_cntrs_base_generic()
705 E1000_READ_REG(hw, E1000_BPTC); in e1000_clear_hw_cntrs_base_generic()
716 s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw) in e1000_check_for_copper_link_generic() argument
718 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_copper_link_generic()
736 ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link); in e1000_check_for_copper_link_generic()
748 e1000_check_downshift_generic(hw); in e1000_check_for_copper_link_generic()
760 mac->ops.config_collision_dist(hw); in e1000_check_for_copper_link_generic()
767 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_copper_link_generic()
781 s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw) in e1000_check_for_fiber_link_generic() argument
783 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_fiber_link_generic()
791 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_fiber_link_generic()
792 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_check_for_fiber_link_generic()
793 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_fiber_link_generic()
812 E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_fiber_link_generic()
815 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_fiber_link_generic()
817 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_check_for_fiber_link_generic()
820 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_fiber_link_generic()
832 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); in e1000_check_for_fiber_link_generic()
833 E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000_check_for_fiber_link_generic()
848 s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw) in e1000_check_for_serdes_link_generic() argument
850 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_serdes_link_generic()
858 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_serdes_link_generic()
859 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_check_for_serdes_link_generic()
860 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_generic()
877 E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_serdes_link_generic()
880 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_check_for_serdes_link_generic()
882 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_check_for_serdes_link_generic()
885 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_serdes_link_generic()
897 E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw); in e1000_check_for_serdes_link_generic()
898 E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000_check_for_serdes_link_generic()
901 } else if (!(E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW))) { in e1000_check_for_serdes_link_generic()
908 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_generic()
920 if (E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW)) { in e1000_check_for_serdes_link_generic()
921 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_check_for_serdes_link_generic()
925 rxcw = E1000_READ_REG(hw, E1000_RXCW); in e1000_check_for_serdes_link_generic()
954 s32 e1000_set_default_fc_generic(struct e1000_hw *hw) in e1000_set_default_fc_generic() argument
970 if (hw->mac.type == e1000_i350) { in e1000_set_default_fc_generic()
971 nvm_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func); in e1000_set_default_fc_generic()
972 ret_val = hw->nvm.ops.read(hw, in e1000_set_default_fc_generic()
977 ret_val = hw->nvm.ops.read(hw, in e1000_set_default_fc_generic()
989 hw->fc.requested_mode = e1000_fc_none; in e1000_set_default_fc_generic()
992 hw->fc.requested_mode = e1000_fc_tx_pause; in e1000_set_default_fc_generic()
994 hw->fc.requested_mode = e1000_fc_full; in e1000_set_default_fc_generic()
1009 s32 e1000_setup_link_generic(struct e1000_hw *hw) in e1000_setup_link_generic() argument
1018 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) in e1000_setup_link_generic()
1024 if (hw->fc.requested_mode == e1000_fc_default) { in e1000_setup_link_generic()
1025 ret_val = e1000_set_default_fc_generic(hw); in e1000_setup_link_generic()
1033 hw->fc.current_mode = hw->fc.requested_mode; in e1000_setup_link_generic()
1036 hw->fc.current_mode); in e1000_setup_link_generic()
1039 ret_val = hw->mac.ops.setup_physical_interface(hw); in e1000_setup_link_generic()
1049 E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE); in e1000_setup_link_generic()
1050 E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH); in e1000_setup_link_generic()
1051 E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW); in e1000_setup_link_generic()
1053 E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time); in e1000_setup_link_generic()
1055 return e1000_set_fc_watermarks_generic(hw); in e1000_setup_link_generic()
1065 s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw) in e1000_commit_fc_settings_generic() argument
1067 struct e1000_mac_info *mac = &hw->mac; in e1000_commit_fc_settings_generic()
1088 switch (hw->fc.current_mode) { in e1000_commit_fc_settings_generic()
1121 E1000_WRITE_REG(hw, E1000_TXCW, txcw); in e1000_commit_fc_settings_generic()
1134 s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw) in e1000_poll_fiber_serdes_link_generic() argument
1136 struct e1000_mac_info *mac = &hw->mac; in e1000_poll_fiber_serdes_link_generic()
1150 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_poll_fiber_serdes_link_generic()
1162 ret_val = mac->ops.check_for_link(hw); in e1000_poll_fiber_serdes_link_generic()
1183 s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw) in e1000_setup_fiber_serdes_link_generic() argument
1190 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_setup_fiber_serdes_link_generic()
1195 hw->mac.ops.config_collision_dist(hw); in e1000_setup_fiber_serdes_link_generic()
1197 ret_val = e1000_commit_fc_settings_generic(hw); in e1000_setup_fiber_serdes_link_generic()
1209 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_setup_fiber_serdes_link_generic()
1210 E1000_WRITE_FLUSH(hw); in e1000_setup_fiber_serdes_link_generic()
1217 if (hw->phy.media_type == e1000_media_type_internal_serdes || in e1000_setup_fiber_serdes_link_generic()
1218 (E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1)) { in e1000_setup_fiber_serdes_link_generic()
1219 ret_val = e1000_poll_fiber_serdes_link_generic(hw); in e1000_setup_fiber_serdes_link_generic()
1234 static void e1000_config_collision_dist_generic(struct e1000_hw *hw) in e1000_config_collision_dist_generic() argument
1240 tctl = E1000_READ_REG(hw, E1000_TCTL); in e1000_config_collision_dist_generic()
1245 E1000_WRITE_REG(hw, E1000_TCTL, tctl); in e1000_config_collision_dist_generic()
1246 E1000_WRITE_FLUSH(hw); in e1000_config_collision_dist_generic()
1257 s32 e1000_set_fc_watermarks_generic(struct e1000_hw *hw) in e1000_set_fc_watermarks_generic() argument
1269 if (hw->fc.current_mode & e1000_fc_tx_pause) { in e1000_set_fc_watermarks_generic()
1274 fcrtl = hw->fc.low_water; in e1000_set_fc_watermarks_generic()
1275 if (hw->fc.send_xon) in e1000_set_fc_watermarks_generic()
1278 fcrth = hw->fc.high_water; in e1000_set_fc_watermarks_generic()
1280 E1000_WRITE_REG(hw, E1000_FCRTL, fcrtl); in e1000_set_fc_watermarks_generic()
1281 E1000_WRITE_REG(hw, E1000_FCRTH, fcrth); in e1000_set_fc_watermarks_generic()
1296 s32 e1000_force_mac_fc_generic(struct e1000_hw *hw) in e1000_force_mac_fc_generic() argument
1302 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_force_mac_fc_generic()
1321 DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode); in e1000_force_mac_fc_generic()
1323 switch (hw->fc.current_mode) { in e1000_force_mac_fc_generic()
1343 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_force_mac_fc_generic()
1358 s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw) in e1000_config_fc_after_link_up_generic() argument
1360 struct e1000_mac_info *mac = &hw->mac; in e1000_config_fc_after_link_up_generic()
1373 if (hw->phy.media_type == e1000_media_type_fiber || in e1000_config_fc_after_link_up_generic()
1374 hw->phy.media_type == e1000_media_type_internal_serdes) in e1000_config_fc_after_link_up_generic()
1375 ret_val = e1000_force_mac_fc_generic(hw); in e1000_config_fc_after_link_up_generic()
1377 if (hw->phy.media_type == e1000_media_type_copper) in e1000_config_fc_after_link_up_generic()
1378 ret_val = e1000_force_mac_fc_generic(hw); in e1000_config_fc_after_link_up_generic()
1391 if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) { in e1000_config_fc_after_link_up_generic()
1396 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up_generic()
1399 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_config_fc_after_link_up_generic()
1414 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV, in e1000_config_fc_after_link_up_generic()
1418 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY, in e1000_config_fc_after_link_up_generic()
1464 if (hw->fc.requested_mode == e1000_fc_full) { in e1000_config_fc_after_link_up_generic()
1465 hw->fc.current_mode = e1000_fc_full; in e1000_config_fc_after_link_up_generic()
1468 hw->fc.current_mode = e1000_fc_rx_pause; in e1000_config_fc_after_link_up_generic()
1483 hw->fc.current_mode = e1000_fc_tx_pause; in e1000_config_fc_after_link_up_generic()
1497 hw->fc.current_mode = e1000_fc_rx_pause; in e1000_config_fc_after_link_up_generic()
1503 hw->fc.current_mode = e1000_fc_none; in e1000_config_fc_after_link_up_generic()
1511 ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex); in e1000_config_fc_after_link_up_generic()
1518 hw->fc.current_mode = e1000_fc_none; in e1000_config_fc_after_link_up_generic()
1523 ret_val = e1000_force_mac_fc_generic(hw); in e1000_config_fc_after_link_up_generic()
1535 if ((hw->phy.media_type == e1000_media_type_internal_serdes) && in e1000_config_fc_after_link_up_generic()
1540 pcs_status_reg = E1000_READ_REG(hw, E1000_PCS_LSTAT); in e1000_config_fc_after_link_up_generic()
1553 pcs_adv_reg = E1000_READ_REG(hw, E1000_PCS_ANADV); in e1000_config_fc_after_link_up_generic()
1554 pcs_lp_ability_reg = E1000_READ_REG(hw, E1000_PCS_LPAB); in e1000_config_fc_after_link_up_generic()
1597 if (hw->fc.requested_mode == e1000_fc_full) { in e1000_config_fc_after_link_up_generic()
1598 hw->fc.current_mode = e1000_fc_full; in e1000_config_fc_after_link_up_generic()
1601 hw->fc.current_mode = e1000_fc_rx_pause; in e1000_config_fc_after_link_up_generic()
1616 hw->fc.current_mode = e1000_fc_tx_pause; in e1000_config_fc_after_link_up_generic()
1630 hw->fc.current_mode = e1000_fc_rx_pause; in e1000_config_fc_after_link_up_generic()
1636 hw->fc.current_mode = e1000_fc_none; in e1000_config_fc_after_link_up_generic()
1643 pcs_ctrl_reg = E1000_READ_REG(hw, E1000_PCS_LCTL); in e1000_config_fc_after_link_up_generic()
1645 E1000_WRITE_REG(hw, E1000_PCS_LCTL, pcs_ctrl_reg); in e1000_config_fc_after_link_up_generic()
1647 ret_val = e1000_force_mac_fc_generic(hw); in e1000_config_fc_after_link_up_generic()
1666 s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed, in e1000_get_speed_and_duplex_copper_generic() argument
1673 status = E1000_READ_REG(hw, E1000_STATUS); in e1000_get_speed_and_duplex_copper_generic()
1705 s32 e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw E1000_UNUSEDARG *hw, in e1000_get_speed_and_duplex_fiber_serdes_generic() argument
1722 s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw) in e1000_get_auto_rd_done_generic() argument
1729 if (E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_AUTO_RD) in e1000_get_auto_rd_done_generic()
1751 s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data) in e1000_valid_led_default_generic() argument
1757 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_generic()
1774 s32 e1000_id_led_init_generic(struct e1000_hw *hw) in e1000_id_led_init_generic() argument
1776 struct e1000_mac_info *mac = &hw->mac; in e1000_id_led_init_generic()
1786 ret_val = hw->nvm.ops.valid_led_default(hw, &data); in e1000_id_led_init_generic()
1790 mac->ledctl_default = E1000_READ_REG(hw, E1000_LEDCTL); in e1000_id_led_init_generic()
1842 s32 e1000_setup_led_generic(struct e1000_hw *hw) in e1000_setup_led_generic() argument
1848 if (hw->mac.ops.setup_led != e1000_setup_led_generic) in e1000_setup_led_generic()
1851 if (hw->phy.media_type == e1000_media_type_fiber) { in e1000_setup_led_generic()
1852 ledctl = E1000_READ_REG(hw, E1000_LEDCTL); in e1000_setup_led_generic()
1853 hw->mac.ledctl_default = ledctl; in e1000_setup_led_generic()
1859 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl); in e1000_setup_led_generic()
1860 } else if (hw->phy.media_type == e1000_media_type_copper) { in e1000_setup_led_generic()
1861 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1); in e1000_setup_led_generic()
1874 s32 e1000_cleanup_led_generic(struct e1000_hw *hw) in e1000_cleanup_led_generic() argument
1878 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default); in e1000_cleanup_led_generic()
1888 s32 e1000_blink_led_generic(struct e1000_hw *hw) in e1000_blink_led_generic() argument
1895 if (hw->phy.media_type == e1000_media_type_fiber) { in e1000_blink_led_generic()
1906 ledctl_blink = hw->mac.ledctl_mode2; in e1000_blink_led_generic()
1908 u32 mode = (hw->mac.ledctl_mode2 >> i) & in e1000_blink_led_generic()
1910 u32 led_default = hw->mac.ledctl_default >> i; in e1000_blink_led_generic()
1924 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl_blink); in e1000_blink_led_generic()
1935 s32 e1000_led_on_generic(struct e1000_hw *hw) in e1000_led_on_generic() argument
1941 switch (hw->phy.media_type) { in e1000_led_on_generic()
1943 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_led_on_generic()
1946 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_led_on_generic()
1949 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode2); in e1000_led_on_generic()
1964 s32 e1000_led_off_generic(struct e1000_hw *hw) in e1000_led_off_generic() argument
1970 switch (hw->phy.media_type) { in e1000_led_off_generic()
1972 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_led_off_generic()
1975 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_led_off_generic()
1978 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1); in e1000_led_off_generic()
1994 void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop) in e1000_set_pcie_no_snoop_generic() argument
2000 if (hw->bus.type != e1000_bus_type_pci_express) in e1000_set_pcie_no_snoop_generic()
2004 gcr = E1000_READ_REG(hw, E1000_GCR); in e1000_set_pcie_no_snoop_generic()
2007 E1000_WRITE_REG(hw, E1000_GCR, gcr); in e1000_set_pcie_no_snoop_generic()
2022 s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw) in e1000_disable_pcie_master_generic() argument
2029 if (hw->bus.type != e1000_bus_type_pci_express) in e1000_disable_pcie_master_generic()
2032 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_disable_pcie_master_generic()
2034 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_disable_pcie_master_generic()
2037 if (!(E1000_READ_REG(hw, E1000_STATUS) & in e1000_disable_pcie_master_generic()
2039 E1000_REMOVED(hw->hw_addr)) in e1000_disable_pcie_master_generic()
2059 void e1000_reset_adaptive_generic(struct e1000_hw *hw) in e1000_reset_adaptive_generic() argument
2061 struct e1000_mac_info *mac = &hw->mac; in e1000_reset_adaptive_generic()
2077 E1000_WRITE_REG(hw, E1000_AIT, 0); in e1000_reset_adaptive_generic()
2087 void e1000_update_adaptive_generic(struct e1000_hw *hw) in e1000_update_adaptive_generic() argument
2089 struct e1000_mac_info *mac = &hw->mac; in e1000_update_adaptive_generic()
2107 E1000_WRITE_REG(hw, E1000_AIT, in e1000_update_adaptive_generic()
2116 E1000_WRITE_REG(hw, E1000_AIT, 0); in e1000_update_adaptive_generic()
2128 static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw) in e1000_validate_mdi_setting_generic() argument
2132 if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) { in e1000_validate_mdi_setting_generic()
2134 hw->phy.mdix = 1; in e1000_validate_mdi_setting_generic()
2148 s32 e1000_validate_mdi_setting_crossover_generic(struct e1000_hw E1000_UNUSEDARG *hw) in e1000_validate_mdi_setting_crossover_generic() argument
2166 s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg, in e1000_write_8bit_ctrl_reg_generic() argument
2175 E1000_WRITE_REG(hw, reg, regvalue); in e1000_write_8bit_ctrl_reg_generic()
2180 regvalue = E1000_READ_REG(hw, reg); in e1000_write_8bit_ctrl_reg_generic()
2198 s32 e1000_get_hw_semaphore(struct e1000_hw *hw) in e1000_get_hw_semaphore() argument
2201 s32 fw_timeout = hw->nvm.word_size + 1; in e1000_get_hw_semaphore()
2202 s32 sw_timeout = hw->nvm.word_size + 1; in e1000_get_hw_semaphore()
2215 if (hw->dev_spec._82571.smb_counter > 2) in e1000_get_hw_semaphore()
2221 swsm = E1000_READ_REG(hw, E1000_SWSM); in e1000_get_hw_semaphore()
2231 hw->dev_spec._82571.smb_counter++; in e1000_get_hw_semaphore()
2237 if (hw->dev_spec._82575.clear_semaphore_once) { in e1000_get_hw_semaphore()
2238 hw->dev_spec._82575.clear_semaphore_once = false; in e1000_get_hw_semaphore()
2239 e1000_put_hw_semaphore(hw); in e1000_get_hw_semaphore()
2241 swsm = E1000_READ_REG(hw, E1000_SWSM); in e1000_get_hw_semaphore()
2251 swsm = E1000_READ_REG(hw, E1000_SWSM); in e1000_get_hw_semaphore()
2252 E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI); in e1000_get_hw_semaphore()
2255 if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI) in e1000_get_hw_semaphore()
2263 e1000_put_hw_semaphore(hw); in e1000_get_hw_semaphore()
2277 void e1000_put_hw_semaphore(struct e1000_hw *hw) in e1000_put_hw_semaphore() argument
2283 swsm = E1000_READ_REG(hw, E1000_SWSM); in e1000_put_hw_semaphore()
2287 E1000_WRITE_REG(hw, E1000_SWSM, swsm); in e1000_put_hw_semaphore()
2300 e1000_acquire_swfw_sync(struct e1000_hw *hw, u16 mask) in e1000_acquire_swfw_sync() argument
2311 if (e1000_get_hw_semaphore(hw)) { in e1000_acquire_swfw_sync()
2316 swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC); in e1000_acquire_swfw_sync()
2324 e1000_put_hw_semaphore(hw); in e1000_acquire_swfw_sync()
2336 E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync); in e1000_acquire_swfw_sync()
2338 e1000_put_hw_semaphore(hw); in e1000_acquire_swfw_sync()
2353 e1000_release_swfw_sync(struct e1000_hw *hw, u16 mask) in e1000_release_swfw_sync() argument
2359 while (e1000_get_hw_semaphore(hw) != E1000_SUCCESS) in e1000_release_swfw_sync()
2362 swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC); in e1000_release_swfw_sync()
2364 E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync); in e1000_release_swfw_sync()
2366 e1000_put_hw_semaphore(hw); in e1000_release_swfw_sync()